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21. 发明申请

US20120329207A1 SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THEREOF 有权
标题翻译：半导体器件封装及其制造方法
公开(公告)号：US20120329207A1
公开(公告)日：2012-12-27
申请号：US13606186
申请日：2012-09-07
申请人： Richard Alfred Beaupre , Paul Alan McConnelee , Arun Virupaksha Gowda , Thomas Bert Gorczyca
发明人： Richard Alfred Beaupre , Paul Alan McConnelee , Arun Virupaksha Gowda , Thomas Bert Gorczyca
IPC分类号： H01L21/768 , H01L31/18 , H01L21/56
CPC分类号： H01L23/3171 , H01L21/56 , H01L23/3164 , H01L23/3192 , H01L24/19 , H01L24/20 , H01L29/0657 , H01L2224/24 , H01L2224/24011 , H01L2224/2402 , H01L2224/24227 , H01L2224/76155 , H01L2224/82 , H01L2224/82102 , H01L2224/82105 , H01L2224/92144 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01082 , H01L2924/014 , H01L2924/10155 , H01L2924/12036 , H01L2924/1204 , H01L2924/12042 , H01L2924/12043 , H01L2924/00
摘要： A semiconductor device package includes a semiconductor device having connection pads formed thereon, with the connection pads being formed on first and second surfaces of the semiconductor device with edges of the semiconductor device extending therebetween. A first passivation layer is applied on the semiconductor device and a base dielectric laminate is affixed to the first surface of the semiconductor device that has a thickness greater than that of the first passivation layer. A second passivation layer having a thickness greater than that of the first passivation layer is applied over the first passivation layer and the semiconductor device to cover the second surface and the edges of the semiconductor device, and metal interconnects are coupled to the connection pads, with the metal interconnects extending through vias formed through the first and second passivation layers and the base dielectric laminate sheet to form a connection with the connection pads.
摘要翻译：半导体器件封装包括其上形成有连接焊盘的半导体器件，其中连接焊盘形成在半导体器件的第一和第二表面上，半导体器件的边缘在其间延伸。在半导体器件上施加第一钝化层，并且将基底电介质层压体固定到半导体器件的第一表面，其厚度大于第一钝化层的厚度。具有大于第一钝化层的厚度的第二钝化层施加在第一钝化层和半导体器件上以覆盖半导体器件的第二表面和边缘，并且金属互连件连接到连接焊盘，所述金属互连件延伸穿过通过所述第一和第二钝化层和所述基底电介质层压片形成的通孔，以形成与所述连接焊盘的连接。

22. 发明申请

US20120327603A1 COOLING DEVICE FOR A POWER MODULE, AND A RELATED METHOD THEREOF 有权
标题翻译：用于功率模块的冷却装置及其相关方法
公开(公告)号：US20120327603A1
公开(公告)日：2012-12-27
申请号：US13168030
申请日：2011-06-24
申请人： Richard Alfred Beaupre , Joseph Lucian Smolenski , William Dwight Gerstler , Xiaochun Shen
发明人： Richard Alfred Beaupre , Joseph Lucian Smolenski , William Dwight Gerstler , Xiaochun Shen
IPC分类号： H05K7/20 , B23P19/00 , F28F9/02
CPC分类号： H01L23/473 , H01L2924/0002 , Y10T29/49817 , H01L2924/00
摘要： A cooling device for a power module having an electronic module disposed on a base plate via a substrate is disclosed. The cooling device includes a heat sink plate having at least one cooling segment. The cooling segment includes an inlet plenum for entry of a cooling medium, a plurality of inlet manifold channels, a plurality of outlet manifold channels, and an outlet plenum. The plurality of inlet manifold channels are coupled orthogonally to the inlet plenum for receiving the cooling medium from the inlet plenum. The plurality of outlet manifold channels are disposed parallel to the inlet manifold channels. The outlet plenum is coupled orthogonally to the plurality of outlet manifold channels for exhaust of the cooling medium. A plurality of millichannels are disposed in the base plate orthogonally to the inlet and the outlet manifold channels. The plurality of milli channels direct the cooling medium from the plurality of inlet manifold channels to the plurality of outlet manifold channels.
摘要翻译：公开了一种具有通过基板设置在基板上的电子模块的功率模块的冷却装置。冷却装置包括具有至少一个冷却段的散热板。冷却段包括用于进入冷却介质的入口增压室，多个入口歧管通道，多个出口歧管通道和出口增压室。多个入口歧管通道正交地连接到入口气室，用于从入口通风室接收冷却介质。多个出口歧管通道平行于入口歧管通道设置。出口增压室正交地连接到多个出口歧管通道，用于排出冷却介质。多个毫通道与入口和出口歧管通道正交地布置在基板中。多个毫通道将冷却介质从多个入口歧管通道引导到多个出口歧管通道。

23. 发明授权

US07915944B2 Gate drive circuitry for non-isolated gate semiconductor devices 有权
标题翻译：非隔离栅极半导体器件的栅极驱动电路
公开(公告)号：US07915944B2
公开(公告)日：2011-03-29
申请号：US12495048
申请日：2009-06-30
申请人： Antonio Caiafa , Jeffrey Joseph Nasadoski , John Stanley Glaser , Juan Antonio Sabate , Richard Alfred Beaupre
发明人： Antonio Caiafa , Jeffrey Joseph Nasadoski , John Stanley Glaser , Juan Antonio Sabate , Richard Alfred Beaupre
IPC分类号： H03K17/16 , H03K17/30
CPC分类号： H03K17/687 , H03K2017/6875 , H03K2217/0036
摘要： One embodiment is a gate drive circuitry for switching a semiconductor device having a non-isolated input, the gate drive circuitry having a first circuitry configured to turn-on the semiconductor device by imposing a current on a gate of the semiconductor device so as to forward bias an inherent parasitic diode of the semiconductor device. There is a second circuitry configured to turn-off the semiconductor device by imposing a current on the gate of the semiconductor device so as to reverse bias the parasitic diode of the semiconductor device wherein the first circuitry and the second circuitry are coupled to the semiconductor device respectively through a first switch and a second switch.
摘要翻译：一个实施例是用于切换具有非隔离输入的半导体器件的栅极驱动电路，栅极驱动电路具有第一电路，其被配置为通过在半导体器件的栅极上施加电流来接通半导体器件，以便向前偏置半导体器件的固有寄生二极管。存在第二电路，其被配置为通过在半导体器件的栅极上施加电流来关断半导体器件，以便反向偏置半导体器件的寄生二极管，其中第一电路和第二电路耦合到半导体器件分别通过第一开关和第二开关。

24. 发明申请

US20100038774A1 ADVANCED AND INTEGRATED COOLING FOR PRESS-PACKAGES 审中-公开
标题翻译：用于压缩包装的先进和集成式冷却
公开(公告)号：US20100038774A1
公开(公告)日：2010-02-18
申请号：US12193429
申请日：2008-08-18
申请人： Richard S. Zhang , Richard Alfred Beaupre , Ramakrishna Venkata Mallina , Arun Virupaksha Gowda , Le Yan , Ljubisa Dragoljub Stevanovic , Peter Morley , Stephen Adam Solovitz
发明人： Richard S. Zhang , Richard Alfred Beaupre , Ramakrishna Venkata Mallina , Arun Virupaksha Gowda , Le Yan , Ljubisa Dragoljub Stevanovic , Peter Morley , Stephen Adam Solovitz
IPC分类号： H01L23/34
CPC分类号： H01L23/473 , H01L24/72 , H01L2924/01079 , H01L2924/1301 , H01L2924/1305 , H01L2924/13055 , H01L2924/3011 , H01L2924/00
摘要： A heat sink for cooling at least one electronic device package is provided. The electronic device package has an upper contact surface and a lower contact surface. The heat sink comprises at least one thermally conductive material and defines multiple inlet manifolds configured to receive a coolant, multiple outlet manifolds configured to exhaust the coolant, and multiple millichannels configured to receive the coolant from the inlet manifolds and to deliver the coolant to the outlet manifolds. The manifolds and millichannels are disposed proximate to the respective one of the upper and lower contact surface of the electronic device package for cooling the respective surface with the coolant.
摘要翻译：提供了用于冷却至少一个电子设备封装的散热器。电子器件封装具有上接触表面和下接触表面。散热器包括至少一个导热材料并且限定被配置为接收冷却剂的多个入口歧管，被配置为排出冷却剂的多个出口歧管以及被配置成从进气歧管接收冷却剂并将冷却剂输送到出口的多个通路歧管。歧管和毫通道靠近电子装置包装的上接触表面和下接触表面中的相应一个设置，用于用冷却剂冷却相应的表面。

25. 发明授权

US08675379B2 Power converting apparatus having improved electro-thermal characteristics 有权
标题翻译：具有改善的电热特性的电力转换装置
公开(公告)号：US08675379B2
公开(公告)日：2014-03-18
申请号：US13204834
申请日：2011-08-08
申请人： Joseph Lucian Smolenski , Michael Schutten , Eladio Clemente Delgado , Richard Alfred Beaupre
发明人： Joseph Lucian Smolenski , Michael Schutten , Eladio Clemente Delgado , Richard Alfred Beaupre
IPC分类号： H05K7/20 , H02M7/5387
CPC分类号： H01L25/16 , H01L2924/0002 , H02M7/003 , H05K7/1432 , H01L2924/00
摘要： A power-converting apparatus, such as a power module, may include a base plate (16), a first direct current (DC) bus and a second DC bus (22, 24). A power semiconductor component (18, 20) may be electrically coupled to one of the buses, and may be disposed on a substrate (12, 14) physically coupled to the base plate. The power semiconductor component may be made from a high-temperature, wide bandgap material, and the substrate may be exposed to a heat flux based on an operational temperature of the power semiconductor component. At least a first capacitor (50) may be coupled across the first and second DC buses, and at least second and third capacitors (52) may be respectively coupled across respective ones of the first and second buses and an alternating current (AC) return path. Capacitors (50, 52) may each be located inside the power module to establish circuit connections sufficiently proximate to the first power semiconductor component to reduce a formation of parasitic inductances, and further may each be located physically apart from the substrate and thus not exposed to the heat flux.
摘要翻译：诸如功率模块的电力转换装置可以包括基板（16），第一直流（DC）总线和第二DC总线（22,24）。功率半导体部件（18,20）可以电耦合到总线中的一个，并且可以设置在物理耦合到基板的基板（12,14）上。功率半导体部件可以由高温，宽带隙材料制成，并且基板可以基于功率半导体部件的工作温度暴露于热通量。至少第一电容器（50）可以跨越第一和第二DC总线耦合，并且至少第二和第三电容器（52）可以分别耦合在第一和第二总线中的相应的第一和第二总线上，并且交流（AC）返回路径。电容器（50,52）可以各自位于功率模块内部，以建立足够靠近第一功率半导体部件的电路连接，以减少寄生电感的形成，并且还可以分别位于与衬底物理分开的位置，从而不暴露于热通量。

26. 发明申请

US20130075878A1 COAXIAL POWER MODULE 有权
标题翻译：同轴电源模块
公开(公告)号：US20130075878A1
公开(公告)日：2013-03-28
申请号：US13247216
申请日：2011-09-28
申请人： Eladio Clemente Delgado , Arun Virupaksha Gowda , Antonio Caiafa , Brian Lynn Rowden , Ljubisa Dragoljub Stevanovic , Richard Alfred Beaupre
发明人： Eladio Clemente Delgado , Arun Virupaksha Gowda , Antonio Caiafa , Brian Lynn Rowden , Ljubisa Dragoljub Stevanovic , Richard Alfred Beaupre
IPC分类号： H01L23/552
CPC分类号： H01L23/552 , H01L25/117 , H01L2924/0002 , H01L2924/00
摘要： A power module includes at least one semiconductor die holding structure. Each die holding structure has a substantially cylindrical outer profile and a central axis. Each die holding structure is disposed within a common cylindrical EMI shield. A plurality of semiconductor devices are mounted to each die holding structure to form a substantially symmetric die mounting pattern respect to the central axis of the die holding structure.
摘要翻译：电源模块包括至少一个半导体管芯保持结构。每个模具保持结构具有基本上圆柱形的外部轮廓和中心轴线。每个管芯保持结构设置在共同的圆柱形EMI屏蔽内。多个半导体器件被安装到每个管芯保持结构，以相对于管芯保持结构的中心轴线形成大致对称的管芯安装图案。

27. 发明申请

US20130039103A1 POWER-CONVERTING APPARATUS HAVING IMPROVED ELECTRO-THERMAL CHARACTERISTICS 有权
标题翻译：具有改进的电热特性的动力转换装置
公开(公告)号：US20130039103A1
公开(公告)日：2013-02-14
申请号：US13204834
申请日：2011-08-08
申请人： JOSEPH LUCIAN SMOLENSKI , MICHAEL SCHUTTEN , ELADIO CLEMENTE DELGADO , RICHARD ALFRED BEAUPRE
发明人： JOSEPH LUCIAN SMOLENSKI , MICHAEL SCHUTTEN , ELADIO CLEMENTE DELGADO , RICHARD ALFRED BEAUPRE
IPC分类号： H02M7/00
CPC分类号： H01L25/16 , H01L2924/0002 , H02M7/003 , H05K7/1432 , H01L2924/00
摘要： A power-converting apparatus, such as a power module, may include a base plate (16), a first direct current (DC) bus and a second DC bus (22, 24). A power semiconductor component (18, 20) may be electrically coupled to one of the buses, and may be disposed on a substrate (12, 14) physically coupled to the base plate. The power semiconductor component may be made from a high-temperature, wide bandgap material, and the substrate may be exposed to a heat flux based on an operational temperature of the power semiconductor component. At least a first capacitor (50) may be coupled across the first and second DC buses, and at least second and third capacitors (52) may be respectively coupled across respective ones of the first and second buses and an alternating current (AC) return path. Capacitors (50, 52) may each be located inside the power module to establish circuit connections sufficiently proximate to the first power semiconductor component to reduce a formation of parasitic inductances, and further may each be located physically apart from the substrate and thus not exposed to the heat flux.
摘要翻译：诸如功率模块的电力转换装置可以包括基板（16），第一直流（DC）总线和第二DC总线（22,24）。功率半导体部件（18,20）可以电耦合到总线中的一个，并且可以设置在物理耦合到基板的基板（12,14）上。功率半导体部件可以由高温，宽带隙材料制成，并且基板可以基于功率半导体部件的工作温度暴露于热通量。至少第一电容器（50）可以跨越第一和第二DC总线耦合，并且至少第二和第三电容器（52）可以分别耦合在第一和第二总线中的相应的第一和第二总线上，并且交流（AC）返回路径。电容器（50,52）可以各自位于功率模块内部，以建立足够靠近第一功率半导体部件的电路连接，以减少寄生电感的形成，并且还可以分别位于与衬底物理分开的位置，从而不暴露于热通量。

28. 发明授权

US08310040B2 Semiconductor device package having high breakdown voltage and low parasitic inductance and method of manufacturing thereof 有权
标题翻译：具有高击穿电压和低寄生电感的半导体器件封装及其制造方法
公开(公告)号：US08310040B2
公开(公告)日：2012-11-13
申请号：US12962761
申请日：2010-12-08
申请人： Richard Alfred Beaupre , Paul Alan McConnelee , Arun Virupaksha Gowda , Thomas Bert Gorczyca
发明人： Richard Alfred Beaupre , Paul Alan McConnelee , Arun Virupaksha Gowda , Thomas Bert Gorczyca
IPC分类号： H01L23/48
CPC分类号： H01L23/3171 , H01L21/56 , H01L23/3164 , H01L23/3192 , H01L24/19 , H01L24/20 , H01L29/0657 , H01L2224/24 , H01L2224/24011 , H01L2224/2402 , H01L2224/24227 , H01L2224/76155 , H01L2224/82 , H01L2224/82102 , H01L2224/82105 , H01L2224/92144 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01082 , H01L2924/014 , H01L2924/10155 , H01L2924/12036 , H01L2924/1204 , H01L2924/12042 , H01L2924/12043 , H01L2924/00
摘要： A semiconductor device package includes a semiconductor device having connection pads formed thereon, with the connection pads being formed on first and second surfaces of the semiconductor device with edges of the semiconductor device extending therebetween. A first passivation layer is applied on the semiconductor device and a base dielectric laminate is affixed to the first surface of the semiconductor device that has a thickness greater than that of the first passivation layer. A second passivation layer having a thickness greater than that of the first passivation layer is applied over the first passivation layer and the semiconductor device to cover the second surface and the edges of the semiconductor device, and metal interconnects are coupled to the connection pads, with the metal interconnects extending through vias formed through the first and second passivation layers and the base dielectric laminate sheet to form a connection with the connection pads.
摘要翻译：半导体器件封装包括其上形成有连接焊盘的半导体器件，其中连接焊盘形成在半导体器件的第一和第二表面上，半导体器件的边缘在其间延伸。在半导体器件上施加第一钝化层，并且将基底电介质层压体固定到半导体器件的第一表面，其厚度大于第一钝化层的厚度。具有大于第一钝化层的厚度的第二钝化层施加在第一钝化层和半导体器件上以覆盖半导体器件的第二表面和边缘，并且金属互连件连接到连接焊盘，所述金属互连件延伸穿过通过所述第一和第二钝化层和所述基底电介质层压片形成的通孔，以形成与所述连接焊盘的连接。

29. 发明授权

US07817422B2 Heat sink and cooling and packaging stack for press-packages 有权
标题翻译：散热器和冷却和包装堆叠用于压力包装
公开(公告)号：US07817422B2
公开(公告)日：2010-10-19
申请号：US12193441
申请日：2008-08-18
申请人： Satish Sivarama Gunturi , Mahadevan Balasubramaniam , Ramakrishna Venkata Mallina , Richard Alfred Beaupre , Le Yan , Richard S. Zhang , Ljubisa Dragoljub Stevanovic , Adam Gregory Pautsch , Stephen Adam Solovitz
发明人： Satish Sivarama Gunturi , Mahadevan Balasubramaniam , Ramakrishna Venkata Mallina , Richard Alfred Beaupre , Le Yan , Richard S. Zhang , Ljubisa Dragoljub Stevanovic , Adam Gregory Pautsch , Stephen Adam Solovitz
IPC分类号： H05K7/20
CPC分类号： F28F3/12 , H01L23/473 , H01L25/117 , H01L2924/0002 , H01L2924/13055 , H01L2924/3011 , H01L2924/00
摘要： A heat sink for directly cooling at least one electronic device package is provided. The electronic device package has an upper contact surface and a lower contact surface. The heat sink comprises a cooling piece formed of at least one thermally conductive material. The cooling piece defines multiple inlet manifolds configured to receive a coolant and multiple outlet manifolds configured to exhaust the coolant. The inlet and outlet manifolds are interleaved. The cooling piece further defines multiple millichannels configured to receive the coolant from the inlet manifolds and to deliver the coolant to the outlet manifolds. The millichannels and inlet and outlet manifolds are further configured to directly cool one of the upper and lower contact surface of the electronic device package by direct contact with the coolant, such that the heat sink comprises an integral heat sink.
摘要翻译：提供了用于直接冷却至少一个电子设备封装的散热器。电子器件封装具有上接触表面和下接触表面。散热器包括由至少一种导热材料形成的冷却片。冷却片限定了多个入口歧管，其构造成接收冷却剂和多个出口歧管，其被配置为排出冷却剂。入口和出口歧管交错。冷却片进一步限定多个毫通道，其构造成从入口歧管接收冷却剂并且将冷却剂输送到出口歧管。毫通道和入口和出口歧管还被构造成通过与冷却剂直接接触直接冷却电子器件封装的上接触表面和下接触表面之一，使得散热器包括整体式散热器。

30. 发明申请

US20100230800A1 DOUBLE SIDE COOLED POWER MODULE WITH POWER OVERLAY 有权
标题翻译：双电源双电源模块与电源覆盖
公开(公告)号：US20100230800A1
公开(公告)日：2010-09-16
申请号：US12404272
申请日：2009-03-13
申请人： Richard Alfred Beaupre , Arun Virupaksha Gowda , Ljubisa Dragol jub Stevanovic , Stephen Adam Solovitz
发明人： Richard Alfred Beaupre , Arun Virupaksha Gowda , Ljubisa Dragol jub Stevanovic , Stephen Adam Solovitz
IPC分类号： H01L23/52
CPC分类号： H01L23/3735 , H01L23/051 , H01L23/42 , H01L23/473 , H01L24/24 , H01L25/072 , H01L2224/24137 , H01L2224/92144 , H01L2924/01029 , H01L2924/14
摘要： A power module includes one or more semiconductor power devices having a power overlay (POL) bonded thereto. A first heat sink is bonded to the semiconductor power devices on a side opposite the POL. A second heat sink is bonded to the POL opposite the side of the POL bonded to the semiconductor power devices. The semiconductor power devices, POL, first channel heat sink, and second channel heat sink together form a double side cooled power overlay module. The second channel heat sink is bonded to the POL solely via a compliant thermal interface material without the need for planarizing, brazing or metallurgical bonding.
摘要翻译：功率模块包括具有与其结合的功率覆盖（POL）的一个或多个半导体功率器件。第一散热器在与POL相对的一侧结合到半导体功率器件。第二散热器接合到与结合到半导体功率器件的POL的侧面相反的POL。半导体功率器件POL，第一通道散热器和第二通道散热器一起形成双侧冷却功率覆盖模块。第二通道散热器仅通过柔性热界面材料结合到POL，而不需要平坦化，钎焊或冶金结合。

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