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1. 发明授权

US08704211B2 High integrity protective coatings 有权
标题翻译：高完整性保护涂层
公开(公告)号：US08704211B2
公开(公告)日：2014-04-22
申请号：US10988481
申请日：2004-11-15
申请人： Tae Won Kim , Min Yan , Christian Maria Anton Heller , Marc Schaepkens , Thomas Bert Gorczyca , Paul Alan McConnelee , Ahmet Gun Erlat
发明人： Tae Won Kim , Min Yan , Christian Maria Anton Heller , Marc Schaepkens , Thomas Bert Gorczyca , Paul Alan McConnelee , Ahmet Gun Erlat
IPC分类号： H01L35/24 , H01L51/00
CPC分类号： H01L51/5256
摘要： A composite article with at least one high integrity protective coating, the high integrity protective coating having at least one planarizing layer and at least one organic-inorganic composition barrier coating layer. A method for depositing a high integrity protective coating.
摘要翻译：具有至少一个高完整性保护涂层的复合制品，所述高完整性保护涂层具有至少一个平坦化层和至少一个有机 - 无机组合物阻挡涂层。一种用于沉积高完整性保护涂层的方法。

2. 发明申请

US20120329207A1 SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THEREOF 有权
标题翻译：半导体器件封装及其制造方法
公开(公告)号：US20120329207A1
公开(公告)日：2012-12-27
申请号：US13606186
申请日：2012-09-07
申请人： Richard Alfred Beaupre , Paul Alan McConnelee , Arun Virupaksha Gowda , Thomas Bert Gorczyca
发明人： Richard Alfred Beaupre , Paul Alan McConnelee , Arun Virupaksha Gowda , Thomas Bert Gorczyca
IPC分类号： H01L21/768 , H01L31/18 , H01L21/56
CPC分类号： H01L23/3171 , H01L21/56 , H01L23/3164 , H01L23/3192 , H01L24/19 , H01L24/20 , H01L29/0657 , H01L2224/24 , H01L2224/24011 , H01L2224/2402 , H01L2224/24227 , H01L2224/76155 , H01L2224/82 , H01L2224/82102 , H01L2224/82105 , H01L2224/92144 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01082 , H01L2924/014 , H01L2924/10155 , H01L2924/12036 , H01L2924/1204 , H01L2924/12042 , H01L2924/12043 , H01L2924/00
摘要： A semiconductor device package includes a semiconductor device having connection pads formed thereon, with the connection pads being formed on first and second surfaces of the semiconductor device with edges of the semiconductor device extending therebetween. A first passivation layer is applied on the semiconductor device and a base dielectric laminate is affixed to the first surface of the semiconductor device that has a thickness greater than that of the first passivation layer. A second passivation layer having a thickness greater than that of the first passivation layer is applied over the first passivation layer and the semiconductor device to cover the second surface and the edges of the semiconductor device, and metal interconnects are coupled to the connection pads, with the metal interconnects extending through vias formed through the first and second passivation layers and the base dielectric laminate sheet to form a connection with the connection pads.
摘要翻译：半导体器件封装包括其上形成有连接焊盘的半导体器件，其中连接焊盘形成在半导体器件的第一和第二表面上，半导体器件的边缘在其间延伸。在半导体器件上施加第一钝化层，并且将基底电介质层压体固定到半导体器件的第一表面，其厚度大于第一钝化层的厚度。具有大于第一钝化层的厚度的第二钝化层施加在第一钝化层和半导体器件上以覆盖半导体器件的第二表面和边缘，并且金属互连件连接到连接焊盘，所述金属互连件延伸穿过通过所述第一和第二钝化层和所述基底电介质层压片形成的通孔，以形成与所述连接焊盘的连接。

3. 发明授权

US07742672B2 Composition, optical device article, and associated method 有权
标题翻译：组成，光学装置制品及相关方法
公开(公告)号：US07742672B2
公开(公告)日：2010-06-22
申请号：US11210505
申请日：2005-08-24
申请人： Thomas Bert Gorczyca
发明人： Thomas Bert Gorczyca
IPC分类号： G02B6/10
CPC分类号： G02B6/138 , G02B6/02033
摘要： A base composition is provided. The base composition includes a binder, a reactive monomer, and an anti-haze additive. The binder may include an optically transmissive polymer. The reactive monomer may be both curable and volatile. The binder and the reactive monomer have differing refractive indices relative to each other. A cured layer formed from the base composition may be formed into an article have particular properties. A method of making the layer is provided.
摘要翻译：提供了基础组合物。基础组合物包括粘合剂，反应性单体和防雾添加剂。粘合剂可以包括透光聚合物。反应性单体可以是可固化的和挥发性的。粘合剂和反应性单体相对于彼此具有不同的折射率。由基础组合物形成的固化层可以形成具有特定性质的制品。提供了制作该层的方法。

4. 发明授权

US07018572B2 Method for producing data storage media 失效
标题翻译：数据存储介质的制作方法
公开(公告)号：US07018572B2
公开(公告)日：2006-03-28
申请号：US09681817
申请日：2001-06-11
申请人： Thomas Paul Feist , Thomas Bert Gorczyca
发明人： Thomas Paul Feist , Thomas Bert Gorczyca
IPC分类号： B29D11/00
CPC分类号： B29D17/005 , B29C45/2632 , B29C2045/2636 , B29L2017/005 , G11B5/62 , G11B5/84 , G11B7/261 , G11B7/263 , G11B20/00086 , G11B20/00876 , Y10S425/81
摘要： Disclosed herein are data storage media and methods of making the same. The data storage media, comprises: primary surface features disposed on at least one side of said data storage media; and secondary features superimposed over at least a portion of said surface features. In one embodiment, the method for manufacturing the data storage media comprises: disposing an identifier layer onto a surface of a stamper, said stamper having primary surface features on a first side of said stamper opposite said identifier layer; forming secondary features on an exposed surface of said identifier layer; installing said stamper into a mold; injecting a molten plastic material into the mold, wherein said molten plastic physically contacts said first side; cooling said plastic to form said data storage media, such that a positive image of said primary surface features and of said secondary features are formed into at least a portion of a surface of said plastic; and releasing said data storage media from said mold.
摘要翻译：这里公开的是数据存储介质及其制造方法。数据存储介质包括：设置在所述数据存储介质的至少一侧上的主表面特征; 并且次要特征叠加在所述表面特征的至少一部分上。在一个实施例中，用于制造数据存储介质的方法包括：将标识符层设置在压模的表面上，所述压模在所述压模的与所述标识层相对的第一侧上具有主表面特征; 在所述标识层的暴露表面上形成次要特征; 将所述压模安装到模具中; 将熔融的塑料材料注射到模具中，其中所述熔融塑料物理地接触所述第一侧; 冷却所述塑料以形成所述数据存储介质，使得所述主表面特征和所述次要特征的正像形成为所述塑料的表面的至少一部分; 并从所述模具中释放所述数据存储介质。

5. 发明授权

US06935792B2 Optoelectronic package and fabrication method 有权
标题翻译：光电封装及制造方法
公开(公告)号：US06935792B2
公开(公告)日：2005-08-30
申请号：US10065460
申请日：2002-10-21
申请人： Richard Joseph Saia , Thomas Bert Gorczyca , Christopher James Kapusta , Ernest Wayne Balch , Glenn Scott Claydon , Samhita Dasgupta , Eladio Clemente Delgado
发明人： Richard Joseph Saia , Thomas Bert Gorczyca , Christopher James Kapusta , Ernest Wayne Balch , Glenn Scott Claydon , Samhita Dasgupta , Eladio Clemente Delgado
IPC分类号： G02B6/12 , G02B6/122 , G02B6/138 , G02B6/42 , G02B6/00
CPC分类号： G02B6/122 , G02B6/12002 , G02B6/12004 , G02B6/1221 , G02B6/138 , G02B6/42 , H01L2224/04105 , H01L2224/32225 , H01L2224/32245 , H01L2224/73267 , H01L2924/15153 , H01L2924/15192
摘要： An optoelectronic package is fabricated by a method which includes: positioning an optical device within a window of a substrate active-side up and below a top substrate surface; filling the window with an optical polymer material; planarizing surfaces of the optical polymer material and the substrate; patterning waveguide material over the optical polymer material and the substrate to form an optical interconnection path; and to form a mirror to reflect light from the optical device to the interconnection path; and forming a via to expose a bond pad of the optical device.
摘要翻译：通过一种方法制造光电子封装，该方法包括：将光学器件定位在衬底主动侧的窗口内，顶部衬底表面上方和下方; 用光学聚合物材料填充窗户; 光学聚合物材料和基底的平坦化表面; 在光学聚合物材料和基底上形成波导材料以形成光学互连路径; 并且形成反射镜以将来自光学装置的光反射到互连路径; 以及形成通孔以暴露所述光学器件的接合焊盘。

6. 发明授权

US06709608B2 Semiconductor processing component 有权
标题翻译：半导体处理部件
公开(公告)号：US06709608B2
公开(公告)日：2004-03-23
申请号：US10199273
申请日：2002-07-22
申请人： Thomas Bert Gorczyca , Margaret Ellen Lazzeri , Frederic Francis Ahlgren
发明人： Thomas Bert Gorczyca , Margaret Ellen Lazzeri , Frederic Francis Ahlgren
IPC分类号： C03C1500
CPC分类号： H01L21/76232 , H01L21/306
摘要： A semiconductor processing component includes a quartz body characterized by silicon oxide filled micro cracks. The component is utilized as a processing component in a semiconductor furnace system. The quartz body is prepared by cleaning the component to remove a build up silicon layer and to expose micro cracks in the surface of the component and to etch the micro cracks into trenches. A silicon layer is applied onto the processing component body and at least a portion of the silicon is oxidized to silica to fill the trenches in the surface of the component body.
摘要翻译：半导体处理部件包括以氧化硅填充的微裂纹为特征的石英体。该部件用作半导体炉系统中的处理部件。通过清洁组件以除去积聚硅层并暴露组件表面中的微裂纹并将微裂纹蚀刻成沟槽来制备石英体。将硅层施加到处理部件主体上，并且硅的至少一部分被氧化成二氧化硅以填充部件主体的表面中的沟槽。

7. 发明授权

US06508961B1 Structure and method for molding optical disks 失效
标题翻译：用于成型光盘的结构和方法
公开(公告)号：US06508961B1
公开(公告)日：2003-01-21
申请号：US09633141
申请日：2000-08-04
申请人： Thomas Paul Feist , Thomas Bert Gorczyca
发明人： Thomas Paul Feist , Thomas Bert Gorczyca
IPC分类号： B29D1100
CPC分类号： B29C45/2642 , B29C45/2632 , B29C2045/2636 , Y10S425/81
摘要： A method for molding an optical disk includes applying a thermally insulative mold insert onto a thermally conductive mold form by coating the mold insert on the mold form. The mold insert has a coefficient of thermal expansion compatible with the coefficient of thermal expansion of the mold form and includes an adhesion promoting material. The method further includes positioning the coated mold form in a thermally conductive mold apparatus with the mold insert positioned between the mold form and the mold apparatus; injecting a molten thermoplastic material into the mold apparatus; retaining the molten thermoplastic material in the mold apparatus for a time sufficient for the molten thermoplastic material to cool below its glass transition temperature to form the optical disk; and ejecting the optical disk from the mold apparatus.
摘要翻译：一种用于模制光盘的方法包括通过将模具插件涂覆在模具形式上将热绝缘模具插件施加到导热模具形式上。模具插入件具有与模具形状的热膨胀系数相容的热膨胀系数，并且包括粘附促进材料。该方法还包括将涂覆的模具形状定位在导热模具装置中，其中模具插入件位于模具形状和模具装置之间; 将熔融的热塑性材料注入模具装置中; 将熔融的热塑性材料保持在模具设备中足以使熔融的热塑性材料冷却到其玻璃化转变温度以下以形成光盘的时间; 并从模具装置中弹出光盘。

8. 发明授权

US10276486B2 Stress resistant micro-via structure for flexible circuits 有权
公开(公告)号：US10276486B2
公开(公告)日：2019-04-30
申请号：US12715450
申请日：2010-03-02
申请人： Thomas Bert Gorczyca , Richard Joseph Saia , Paul Alan McConnelee
发明人： Thomas Bert Gorczyca , Richard Joseph Saia , Paul Alan McConnelee
IPC分类号： H01L23/498
摘要： A chip package is disclosed that includes an electronic chip having a plurality of die pads formed on a top surface thereof, with a polyimide flex layer positioned thereon by way of an adhesive layer. A plurality of vias is formed through the polyimide flex layer and the adhesive layer corresponding to the die pads. A plurality of metal interconnects are formed on the polyimide flex layer each having a cover pad covering a portion of a top surface of the polyimide flex layer, a sidewall extending down from the cover pad and through the via along a perimeter thereof, and a base connected to the sidewall and forming an electrical connection with a respective die pad. Each of the base and the sidewall is formed to have a thickness that is equal to or greater than a thickness of the adhesive layer.

9. 发明授权

US08431444B2 Epoxy encapsulating and lamination adhesive and method of making same 有权
标题翻译：环氧封装和层压胶粘剂及其制备方法
公开(公告)号：US08431444B2
公开(公告)日：2013-04-30
申请号：US13210763
申请日：2011-08-16
申请人： Thomas Bert Gorczyca , Paul Alan McConnelee
发明人： Thomas Bert Gorczyca , Paul Alan McConnelee
IPC分类号： H01L21/02 , C08K5/1535 , C08J7/18 , B05D3/02
CPC分类号： H01L23/28 , C08G59/50 , C08K5/1515 , C08K5/1539 , C08K5/17 , C08K5/18 , C09J163/00 , H01L21/56 , H01L23/293 , H01L2224/48091 , H01L2224/92144
摘要： An adhesive includes an epoxy resin and a hardener. The hardener includes trioxdiamine, diaminodicyclohexylmethane, toluene diamine, and bisphenol-A dianhydride.
摘要翻译：粘合剂包括环氧树脂和硬化剂。硬化剂包括三氧二胺，二氨基二环己基甲烷，甲苯二胺和双酚A二酐。

10. 发明授权

US08310040B2 Semiconductor device package having high breakdown voltage and low parasitic inductance and method of manufacturing thereof 有权
标题翻译：具有高击穿电压和低寄生电感的半导体器件封装及其制造方法
公开(公告)号：US08310040B2
公开(公告)日：2012-11-13
申请号：US12962761
申请日：2010-12-08
申请人： Richard Alfred Beaupre , Paul Alan McConnelee , Arun Virupaksha Gowda , Thomas Bert Gorczyca
发明人： Richard Alfred Beaupre , Paul Alan McConnelee , Arun Virupaksha Gowda , Thomas Bert Gorczyca
IPC分类号： H01L23/48
CPC分类号： H01L23/3171 , H01L21/56 , H01L23/3164 , H01L23/3192 , H01L24/19 , H01L24/20 , H01L29/0657 , H01L2224/24 , H01L2224/24011 , H01L2224/2402 , H01L2224/24227 , H01L2224/76155 , H01L2224/82 , H01L2224/82102 , H01L2224/82105 , H01L2224/92144 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01082 , H01L2924/014 , H01L2924/10155 , H01L2924/12036 , H01L2924/1204 , H01L2924/12042 , H01L2924/12043 , H01L2924/00
摘要： A semiconductor device package includes a semiconductor device having connection pads formed thereon, with the connection pads being formed on first and second surfaces of the semiconductor device with edges of the semiconductor device extending therebetween. A first passivation layer is applied on the semiconductor device and a base dielectric laminate is affixed to the first surface of the semiconductor device that has a thickness greater than that of the first passivation layer. A second passivation layer having a thickness greater than that of the first passivation layer is applied over the first passivation layer and the semiconductor device to cover the second surface and the edges of the semiconductor device, and metal interconnects are coupled to the connection pads, with the metal interconnects extending through vias formed through the first and second passivation layers and the base dielectric laminate sheet to form a connection with the connection pads.
摘要翻译：半导体器件封装包括其上形成有连接焊盘的半导体器件，其中连接焊盘形成在半导体器件的第一和第二表面上，半导体器件的边缘在其间延伸。在半导体器件上施加第一钝化层，并且将基底电介质层压体固定到半导体器件的第一表面，其厚度大于第一钝化层的厚度。具有大于第一钝化层的厚度的第二钝化层施加在第一钝化层和半导体器件上以覆盖半导体器件的第二表面和边缘，并且金属互连件连接到连接焊盘，所述金属互连件延伸穿过通过所述第一和第二钝化层和所述基底电介质层压片形成的通孔，以形成与所述连接焊盘的连接。

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