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21. 发明授权

US08853701B2 Semiconductor device, display device, and production method for semiconductor device and display device 有权
标题翻译：半导体装置，显示装置以及半导体装置及显示装置的制造方法
公开(公告)号：US08853701B2
公开(公告)日：2014-10-07
申请号：US13643923
申请日：2011-03-17
申请人： Kazushige Hotta
发明人： Kazushige Hotta
IPC分类号： H01L21/00 , H01L21/8238 , H01L27/12 , H01L27/092 , H01L29/786
CPC分类号： H01L27/092 , H01L21/8238 , H01L27/1214 , H01L27/1222 , H01L27/127 , H01L29/78696
摘要： In order to efficiently manufacture a semiconductor device having a plurality of TFTs formed thereon, which can be applied to a variety of uses, a semiconductor device (100) is disclosed that is provided with a first P-type TFT (10a), a second P-type TFT (10b), a first N-type TFT (10c), and a second N-type TFT (10d), each having a channel region that is formed of polycrystalline silicon. When d1, d2, d3, and d4 respectively represent the concentrations of p-type impurities in the respective channel regions of the TFTs (10a to 10d), at least three values out of d1, d2, d3, and d4 are mutually different, and d1, d2, d3, and d4 satisfy relations of d1
摘要翻译：为了有效地制造可以应用于各种用途的具有形成在其上的多个TFT的半导体器件，公开了一种半导体器件（100），其设置有第一P型TFT（10a），第二 P型TFT（10b），第一N型TFT（10c）和第二N型TFT（10d），各自具有由多晶硅形成的沟道区域。当d1，d2，d3和d4分别表示TFT（10a至10d）的各个沟道区域中的p型杂质的浓度时，d1，d2，d3和d4中的至少三个值彼此不同， d1，d2，d3和d4满足d1

22. 发明申请

US20130146879A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20130146879A1
公开(公告)日：2013-06-13
申请号：US13703987
申请日：2011-06-13
申请人： Masaki Yamanaka , Kazushige Hotta
发明人： Masaki Yamanaka , Kazushige Hotta
IPC分类号： H01L27/092 , H01L33/00 , H01L29/786
CPC分类号： H01L27/092 , G02F1/136204 , G02F1/136259 , G02F2001/136245 , H01L27/11 , H01L27/1108 , H01L27/1222 , H01L29/786 , H01L29/78696 , H01L33/0041
摘要： Disclosed is a semiconductor device in which an n-channel type first thin film transistor and a p-channel type second thin film transistor are provided on the same substrate. The first thin film transistor has a first semiconductor layer (11), and the second thin film transistor has a second semiconductor layer (20), a third semiconductor layer (21), and a fourth semiconductor layer (22). The first semiconductor layer (11), the second semiconductor layer (20), the third semiconductor layer (21) and the fourth semiconductor layer (22) are formed of the same film, and the first and second semiconductor layers (11, 20) respectively have slanted portions (11e, 20e) positioned at respective peripheries, and main portions (11m, 20m) made of portions other than the slanted portions. A p-type impurity is implanted into the slanted portion (11e) of the first semiconductor layer at a concentration higher than that in the main portion (11m) of the first semiconductor layer and that in the main portion (20m) of the second semiconductor layer.
摘要翻译：公开了一种半导体器件，其中在同一衬底上设置有n沟道型第一薄膜晶体管和p沟道型第二薄膜晶体管。第一薄膜晶体管具有第一半导体层（11），第二薄膜晶体管具有第二半导体层（20），第三半导体层（21）和第四半导体层（22）。第一半导体层（11），第二半导体层（20），第三半导体层（21）和第四半导体层（22）由相同的膜形成，第一和第二半导体层（11,20）分别具有位于相应周边的倾斜部分（11e，20e）以及由倾斜部分以外的部分制成的主要部分（11m，20m）。在第一半导体层的倾斜部分（11e）中以比第一半导体层的主要部分（11m）高的浓度注入p型杂质，并且在第二半导体的主要部分（20m）中注入p型杂质层。

23. 发明授权

US07700495B2 Thin film transistor device and method of manufacturing the same, and liquid crystal display device 有权
标题翻译：薄膜晶体管器件及其制造方法及液晶显示器件
公开(公告)号：US07700495B2
公开(公告)日：2010-04-20
申请号：US12029249
申请日：2008-02-11
申请人： Seiji Doi , Kazushige Hotta , Takuya Hirano , Kenichi Yanai
发明人： Seiji Doi , Kazushige Hotta , Takuya Hirano , Kenichi Yanai
IPC分类号： H01L21/302
CPC分类号： H01L27/1288 , G02F1/13454 , H01L27/1214 , H01L27/1237 , H01L27/127 , H01L29/42384
摘要： The present invention relates to a thin film transistor device formed on an insulating substrate of a liquid crystal display device and others, a method of manufacturing the same, and a liquid crystal display device. In structure, there are provided the steps of forming a negative photoresist film on a first insulating film for covering a first island-like semiconductor film, forming a resist mask that has an opening portion in an inner region with respect to a periphery of the first island-like semiconductor film by exposing/developing the negative photoresist film from a back surface side of a transparent substrate, etching the first insulating film in the opening portion of the resist mask, forming a second insulating film for covering the first insulating film and a conductive film thereon, and forming a first gate electrode and a second gate electrode by patterning the conductive film.
摘要翻译：本发明涉及形成在液晶显示装置等的绝缘基板上的薄膜晶体管装置及其制造方法以及液晶显示装置。在结构上，提供了在用于覆盖第一岛状半导体膜的第一绝缘膜上形成负性光致抗蚀剂膜的步骤，形成相对于第一岛状半导体膜的周边在内部区域具有开口部的抗蚀剂掩模通过从透明基板的背面侧曝光/显影负性光致抗蚀剂膜，蚀刻抗蚀剂掩模的开口部分中的第一绝缘膜，形成用于覆盖第一绝缘膜的第二绝缘膜和导电膜，并且通过图案化导电膜形成第一栅电极和第二栅电极。

24. 发明授权

US07344930B2 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US07344930B2
公开(公告)日：2008-03-18
申请号：US11790350
申请日：2007-04-25
申请人： Kazushige Hotta
发明人： Kazushige Hotta
IPC分类号： H01L21/00
CPC分类号： H01L27/1285 , H01L27/1214 , H01L27/1233 , H01L27/1237
摘要： To obtain a semiconductor device containing TFTs of different, suitable properties as display pixel TFTs and high-voltage, driver-circuit TFTs, the semiconductor device of the present invention includes: first and second islands-shaped polycrystalline silicon (p-Si) layers provided above an insulating substrate and having relatively large grain sizes; a third islands-shaped p-Si layer having relatively small grain sizes; a first gate insulating film provided on the first p-Si layer and having a first thickness; second and third gate insulating films provided on the second and third p-Si layers having second and third thicknesses which are not less than the first thickness; gate electrodes provided on the gate insulating films; n-type high-concentration source/drain regions formed by adding an n-type impurity to a high concentration outside channel regions; and second and third n-type low-concentration-source/drain regions provided between the channel regions and the n-type high-concentration source/drain regions of the second and third p-Si layers. The third n-type low-concentration source/drain regions have a higher impurity dose than the second n-type low-concentration source/drain regions.
摘要翻译：本发明的半导体器件包括：提供第一和第二岛状多晶硅（p-Si）层的半导体器件，该半导体器件包含具有不同的合适性质的TFT作为显示像素TFT和高电压驱动电路TFT，在绝缘基板之上并具有相对较大的晶粒尺寸; 具有相对小的晶粒尺寸的第三岛状p-Si层; 设置在所述第一p-Si层上并具有第一厚度的第一栅极绝缘膜; 设置在第二和第三p-Si层上的第二和第三栅极绝缘膜具有不小于第一厚度的第二和第三厚度; 设置在栅极绝缘膜上的栅电极; 通过向高浓度的外部沟道区域添加n型杂质形成的n型高浓度源极/漏极区域; 以及设置在沟道区和第二和第三p-Si层的n型高浓度源极/漏极区之间的第二和第三n型低浓度源极/漏极区。第三n型低浓度源/漏区具有比第二n型低浓度源极/漏极区更高的杂质剂量。

25. 发明授权

US07291862B2 Thin film transistor substrate and production method thereof 有权
标题翻译：薄膜晶体管基板及其制造方法
公开(公告)号：US07291862B2
公开(公告)日：2007-11-06
申请号：US11385077
申请日：2006-03-21
申请人： Kazushige Hotta , Takuya Hirano
发明人： Kazushige Hotta , Takuya Hirano
IPC分类号： H01L29/76
CPC分类号： H01L27/12 , G02F1/13454 , H01L27/1285 , H01L29/04
摘要： A method for producing a thin film transistor substrate includes the steps of: (i) depositing an amorphous semiconductor film on a transparent insulating substrate; (ii) patterning the amorphous semiconductor film so as to form insular amorphous semiconductor films, the step (ii) including a process (I) for forming, in respective stripe areas each of which is elongate in a first direction in a display area, a plurality of insular semiconductor films whose channel length is in line with the first direction, and a process (II) for forming, in an area including extended portions of the striped areas in a peripheral circuit area, a plurality of insular semiconductor films; (iii) polycrystallizing the insular semiconductor films in the peripheral circuit area so that the insular semiconductor films have high mobility in a second direction and polycrystallizing the insular semiconductor films in the display area so that the insular semiconductor films have high mobility in the first direction; and (iv) forming TFTs by using polycrystalline insular semiconductor films. In at least one peripheral circuit, a channel of a high speed TFT is positioned on a portion other than the extended portions of the stripe areas.
摘要翻译：一种制造薄膜晶体管基板的方法包括以下步骤：（i）在透明绝缘基板上沉积非晶半导体膜; （ii）对非晶半导体膜进行图形化以形成非晶半导体非晶半导体膜，步骤（ii）包括在显示区域中沿着第一方向细长的各个条带区域中形成用于形成的工序（I），多个岛状半导体膜，其通道长度与第一方向一致;以及在包括外围电路区域中的条纹区域的延伸部分的区域中形成多个岛状半导体膜的工艺（II）（iii）使外围电路区域中的岛状半导体膜多晶化，使得岛状半导体膜在第二方向上具有高迁移率，并使显示区域中的岛状半导体膜多晶化，使得岛状半导体膜在第一方向上具有高迁移率; 和（iv）通过使用多晶的半导体膜形成TFT。在至少一个外围电路中，高速TFT的通道位于除了区域的延伸部分之外的部分上。

26. 发明授权

US07279348B2 Thin film transistor device and method of manufacturing the same 有权
标题翻译：薄膜晶体管器件及其制造方法
公开(公告)号：US07279348B2
公开(公告)日：2007-10-09
申请号：US11183432
申请日：2005-07-18
申请人： Kazushige Hotta , Hiroyuki Yaegashi , Takuya Watanabe , Tamotsu Wada
发明人： Kazushige Hotta , Hiroyuki Yaegashi , Takuya Watanabe , Tamotsu Wada
IPC分类号： H01L21/84
CPC分类号： H01L27/1288 , H01L27/1214 , H01L27/3248 , H01L29/42384 , H01L29/4908 , H01L29/66757 , H01L29/78621 , H01L2029/7863 , H01L2227/323
摘要： A polysilicon film is formed in a predetermined region on a glass substrate, and then a gate insulating film and a gate electrode, whose width is narrower than the gate insulating film, are formed thereon. Then, an interlayer insulating film and an ITO film are formed on an overall surface. Then, n-type source/drain regions having an LDD structure are formed by implanting the n-type impurity into the polysilicon film. Then, an n-type TFT forming region and a pixel-electrode forming region are covered with a resist film, and then p-type source/drain regions are formed by implanting the p-type impurity into the polysilicon film in a p-type TFT forming region. Then, the resist film is left only in the pixel-electrode forming region and the resist film is removed from other regions. A pixel electrode is formed by etching the ITO film while using the remaining resist film as a mask.
摘要翻译：在玻璃基板上的预定区域中形成多晶硅膜，然后在其上形成宽度比栅极绝缘膜窄的栅极绝缘膜和栅极电极。然后，在整个表面上形成层间绝缘膜和ITO膜。然后，通过将n型杂质注入多晶硅膜形成具有LDD结构的n型源/漏区。然后，用抗蚀剂膜覆盖n型TFT形成区域和像素电极形成区域，然后通过以p型将p型杂质注入多晶硅膜形成p型源极/漏极区域 TFT形成区域。然后，抗蚀剂膜仅留在像素电极形成区域中，并且抗蚀剂膜从其它区域去除。通过在使用剩余的抗蚀剂膜作为掩模的同时蚀刻ITO膜来形成像素电极。

27. 发明申请

US20070205415A1 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20070205415A1
公开(公告)日：2007-09-06
申请号：US11790350
申请日：2007-04-25
申请人： Kazushige Hotta
发明人： Kazushige Hotta
IPC分类号： H01L29/04 , H01L21/84 , H01L31/036
CPC分类号： H01L27/1285 , H01L27/1214 , H01L27/1233 , H01L27/1237
摘要： To obtain a semiconductor device containing TFTs of different, suitable properties as display pixel TFTs and high-voltage, driver-circuit TFTs, the semiconductor device of the present invention includes: first and second islands-shaped polycrystalline silicon (p-Si) layers provided above an insulating substrate and having relatively large grain sizes; a third islands-shaped p-Si layer having relatively small grain sizes; a first gate insulating film provided on the first p-Si layer and having a first thickness; second and third gate insulating films provided on the second and third p-Si layers having second and third thicknesses which are not less than the first thickness; gate electrodes provided on the gate insulating films; n-type high-concentration source/drain regions formed by adding an n-type impurity to a high concentration outside channel regions; and second and third n-type low-concentration-source/drain regions provided between the channel regions and the n-type high-concentration source/drain regions of the second and third p-Si layers. The third n-type low-concentration source/drain regions have a higher impurity dose than the second n-type low-concentration source/drain regions.
摘要翻译：本发明的半导体器件包括：提供第一和第二岛状多晶硅（p-Si）层的半导体器件，该半导体器件包含具有不同的合适性质的TFT作为显示像素TFT和高电压驱动电路TFT，在绝缘基板之上并具有相对较大的晶粒尺寸; 具有相对小的晶粒尺寸的第三岛状p-Si层; 设置在所述第一p-Si层上并具有第一厚度的第一栅极绝缘膜; 设置在第二和第三p-Si层上的第二和第三栅极绝缘膜具有不小于第一厚度的第二和第三厚度; 设置在栅极绝缘膜上的栅电极; 通过向高浓度的外部沟道区域添加n型杂质形成的n型高浓度源极/漏极区域; 以及设置在沟道区和第二和第三p-Si层的n型高浓度源极/漏极区之间的第二和第三n型低浓度源极/漏极区。第三n型低浓度源/漏区具有比第二n型低浓度源极/漏极区更高的杂质剂量。

28. 发明授权

US07256457B2 Thin-film transistor device, utilizing different types of thin film transistors 有权
标题翻译：薄膜晶体管器件，利用不同类型的薄膜晶体管
公开(公告)号：US07256457B2
公开(公告)日：2007-08-14
申请号：US10941543
申请日：2004-09-15
申请人： Kazushige Hotta
发明人： Kazushige Hotta
IPC分类号： H01L27/12
CPC分类号： H01L27/127 , H01L27/1214 , H01L27/124 , H01L27/1288
摘要： A TFT device, a method of manufacturing the same, a TFT substrate and a display device, making it possible to decrease the photolithography steps, to improve the productivity and to decrease the cost of production. There are formed on the same substrate a first n-ch TFT having an LDD region which is entirely covered with a gate electrode, a second n-ch TFT having an LDD region partially covered with a gate electrode, and a p-ch TFT. Here, electrically conducting thin films and a gate electrode are formed on the electrically conducting thin film and on the insulating film, phosphorus ions are implanted into source/drain regions of the n-ch TFTs using the electrically conducting thin films and gate electrode as masks, and a gate electrode is formed by etching the electrically conducting thin film by using the electrically conducting thin film as a mask.
摘要翻译： TFT装置及其制造方法，TFT基板和显示装置，能够减小光刻工序，提高生产率，降低生产成本。在同一衬底上形成具有完全被栅极电极覆盖的LDD区域的第一n沟道TFT，具有部分被栅电极覆盖的LDD区域的第二n沟道TFT和p-ch TFT。这里，在导电薄膜和绝缘膜上形成导电薄膜和栅电极，使用导电薄膜和栅电极作为掩模将磷离子注入到n沟TFT的源/漏区中并且通过使用导电薄膜作为掩模来蚀刻导电薄膜而形成栅电极。

29. 发明申请

US20070111411A1 THIN FILM TRANSISTOR SUBSTRATE AND MANUFACTURING METHOD FOR THE SAME 有权
标题翻译：薄膜晶体管基板及其制造方法
公开(公告)号：US20070111411A1
公开(公告)日：2007-05-17
申请号：US11420621
申请日：2006-05-26
申请人： Kazushige Hotta
发明人： Kazushige Hotta
IPC分类号： H01L21/84 , H01L31/113
CPC分类号： H01L27/1251 , G02F1/13454 , G02F1/1368 , H01L27/1214 , H01L27/127 , H01L29/42384 , H01L29/78621
摘要： A thin film transistor substrate is provided whose structure allows for the formation of (i) a thick gate insulating film, (ii) a high pressure resistance TFT having a LDD region of a GOLD structure, and (iii) a low voltage TFT having a thin gate insulating film, with less number of production steps.
摘要翻译：提供一种薄膜晶体管基板，其结构允许形成（i）厚栅极绝缘膜，（ii）具有GOLD结构的LDD区的高压电阻TFT，以及（iii）具有薄栅绝缘膜，生产步骤少。

30. 发明授权

US07161181B2 Thin film transistor device and method of manufacturing the same 有权
公开(公告)号：US07161181B2
公开(公告)日：2007-01-09
申请号：US11183383
申请日：2005-07-18
申请人： Kazushige Hotta , Hiroyuki Yaegashi , Takuya Watanabe , Tamotsu Wada
发明人： Kazushige Hotta , Hiroyuki Yaegashi , Takuya Watanabe , Tamotsu Wada
IPC分类号： H01L21/00
CPC分类号： H01L27/1288 , H01L27/1214 , H01L27/3248 , H01L29/42384 , H01L29/4908 , H01L29/66757 , H01L29/78621 , H01L2029/7863 , H01L2227/323
摘要： A polysilicon film is formed in a predetermined region on a glass substrate, and then a gate insulating film and a gate electrode, whose width is narrower than the gate insulating film, are formed thereon. Then, an interlayer insulating film and an ITO film are formed on an overall surface. Then, n-type source/drain regions having an LDD structure are formed by implanting the n-type impurity into the polysilicon film. Then, an n-type TFT forming region and a pixel-electrode forming region are covered with a resist film, and then p-type source/drain regions are formed by implanting the p-type impurity into the polysilicon film in a p-type TFT forming region. Then, the resist film is left only in the pixel-electrode forming region and the resist film is removed from other regions. A pixel electrode is formed by etching the ITO film while using the remaining resist film as a mask.

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