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    • 1. 发明授权
    • Thin film transistor device and method of manufacturing the same
    • 薄膜晶体管器件及其制造方法
    • US07859078B2
    • 2010-12-28
    • US12414273
    • 2009-03-30
    • Kazushige Hotta
    • Kazushige Hotta
    • H01L21/70
    • H01L27/1288H01L27/1214H01L27/127H01L29/4908H01L29/78621
    • A first insulating film is formed. Then, a gate electrode of a low voltage drive thin film transistor and a mask film for covering a region constituting a channel of a high voltage drive thin film transistor are formed with a molybdenum film on the first insulating film. An impurity is implanted into a semiconductor film while using the gate electrode and the mask film as a mask, thereby forming a high density impurity region. Thereafter, the impurity is activated by performing a thermal process under a condition at 500° C. and for 2 hours, for example. Subsequently, the mask film is removed and a second insulating film is formed. A gate electrode of the high voltage drive thin film transistor is formed with an aluminum alloy on the second insulating film.
    • 形成第一绝缘膜。 然后,在第一绝缘膜上形成有用于覆盖构成高电压驱动薄膜晶体管的沟道的区域的低电压驱动薄膜晶体管的栅电极和掩模膜。 在使用栅电极和掩模膜作为掩模的同时将杂质注入到半导体膜中,从而形成高浓度杂质区。 此后,通过在例如500℃的条件下进行热处理2小时使该杂质活化。 随后,去除掩模膜并形成第二绝缘膜。 高电压驱动薄膜晶体管的栅电极在第二绝缘膜上形成有铝合金。
    • 4. 发明授权
    • Thin film transistor substrate and its manufacture
    • 薄膜晶体管基板及其制造
    • US07189603B2
    • 2007-03-13
    • US11226539
    • 2005-09-14
    • Kazushige Hotta
    • Kazushige Hotta
    • H01L21/00
    • H01L27/1288H01L27/1214H01L27/127H01L29/42384H01L29/66757H01L29/78618H01L29/78675
    • A semiconductor layer with a threshold voltage for n-channel is formed and patterned to TFT island areas. A gate insulating film is deposited. The first gate electrode layer is fomed and pattered to form an opening. Phosphorous ions are implanted into a p-channel TFT in the opening to set threshold voltage for p-channel TFT. A second gate electrode layer is formed and patterned to form second gate electrodes. By using the first gate electrode layer as a mask, boron ions are implanted at a high concentration to form source/drain regions of the p-channel TFT. By using the second gate electrodes as a mask, the first gate electrode layer is etched to form gate electrodes. Phosphorous ions are implanted at a low concentration to form LDD regions. By using a fourth mask, P ions are implanted at a high concentration to form source/drain regions of n-channel TFTs.
    • 形成具有用于n沟道的阈值电压的半导体层并将其图案化到TFT岛区域。 沉积栅极绝缘膜。 第一栅极电极层被发射和图案化以形成开口。 将磷离子注入开口中的p沟道TFT,以设置p沟道TFT的阈值电压。 形成第二栅极电极层并构图以形成第二栅电极。 通过使用第一栅极电极层作为掩模,以高浓度注入硼离子以形成p沟道TFT的源极/漏极区域。 通过使用第二栅电极作为掩模,蚀刻第一栅电极层以形成栅电极。 以低浓度注入磷离子以形成LDD区。 通过使用第四掩模,以高浓度注入P离子以形成n沟道TFT的源/漏区。
    • 5. 发明申请
    • Thin film transistor substrate and production method thereof
    • 薄膜晶体管基板及其制造方法
    • US20060289870A1
    • 2006-12-28
    • US11385077
    • 2006-03-21
    • Kazushige HottaTakuya Hirano
    • Kazushige HottaTakuya Hirano
    • H01L29/04
    • H01L27/12G02F1/13454H01L27/1285H01L29/04
    • A method for producing a thin film transistor substrate includes the steps of: (i) depositing an amorphous semiconductor film on a transparent insulating substrate; (ii) patterning the amorphous semiconductor film so as to form insular amorphous semiconductor films, the step (ii) including a process (I) for forming, in respective stripe areas each of which is elongate in a first direction in a display area, a plurality of insular semiconductor films whose channel length is in line with the first direction, and a process (II) for forming, in an area including extended portions of the striped areas in a peripheral circuit area, a plurality of insular semiconductor films; (iii) polycrystallizing the insular semiconductor films in the peripheral circuit area so that the insular semiconductor films have high mobility in a second direction and polycrystallizing the insular semiconductor films in the display area so that the insular semiconductor films have high mobility in the first direction; and (iv) forming TFTs by using polycrystalline insular semiconductor films. In at least one peripheral circuit, a channel of a high speed TFT is positioned on a portion other than the extended portions of the stripe areas.
    • 一种制造薄膜晶体管基板的方法包括以下步骤:(i)在透明绝缘基板上沉积非晶半导体膜; (ii)对非晶半导体膜进行图形化以形成非晶半导体非晶半导体膜,步骤(ii)包括在显示区域中沿着第一方向细长的各个条带区域中形成用于形成的工序(I), 多个岛状半导体膜,其通道长度与第一方向一致;以及在包括外围电路区域中的条纹区域的延伸部分的区域中形成多个岛状半导体膜的工艺(II) (iii)使外围电路区域中的岛状半导体膜多晶化,使得岛状半导体膜在第二方向上具有高迁移率,并使显示区域中的岛状半导体膜多晶化,使得岛状半导体膜在第一方向上具有高迁移率; 和(iv)通过使用多晶的半导体膜形成TFT。 在至少一个外围电路中,高速TFT的通道位于除了区域的延伸部分之外的部分上。