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11. 发明申请

US20130260021A1 Electron Transport in Hexacyanometallate Electrode for Electrochemical Applications 有权
标题翻译：用于电化学应用的六氰基金属酸盐电极中的电子传输
公开(公告)号：US20130260021A1
公开(公告)日：2013-10-03
申请号：US13523694
申请日：2012-06-14
申请人： Yuhao Lu , Jong-Jan Lee
发明人： Yuhao Lu , Jong-Jan Lee
IPC分类号： H01B1/04 , C01C3/08 , H01M4/04 , B05D3/00 , B82Y30/00 , B82Y99/00
CPC分类号： H01B1/122 , B82Y30/00 , H01M4/0404 , H01M4/133 , H01M4/587
摘要： A structure of intimately contacting carbon-hexacyanometallate is provided for forming a metal-ion battery electrode. Several methods are provided for forming the carbon-hexacyanometallate intimate contact. These methods include (1) adding conducting carbon during the synthesis of hexacyanometallate and forming the carbon-hexacyanometallate powder prior to forming the paste for electrode printing; (2) coating with conducting carbon after hexacyanometallate powder formation and prior to forming the paste for electrode printing; and (3) coating a layer of conducting carbon over the hexacyanometallate electrode.
摘要翻译：为了形成金属离子电池电极，提供了紧密接触六氰基金属碳酸盐的结构。提供几种形成碳六氰基金属酸盐紧密接触的方法。这些方法包括（1）在合成六氰基金属盐酸盐期间加入导电碳，并在形成用于电极印刷的糊料之前形成碳 - 六金属金属酸盐粉末; （2）在六金属金属酸盐粉末形成之后，在形成用于电极印刷的糊料之前用导电碳涂覆; 和（3）在六氰基金属盐电极上涂覆一层导电碳。

12. 发明申请

US20130257389A1 Supercapacitor with Hexacyanometallate Cathode, Activated Carbone Anode, and Aqueous Electrolyte 有权
标题翻译：超级电容器与六氰基金属阴极，活性炭骨阳极和水电解质
公开(公告)号：US20130257389A1
公开(公告)日：2013-10-03
申请号：US13603322
申请日：2012-09-04
申请人： Yuhao Lu , Sean Andrew Vail , Hidayat Kisdarjono , Jong-Jan Lee
发明人： Yuhao Lu , Sean Andrew Vail , Hidayat Kisdarjono , Jong-Jan Lee
IPC分类号： H01G9/155 , H01G9/00 , H02J7/00
CPC分类号： H01G11/30 , Y02E60/13 , Y10T29/417
摘要： A supercapacitor is provided with a method for fabricating the supercapacitor. The method provides dried hexacyanometallate particles having a chemical formula AmM1xM2y(CN)6.pH2O with a Prussian Blue hexacyanometallate, crystal structure, where A is an alkali or alkaline-earth cation, and M1 and M2 are metals with 2+ or 3+ valance positions. The variable m is in the range of 0.5 to 2, x is in the range of 0.5 to 1.5, y is in the range of 0.5 to 1.5, and p is in the range of 0 to 6. The hexacyanometallate particles are mixed with a binder and electronic conductor powder, to form a cathode comprising AmM1xM2y(CN)6.pH2O. The method also forms an activated carbon anode and a membrane separating the cathode from the anode, permeable to A and A′ cations. Finally, an electrolyte is added with a metal salt including A′ cations. The electrolyte may be aqueous.
摘要翻译：超级电容器具有制造超级电容器的方法。该方法提供具有化学式AmM1xM2y（CN）6.pH2O的干燥的六氰基金属盐颗粒与普鲁士蓝六氰基金属酸盐晶体结构，其中A是碱金属或碱土金属阳离子，M1和M2是具有2+或3+价态的金属职位变量m在0.5至2的范围内，x在0.5至1.5的范围内，y在0.5至1.5的范围内，p在0至6的范围内。六氰基金属盐颗粒与粘合剂和电子导体粉末，以形成包含AmM1xM2y（CN )6pH2O的阴极。该方法还形成活性炭阳极和将阴极与阳极分开的膜，其可透过A和A'阳离子。最后，向电解质中加入包含A'阳离子的金属盐。电解质可以是水性的。

13. 发明申请

US20140231832A1 THREE-TERMINAL LIGHT EMITTING DEVICE (LED) WITH BUILT-IN ELECTROSTATIC DISCHARGE (ESD) PROTECTION DEVICE 有权
标题翻译：具有内置静电放电（ESD）保护装置的三端发光器件（LED）
公开(公告)号：US20140231832A1
公开(公告)日：2014-08-21
申请号：US13773414
申请日：2013-02-21
申请人： Jong-Jan Lee
发明人： Jong-Jan Lee
IPC分类号： H01L27/15 , H01L33/42
CPC分类号： H01L23/552 , H01L27/15 , H01L27/156 , H01L33/42 , H01L33/48 , H01L2924/0002 , H01L2924/00
摘要： A three-terminal light emitting device (LED) chip, associated fabrication method, and LED array are provided. The method forms an n-doped semiconductor layer overlying a substrate, an active semiconductor layer overlying the n-doped semiconductor layer, and a p-doped semiconductor layer overlying the active semiconductor layer. A trench is formed through the p-doped and active semiconductor layers, exposing the n-doped semiconductor layer. In one aspect, the trench is formed at least part way, but not completely, through the n-doped semiconductor layer. Then, an LED P electrode is formed overlying a first region of the p-doped semiconductor layer, a diode P electrode is formed overlying a second region of the p-doped semiconductor layer that is separated from the first region of the p-doped semiconductor layer by the trench, and an N electrode is formed overlying a top surface of the exposed n-doped semiconductor layer in the trench, shared by the LED and diode.
摘要翻译：提供三端子发光器件（LED）芯片，相关制造方法和LED阵列。该方法形成覆盖衬底的n掺杂半导体层，覆盖n掺杂半导体层的有源半导体层和覆盖有源半导体层的p掺杂半导体层。通过p掺杂和有源半导体层形成沟槽，暴露n掺杂半导体层。在一个方面中，通过n掺杂半导体层至少部分地形成沟槽，但不完全形成沟槽。然后，在p掺杂半导体层的第一区域上形成LED P电极，形成二极管P电极，覆盖从p掺杂半导体层的第一区域分离的p掺杂半导体层的第二区域并且N沟道电极被形成在由LED和二极管共享的沟槽中的暴露的n掺杂半导体层的顶表面上。

14. 发明申请

US20100102366A1 Integrated Infrared and Color CMOS Imager Sensor 有权
标题翻译：集成红外和彩色CMOS成像传感器
公开(公告)号：US20100102366A1
公开(公告)日：2010-04-29
申请号：US12258347
申请日：2008-10-24
申请人： Jong-Jan Lee , Douglas J. Tweet , Jon M. Speigle
发明人： Jong-Jan Lee , Douglas J. Tweet , Jon M. Speigle
IPC分类号： H01L31/112 , H01L31/18
CPC分类号： H01L27/14645 , H01L27/14609 , H01L27/14621 , H01L27/1463
摘要： An integrated infrared (IR) and full color complementary metal oxide semiconductor (CMOS) imager array is provided. The array is built upon a lightly doped p doped silicon (Si) substrate. Each pixel cell includes at least one visible light detection pixel and an IR pixel. Each visible light pixel includes a moderately p doped bowl with a bottom p doped layer and p doped sidewalls. An n doped layer is enclosed by the p doped bowl, and a moderately p doped surface region overlies the n doped layer. A transfer transistor has a gate electrode overlying the p doped sidewalls, a source formed from the n doped layer, and an n+ doped drain connected to a floating diffusion region. The IR pixel is the same, except that there is no bottom p doped layer. An optical wavelength filter overlies the visible light and IR pixels.
摘要翻译：提供集成红外（IR）和全色互补金属氧化物半导体（CMOS）成像器阵列。阵列建立在轻掺杂的p掺杂硅（Si）衬底上。每个像素单元包括至少一个可见光检测像素和IR像素。每个可见光像素包括具有底部p掺杂层和p掺杂侧壁的中等P掺杂的碗。 n掺杂层被p掺杂的碗封闭，并且中等P掺杂的表面区域覆盖在n掺杂层上。传输晶体管具有覆盖p掺杂侧壁的栅电极，由n掺杂层形成的源和连接到浮置扩散区的n +掺杂漏极。 IR像素是相同的，除了没有底部p掺杂层。光学波长滤光器覆盖可见光和IR像素。

15. 发明授权

US07675056B2 Germanium phototransistor with floating body 有权
标题翻译：具有浮体的锗光电晶体管
公开(公告)号：US07675056B2
公开(公告)日：2010-03-09
申请号：US11891574
申请日：2007-08-10
申请人： Jong-Jan Lee , Sheng Teng Hsu , Jer-Shen Maa , Douglas J. Tweet
发明人： Jong-Jan Lee , Sheng Teng Hsu , Jer-Shen Maa , Douglas J. Tweet
IPC分类号： H01L29/06 , H01L31/072 , H01L31/109 , H01L31/0328 , H01L31/062 , H01L31/113 , H01L31/0232
CPC分类号： H01L31/1136 , H01L31/028 , H01L31/1808 , Y02E10/547
摘要： A floating body germanium (Ge) phototransistor and associated fabrication process are presented. The method includes: providing a silicon (Si) substrate; selectively forming an insulator layer overlying the Si substrate; forming an epitaxial Ge layer overlying the insulator layer using a liquid phase epitaxy (LPE) process; forming a channel region in the Ge layer; forming a gate dielectric, gate electrode, and gate spacers overlying the channel region; and, forming source/drain regions in the Ge layer. The LPE process involves encapsulating the Ge with materials having a melting temperature greater than a first temperature, and melting the Ge using a temperature lower than the first temperature. The LPE process includes: forming a dielectric layer overlying deposited Ge; melting the Ge; and, in response to cooling the Ge, laterally propagating an epitaxial growth front into the Ge from an underlying Si substrate surface.
摘要翻译：提出了一种浮体锗（Ge）光电晶体管及其制造工艺。该方法包括：提供硅（Si）衬底; 选择性地形成覆盖Si衬底的绝缘体层; 使用液相外延（LPE）工艺形成覆盖绝缘体层的外延Ge层; 在Ge层中形成沟道区; 形成覆盖所述沟道区的栅极电介质，栅电极和栅极间隔; 并且在Ge层中形成源/漏区。 LPE工艺包括用具有大于第一温度的熔化温度的材料包封Ge，并且使用低于第一温度的温度来熔化Ge。 LPE工艺包括：形成覆盖沉积Ge的介电层; 融化Ge; 并且响应于冷却Ge，将外延生长前沿从下面的Si衬底表面横向传播到Ge中。

16. 发明授权

US07608874B2 Fully isolated photodiode stack 失效
标题翻译：全隔离光电二极管堆叠
公开(公告)号：US07608874B2
公开(公告)日：2009-10-27
申请号：US11657152
申请日：2007-01-24
申请人： Jong-Jan Lee , Douglas J. Tweet , Sheng Teng Hsu
发明人： Jong-Jan Lee , Douglas J. Tweet , Sheng Teng Hsu
IPC分类号： H01L31/062 , H01L31/113
CPC分类号： H01L27/14647 , H01L27/1463 , H01L27/14689
摘要： An array of fully isolated multi-junction complimentary metal-oxide-semiconductor (CMOS) filterless color imager cells is provided, together with an associated fabrication method. The method provides a bulk silicon (Si) substrate. A plurality of color imager cells are formed, either in the Si substrate, or in a single epitaxial Si layer formed over the substrate. Each color imager cell includes a photodiode set with a first, second, and third photodiode formed as a stacked multi-junction structure. A U-shaped (in cross-section) well liner, fully isolates the photodiode set from adjacent photodiode sets in the array. For example, each photodiode is formed from a p doped Si layer physically interfaced to a first wall. A well bottom physically interfaces to the first wall, and the p doped Si layer of the third, bottom-most, photodiode is part of the well bottom. Then, the photodiode sets may be formed from an n/p/n/p/n/p or n/p/p−/p/p−/p layered structure.
摘要翻译：提供了完全隔离的多结互补金属氧化物半导体（CMOS）无滤膜彩色成像器单元的阵列，以及相关的制造方法。该方法提供体硅（Si）衬底。在Si衬底中或在衬底上形成的单个外延Si层中形成多个彩色成像器单元。每个彩色成像器单元包括具有形成为堆叠多结结构的第一，第二和第三光电二极管。 U形（横截面）井衬管，将阵列中的光电二极管组与相邻的光电二极管组完全隔离。例如，每个光电二极管由物理上与第一壁物理连接的p掺杂Si层形成。阱底部与第一壁物理接口，第三，最底部的光电二极管的p掺杂Si层是阱底部的一部分。然后，光电二极管组可以由n / p / n / p / n / p或n / p / p / p / p / p层叠结构形成。

17. 发明授权

US07438759B2 Ambient environment nanowire sensor 失效
公开(公告)号：US07438759B2
公开(公告)日：2008-10-21
申请号：US11264113
申请日：2005-11-01
申请人： Fengyan Zhang , Robert A. Barrowcliff , Jong-Jan Lee , Sheng Teng Hsu
发明人： Fengyan Zhang , Robert A. Barrowcliff , Jong-Jan Lee , Sheng Teng Hsu
IPC分类号： C30B1/02
CPC分类号： B81C1/00182 , B81B2201/0214 , Y10S977/712 , Y10S977/762
摘要： An ambient environment nanowire sensor and corresponding fabrication method have been provided. The method includes: forming a substrate such as Silicon (Si) or glass; growing nanowires; depositing an insulator layer overlying the nanowires; etching to expose tips of the nanowires; forming a patterned metal electrode, with edges, overlying the tips of the nanowires; and, etching to expose the nanowires underlying the electrode edges. The nanowires can be a material such as IrO2, TiO2, InO, ZnO, SnO2, Sb2O3, or In2O3, to mane just a few examples. The insulator layer can be a spin-on glass (SOG) or low-k dielectric. In one aspect, the resultant structure includes exposed nanowires grown from the doped substrate regions and an insulator core with embedded nanowires. In a different aspect, the method forms a growth promotion layer overlying the substrate. The resultant structure includes exposed nanowires grown from the selectively formed growth promotion layer.

18. 发明授权

US07351995B2 Floating body germanium phototransistor having a photo absorption threshold bias region 有权
标题翻译：具有光吸收阈值偏置区域的浮体锗光电晶体管
公开(公告)号：US07351995B2
公开(公告)日：2008-04-01
申请号：US11894938
申请日：2007-08-22
申请人： Sheng Teng Hsu , Jong-Jan Lee , Jer-Shen Maa , Douglas J. Tweet
发明人： Sheng Teng Hsu , Jong-Jan Lee , Jer-Shen Maa , Douglas J. Tweet
IPC分类号： H01L29/06 , H01L31/072 , H01L31/109 , H01L31/0328 , H01L31/062 , H01L31/113 , H01L31/0232
CPC分类号： H01L31/1136
摘要： A floating body germanium (Ge) phototransistor with a photo absorption threshold bias region, and an associated fabrication process are presented. The method includes: providing a p-doped Silicon (Si) substrate; selectively forming an insulator layer overlying a first surface of the Si substrate; forming an epitaxial Ge layer overlying the insulator layer; forming a channel region in the Ge layer; forming a gate dielectric, gate electrode, and gate spacers; forming source/drain (S/D) regions in the Ge layer; and, forming a photo absorption threshold bias region in the Ge layer, adjacent the channel region. In one aspect, the second S/D region has a length, longer than the first S/D length. The photo absorption threshold bias region underlies the second S/D region. Alternately, the second S/D region is separated from the channel by an offset, and the photo absorption threshold bias region is the offset in the Ge layer, after a light p-doping.
摘要翻译：提出了具有光吸收阈值偏置区域的浮体锗（Ge）光电晶体管，以及相关的制造工艺。该方法包括：提供p掺杂硅（Si）衬底; 选择性地形成覆盖在所述Si衬底的第一表面上的绝缘体层; 形成覆盖绝缘体层的外延Ge层; 在Ge层中形成沟道区; 形成栅极电介质，栅电极和栅极间隔物; 在Ge层中形成源极/漏极（S / D）区域; 并且在Ge层中形成邻近沟道区的光吸收阈值偏置区域。在一个方面，第二S / D区域具有比第一S / D长度更长的长度。光吸收阈值偏置区域位于第二S / D区域的下方。或者，第二S / D区域与沟道分离偏移，光吸收阈值偏置区域是在光p掺杂之后的Ge层中的偏移。

19. 发明申请

US20070290288A1 Floating body germanium phototransistor having a photo absorption threshold bias region 有权
标题翻译：具有光吸收阈值偏置区域的浮体锗光电晶体管
公开(公告)号：US20070290288A1
公开(公告)日：2007-12-20
申请号：US11894938
申请日：2007-08-22
申请人： Sheng Hsu , Jong-Jan Lee , Jer-Shen Maa , Douglas Tweet
发明人： Sheng Hsu , Jong-Jan Lee , Jer-Shen Maa , Douglas Tweet
IPC分类号： H01L31/10
CPC分类号： H01L31/1136
摘要： A floating body germanium (Ge) phototransistor with a photo absorption threshold bias region, and an associated fabrication process are presented. The method includes: providing a p-doped Silicon (Si) substrate; selectively forming an insulator layer overlying a first surface of the Si substrate; forming an epitaxial Ge layer overlying the insulator layer; forming a channel region in the Ge layer; forming a gate dielectric, gate electrode, and gate spacers; forming source/drain (S/D) regions in the Ge layer; and, forming a photo absorption threshold bias region in the Ge layer, adjacent the channel region. In one aspect, the second S/D region has a length, longer than the first S/D length. The photo absorption threshold bias region underlies the second S/D region. Alternately, the second S/D region is separated from the channel by an offset, and the photo absorption threshold bias region is the offset in the Ge layer, after a light p-doping.
摘要翻译：提出了具有光吸收阈值偏置区域的浮体锗（Ge）光电晶体管，以及相关的制造工艺。该方法包括：提供p掺杂硅（Si）衬底; 选择性地形成覆盖在所述Si衬底的第一表面上的绝缘体层; 形成覆盖绝缘体层的外延Ge层; 在Ge层中形成沟道区; 形成栅极电介质，栅电极和栅极间隔物; 在Ge层中形成源极/漏极（S / D）区域; 并且在Ge层中形成邻近沟道区的光吸收阈值偏置区域。在一个方面，第二S / D区域具有比第一S / D长度更长的长度。光吸收阈值偏置区域位于第二S / D区域的下方。或者，第二S / D区域与沟道分离偏移，光吸收阈值偏置区域是在光p掺杂之后的Ge层中的偏移。

20. 发明申请

US20070218579A1 Wide output swing CMOS imager 审中-公开
标题翻译：宽输出摆幅CMOS成像器
公开(公告)号：US20070218579A1
公开(公告)日：2007-09-20
申请号：US11416742
申请日：2006-05-03
申请人： Jong-Jan Lee , Sheng Hsu
发明人： Jong-Jan Lee , Sheng Hsu
IPC分类号： H01L21/00
CPC分类号： H01L27/14647 , H01L27/14603 , H01L27/14632 , H01L27/14645 , H01L27/14683 , H01L27/14689
摘要： A CMOS active pixel sensor (APS) imager cell is provided on a silicon-on-insulator (SOI) substrate. The APS imager cell is made from a SOI substrate including a silicon (Si) substrate, a silicon dioxide insulator overlying the substrate, and a Si top layer overlying the insulator. A pixel sensor cell including a photodiode is formed in the Si top layer of the SOI substrate. A pixel transistor set is formed in the SOI top Si layer and connected to the pixel sensor cell. The pixel transistor set includes at least one p-channel MOS (PMOS) transistor and at least one n-channel MOS (NMOS) transistor. In the case of a three-transistor (3T) pixel transistor set, the selected transistor is NMOS, the reset transistor is PMOS, and the source follower may be either NMOS or PMOS.
摘要翻译：在绝缘体上硅（SOI）衬底上提供CMOS有源像素传感器（APS）成像器单元。 APS成像器单元由包括硅（Si）衬底，覆盖衬底的二氧化硅绝缘体和覆盖绝缘体的Si顶层的SOI衬底制成。在SOI衬底的Si顶层中形成包括光电二极管的像素传感器单元。像素晶体管组形成在SOI顶部Si层中并连接到像素传感器单元。像素晶体管组包括至少一个p沟道MOS（PMOS）晶体管和至少一个n沟道MOS（NMOS）晶体管。在三晶体管（3T）像素晶体管组的情况下，所选择的晶体管是NMOS，复位晶体管是PMOS，源极跟随器可以是NMOS或PMOS。

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