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11. 发明申请

US20130071989A1 SINGLE-SIDED NON-NOBLE METAL ELECTRODE HYBRID MIM STACK FOR DRAM DEVICES 有权
标题翻译：用于DRAM器件的单面非金属电极混合MIM堆叠
公开(公告)号：US20130071989A1
公开(公告)日：2013-03-21
申请号：US13238349
申请日：2011-09-21
申请人： Wim Deweerd , Hanhong Chen , Xiangxin Rui , Hiroyuki Ode
发明人： Wim Deweerd , Hanhong Chen , Xiangxin Rui , Hiroyuki Ode
IPC分类号： H01L21/02
CPC分类号： H01L28/40 , H01L27/1085 , H01L28/60
摘要： A method for forming a DRAM MIM capacitor stack having low leakage current and low EOT involves the use of a first electrode that serves as a template for promoting the high k phase of a subsequently deposited first dielectric layer. The first high k dielectric layer comprises a doped material that can be crystallized after a subsequent annealing treatment. An amorphous, doped high k second dielectric material is form on the first dielectric layer. The dopant concentration and the thickness of the second dielectric layer are chosen such that the second dielectric layer remains amorphous after a subsequent annealing treatment. A second electrode layer compatible with the second dielectric layer is formed on the second dielectric layer.
摘要翻译：用于形成具有低漏电流和低EOT的DRAM MIM电容器堆叠的方法涉及使用用作促进随后沉积的第一介电层的高k相的模板的第一电极。第一高k电介质层包括可以在随后的退火处理后结晶的掺杂材料。在第一介电层上形成非晶掺杂的高k第二介电材料。选择掺杂剂浓度和第二介电层的厚度，使得第二电介质层在随后的退火处理之后保持无定形。与第二电介质层相容的第二电极层形成在第二电介质层上。

12. 发明申请

US20130052792A1 HIGH PERFORMANCE DIELECTRIC STACK FOR DRAM CAPACITOR 有权
标题翻译：用于DRAM电容器的高性能电介质堆叠
公开(公告)号：US20130052792A1
公开(公告)日：2013-02-28
申请号：US13220460
申请日：2011-08-29
申请人： Sandra Malhotra , Wim Deweerd , Hanhong Chen , Xiangxin Rui , Hiroyuki Ode , Mitsuhiro Horikawa , Kenichi Koyanagi
发明人： Sandra Malhotra , Wim Deweerd , Hanhong Chen , Xiangxin Rui , Hiroyuki Ode , Mitsuhiro Horikawa , Kenichi Koyanagi
IPC分类号： H01L21/02
CPC分类号： H01L28/60 , H01L28/40 , H01L28/75
摘要： A method for fabricating a DRAM capacitor stack is described wherein the dielectric material is a multi-layer stack formed from a highly-doped material combined with a lightly or non-doped material. The highly-doped material remains amorphous with a crystalline content of less than 30% after an annealing step. The lightly or non-doped material becomes crystalline with a crystalline content of equal to or greater than 30% after an annealing step. The dielectric multi-layer stack maintains a high k-value while minimizing the leakage current and the EOT value.
摘要翻译：描述了制造DRAM电容器堆叠的方法，其中电介质材料是由与轻掺杂或非掺杂材料组合的高掺杂材料形成的多层叠层。在退火步骤之后，高掺杂材料保持无定形，结晶含量小于30％。在退火步骤之后，轻掺杂或非掺杂材料变成结晶含量等于或大于30％的晶体。电介质多层堆叠保持高的k值，同时使漏电流和EOT值最小化。

13. 发明授权

US08574985B2 Methods for depositing high-K dielectrics 有权
标题翻译：沉积高K电介质的方法
公开(公告)号：US08574985B2
公开(公告)日：2013-11-05
申请号：US13039819
申请日：2011-03-03
申请人： Xiangxin Rui , Sunil Shanker , Sandra Malhotra , Imran Hashim , Edward Haywood
发明人： Xiangxin Rui , Sunil Shanker , Sandra Malhotra , Imran Hashim , Edward Haywood
IPC分类号： H01L21/8242
CPC分类号： H01L21/3141 , C23C16/02 , C23C16/405 , H01L21/02186 , H01L21/02271 , H01L21/02315 , H01L21/31604 , H01L28/91
摘要： Methods for depositing high-K dielectrics are described, including depositing a first electrode on a substrate, wherein the first electrode is chosen from the group consisting of platinum and ruthenium, applying an oxygen plasma treatment to the exposed metal to reduce the contact angle of a surface of the metal, and depositing a titanium oxide layer on the exposed metal using at least one of a chemical vapor deposition process and an atomic layer deposition process, wherein the titanium oxide layer comprises at least a portion rutile titanium oxide.
摘要翻译：描述了沉积高K电介质的方法，包括在衬底上沉积第一电极，其中第一电极选自铂和钌，对暴露的金属施加氧等离子体处理以减小接触角并且使用化学气相沉积工艺和原子层沉积工艺中的至少一种将氧化钛层沉积在暴露的金属上，其中所述氧化钛层包含至少一部分金红石型氧化钛。

14. 发明授权

US08202808B2 Methods of forming strontium titanate films 有权
标题翻译：形成钛酸锶薄膜的方法
公开(公告)号：US08202808B2
公开(公告)日：2012-06-19
申请号：US12793611
申请日：2010-06-03
申请人： Laura M. Matz , Xiangxin Rui , Xinjian Lei , Sunil Shanker , Moo-Sung Kim , Iain Buchanan
发明人： Laura M. Matz , Xiangxin Rui , Xinjian Lei , Sunil Shanker , Moo-Sung Kim , Iain Buchanan
IPC分类号： H01L21/285
CPC分类号： C23C16/45531 , C23C16/409 , H01L21/02197 , H01L21/0228 , H01L21/02356 , H01L21/3142 , H01L21/31691 , H01L28/56
摘要： Embodiments of the current invention include methods of forming a strontium titanate (SrTiO3) film using atomic layer deposition (ALD). More particularly, the method includes forming a plurality of titanium oxide (TiO2) unit films using ALD and forming a plurality of strontium oxide (SrO) unit films using ALD. The combined thickness of the TiO2 and SrO unit films is less than approximately 5 angstroms. The TiO2 and SrO units films are then annealed to form a strontium titanate layer.
摘要翻译：本发明的实施方案包括使用原子层沉积（ALD）形成钛酸锶（SrTiO 3）膜的方法。更具体地说，该方法包括使用ALD形成多个氧化钛（TiO 2）单元膜并使用ALD形成多个氧化锶（SrO）单元膜。 TiO 2和SrO单元膜的组合厚度小于约5埃。然后将TiO 2和SrO单元膜退火以形成钛酸锶层。

15. 发明授权

US08415657B2 Enhanced work function layer supporting growth of rutile phase titanium oxide 有权
公开(公告)号：US08415657B2
公开(公告)日：2013-04-09
申请号：US12942238
申请日：2010-11-09
申请人： Xiangxin Rui , Pragati Kumar , Hanhong Chen , Sandra Malhotra
发明人： Xiangxin Rui , Pragati Kumar , Hanhong Chen , Sandra Malhotra
IPC分类号： H01L29/06 , H01L29/10 , H01L23/48 , H01L23/52 , H01L21/00
CPC分类号： H01L21/02 , B82Y99/00 , C01G23/047 , C01P2002/72 , C23C16/0272 , C23C16/34 , C23C16/405 , C23C16/45525 , H01L21/02186 , H01L21/0228 , H01L27/1085 , H01L28/40
摘要： This disclosure provides a method of fabricating a semiconductor stack and associated device, such as a capacitor and DRAM cell. In particular, a bottom electrode has a material selected for lattice matching characteristics. This material may be created from a relatively inexpensive metal oxide which is processed to adopt a conductive, but difficult-to-produce oxide state, with specific crystalline form; to provide one example, specific materials are disclosed that are compatible with the growth of rutile phase titanium dioxide (TiO2) for use as a dielectric, thereby leading to predictable and reproducible higher dielectric constant and lower effective oxide thickness and, thus, greater part density at lower cost.

16. 发明授权

US08354702B1 Inexpensive electrode materials to facilitate rutile phase titanium oxide 失效
公开(公告)号：US08354702B1
公开(公告)日：2013-01-15
申请号：US12708848
申请日：2010-02-19
申请人： Sunil Shanker , Xiangxin Rui , Pragati Kumar , Hanhong Chen , Toshiyuki Hirota
发明人： Sunil Shanker , Xiangxin Rui , Pragati Kumar , Hanhong Chen , Toshiyuki Hirota
IPC分类号： H01L27/108 , H01L29/76 , H01L29/94 , H01L31/119
CPC分类号： C01G23/07 , C01G39/02 , H01L27/10808 , H01L27/10852 , H01L28/75
摘要： This disclosure provides a method of fabricating a semiconductor stack and associated device, such as a capacitor and DRAM cell. In particular, a bottom electrode has a material selected for lattice matching characteristics. This material may be created from a relatively inexpensive metal oxide which is processed to adopt a conductive, but difficult-to-produce oxide state, with specific crystalline form; to provide one example, specific materials are disclosed that are compatible with the growth of rutile phase titanium dioxide (TiO2) for use as a dielectric, thereby leading to predictable and reproducible higher dielectric constant and lower effective oxide thickness and, thus, greater part density at lower cost.

17. 发明申请

US20120235276A1 ELECTRODE TREATMENTS FOR ENHANCED DRAM PERFORMANCE 审中-公开
标题翻译：用于增强DRAM性能的电极处理
公开(公告)号：US20120235276A1
公开(公告)日：2012-09-20
申请号：US13051531
申请日：2011-03-18
申请人： Xiangxin Rui , Hanhong Chen , Edward Haywood , Sandra Malhotra , Takashi Arao , Naonori Fujiwara , Toshiyuki Hirota , Takakazu Kiyomura , Kenichi Koyanagi
发明人： Xiangxin Rui , Hanhong Chen , Edward Haywood , Sandra Malhotra , Takashi Arao , Naonori Fujiwara , Toshiyuki Hirota , Takakazu Kiyomura , Kenichi Koyanagi
IPC分类号： H01L29/02 , H01L21/02
CPC分类号： H01L28/60 , H01L21/02 , H01L27/1085 , H01L28/40
摘要： A method for fabricating a dynamic random access memory capacitor is disclosed. The method may comprise depositing a first titanium nitride (TiN) electrode; creating a first layer of titanium dioxide (TiO2) on the first TiN electrode; depositing a dielectric material on the first layer of titanium dioxide; and depositing a second TiN electrode on the dielectric material.
摘要翻译：公开了一种用于制造动态随机存取存储器电容器的方法。该方法可以包括沉积第一氮化钛（TiN）电极; 在第一TiN电极上形成第一层二氧化钛（TiO 2）; 在第一层二氧化钛上沉积电介质材料; 以及在所述电介质材料上沉积第二TiN电极。

18. 发明申请

US20120156889A1 METHODS FOR FORMING HIGH-K CRYSTALLINE FILMS AND RELATED DEVICES 有权
标题翻译：用于形成高K晶体薄膜和相关器件的方法
公开(公告)号：US20120156889A1
公开(公告)日：2012-06-21
申请号：US13334618
申请日：2011-12-22
申请人： Hanhong Chen , Edward Haywood , Pragati Kumar , Sandra Malhotra , Xiangxin Rui
发明人： Hanhong Chen , Edward Haywood , Pragati Kumar , Sandra Malhotra , Xiangxin Rui
IPC分类号： H01L21/316
CPC分类号： H01L28/40 , H01L21/02186 , H01L21/02189 , H01L21/0228 , H01L28/56 , H01L28/60
摘要： This disclosure provides a method of fabricating a semiconductor stack and associated device, such as a capacitor or DRAM cell. In such a device, a high-K zirconia-based layer may be used as the primary dielectric together with a relatively inexpensive metal electrode based on titanium nitride. To prevent corruption of the electrode during device formation, a thin barrier layer can be used seal the electrode prior to the use of a high temperature process and a (high-concentration or dosage) ozone reagent (i.e., to create a high-K zirconia-based layer). In some embodiments, the barrier layer can also be zirconia-based, for example, a thin layer of doped or un-doped amorphous zirconia. Fabrication of a device in this manner facilitates formation of a device with dielectric constant of greater than 40 based on zirconia and titanium nitride, and generally helps produce less costly, increasingly dense DRAM cells and other semiconductor structures.
摘要翻译：本公开提供了制造半导体堆叠和相关联的器件（诸如电容器或DRAM单元）的方法。在这种器件中，高K氧化锆基层可以与基于氮化钛的相对廉价的金属电极一起用作主要电介质。为了防止在器件形成期间电极的损坏，可以使用薄的阻挡层，在使用高温工艺和（高浓度或剂量）的臭氧试剂之前密封电极（即，产生高K氧化锆基层）。在一些实施例中，阻挡层也可以是基于氧化锆的，例如掺杂或未掺杂的无定形氧化锆的薄层。以这种方式制造器件有助于基于氧化锆和氮化钛形成具有大于40的介电常数的器件，并且通常有助于产生更便宜的，越来越致密的DRAM电池和其它半导体结构。

19. 发明申请

US20110151136A1 METHODS FOR DEPOSITING HIGH-K DIELECTRICS 有权
标题翻译：沉积高K电介质的方法
公开(公告)号：US20110151136A1
公开(公告)日：2011-06-23
申请号：US13039819
申请日：2011-03-03
申请人： Xiangxin Rui , Sunil Shanker , Sandra Malhotra , Imran Hashim , Edward Haywood
发明人： Xiangxin Rui , Sunil Shanker , Sandra Malhotra , Imran Hashim , Edward Haywood
IPC分类号： B05D3/06 , B05D3/02 , B05D5/12
CPC分类号： H01L21/3141 , C23C16/02 , C23C16/405 , H01L21/02186 , H01L21/02271 , H01L21/02315 , H01L21/31604 , H01L28/91
摘要： Methods for depositing high-K dielectrics are described, including depositing a first electrode on a substrate, wherein the first electrode is chosen from the group consisting of platinum and ruthenium, applying an oxygen plasma treatment to the exposed metal to reduce the contact angle of a surface of the metal, and depositing a titanium oxide layer on the exposed metal using at least one of a chemical vapor deposition process and an atomic layer deposition process, wherein the titanium oxide layer comprises at least a portion rutile titanium oxide.
摘要翻译：描述了用于沉积高K电介质的方法，包括在衬底上沉积第一电极，其中第一电极选自铂和钌，对暴露的金属施加氧等离子体处理以减小接触角并且使用化学气相沉积工艺和原子层沉积工艺中的至少一种在暴露的金属上沉积氧化钛层，其中所述氧化钛层包含至少一部分金红石型氧化钛。

20. 发明授权

US08592058B2 Methods of forming strontium titanate films 失效
标题翻译：形成钛酸锶薄膜的方法
公开(公告)号：US08592058B2
公开(公告)日：2013-11-26
申请号：US12793614
申请日：2010-06-03
申请人： Laura M. Matz , Xiangxin Rui , Xinjian Lei , Sunil Shanker , Moo-Sung Kim , Iain Buchanan
发明人： Laura M. Matz , Xiangxin Rui , Xinjian Lei , Sunil Shanker , Moo-Sung Kim , Iain Buchanan
IPC分类号： B32B9/00 , B32B19/00 , H01L27/108
CPC分类号： C23C16/45531 , C23C16/409 , H01L21/02197 , H01L21/0228 , H01L21/02356 , H01L21/3142 , H01L21/31691 , H01L28/56
摘要： Embodiments of the current invention include methods of forming a strontium titanate (SrTiO3) film using atomic layer deposition (ALD). More particularly, the method includes forming a plurality of titanium oxide (TiO2) unit films using ALD and forming a plurality of strontium oxide (SrO) unit films using ALD. The combined thickness of the TiO2 and SrO unit films is less than approximately 5 angstroms. The TiO2 and SrO units films are then annealed to form a strontium titanate layer.
摘要翻译：本发明的实施方案包括使用原子层沉积（ALD）形成钛酸锶（SrTiO 3）膜的方法。更具体地说，该方法包括使用ALD形成多个氧化钛（TiO 2）单元膜并使用ALD形成多个氧化锶（SrO）单元膜。 TiO 2和SrO单元膜的组合厚度小于约5埃。然后将TiO 2和SrO单元膜退火以形成钛酸锶层。

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