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11. 发明申请

US20090129155A1 NONVOLATILE SEMICONDUCTOR STORAGE DEVICE 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US20090129155A1
公开(公告)日：2009-05-21
申请号：US12272161
申请日：2008-11-17
申请人： Yasuhiko HONDA , Takahiro SUZUKI , Masao IWAMOTO , Kiyochika KINJO
发明人： Yasuhiko HONDA , Takahiro SUZUKI , Masao IWAMOTO , Kiyochika KINJO
IPC分类号： G11C16/00 , G11C16/04 , G11C16/06
CPC分类号： G11C16/10 , G11C11/5628 , G11C29/00
摘要： A nonvolatile semiconductor storage device capable of storing a plurality of bits of data in one memory cell by assigning multivalued data having a higher-order bit selected from one of a pair of data in a first unit and a lower-order bit selected from the other of the pair of data to each threshold voltage of the memory cell, wherein in a first write operation that processes data in the first unit, the logic of one of the higher-order bit and the lower-order bit is fixed, and two pieces of multivalued data that maximize the difference between the threshold voltages are assigned, thereby storing one bit of input data in the one memory cell in a pseudo binary state, and in a second write operation that processes data in a second unit larger than the first unit, a plurality of bits of input data is stored in the one memory cell in a multivalued state, and parity data for error correction in the second unit is stored in the memory cell.
摘要翻译：一种非易失性半导体存储装置，其能够通过分配具有从第一单位中选择的一对数据中的一个中选择的高阶位的多值数据和从另一个存储单元中选择的低位位来存储多个数据位在一个存储单元中所述数据对与所述存储单元的每个阈值电压相关，其中在处理所述第一单元中的数据的第一写入操作中，所述高位和低位中的一个的逻辑被固定，并且两个分配最大化阈值电压之间的差异的多值数据，从而将一位存储单元中的一位输入数据存储在伪二进制状态，并且在第二写入操作中处理大于第一单元的第二单元中的数据输入数据的多个位以多值状态存储在一个存储单元中，第二单元中用于纠错的奇偶校验数据被存储在存储单元中。

12. 发明申请

US20090010664A1 IMAGE FORMING APPARATUS 有权
标题翻译：图像形成装置
公开(公告)号：US20090010664A1
公开(公告)日：2009-01-08
申请号：US12052331
申请日：2008-03-20
申请人： Hidemi NUKADA , Takahiro SUZUKI , Isamu ISHIKO
发明人： Hidemi NUKADA , Takahiro SUZUKI , Isamu ISHIKO
IPC分类号： G03G15/00 , G03G15/02 , G03G15/043 , G03G15/06
CPC分类号： G03G5/102 , G03G5/10 , G03G5/142 , G03G5/144 , G03G15/0266 , G03G15/043 , G03G15/5041 , G03G2215/00042 , G03G2215/00957
摘要： The invention provides an image forming apparatus having: an image holding member; an image holding member; a charging unit; a latent image-forming unit; a development unit; a measuring unit; and a control unit. The image holding member has a substrate having a surface having regular reflectance in a range of about 30% to about 95% with respect to light having a first wavelength and a subbing layer having a light transmittance of about 50% or greater per unit thickness of the layer with respect to light having the first wavelength and a photosensitive layer having absorption with respect to light having a second wavelength that is different from the first wavelength.
摘要翻译：本发明提供一种图像形成装置，具有：图像保持部件; 图像保持部件; 充电单元; 潜像形成单元; 开发单位测量单元; 和控制单元。图像保持部件具有基板，其具有相对于具有第一波长的光的约30％〜约95％的范围的规则反射率的表面，并且具有每单位厚度的光透射率为约50％以上的底层相对于具有第一波长的光的层和相对于具有不同于第一波长的第二波长的光具有吸收的感光层。

13. 发明申请

US20080043553A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF TESTING THE SAME 有权
标题翻译：半导体存储器件及其测试方法
公开(公告)号：US20080043553A1
公开(公告)日：2008-02-21
申请号：US11837722
申请日：2007-08-13
申请人： Takahiro SUZUKI , Shinya Fujisawa , Tokumasa Hara
发明人： Takahiro SUZUKI , Shinya Fujisawa , Tokumasa Hara
IPC分类号： G11C7/00
CPC分类号： G11C29/14 , G11C16/04
摘要： A semiconductor memory device includes a semiconductor memory, an auto-operation control circuit which outputs a clock signal, a sync read control circuit which outputs a sync read address in sync with the clock signal, a read control circuit which selects a read address of the semiconductor memory in accordance with an address of the sync read address, a read sense amplifier circuit which outputs a data read signal that is produced by sensing data that is read out of the semiconductor memory in accordance with the read address, and a determination circuit which compares the data read signal with an expectation value.
摘要翻译：半导体存储器件包括半导体存储器，输出时钟信号的自动操作控制电路，与时钟信号同步地输出同步读取地址的同步读取控制电路，选择读取地址的读取控制电路半导体存储器，根据同步读取地址的地址，读出读出放大器电路，其输出通过根据读取的地址感测从半导体存储器读出的数据而产生的数据读取信号;以及确定电路，将数据读取信号与期望值进行比较。

14. 发明申请

US20190289211A1 ELECTRONIC DEVICE INCLUDING POWER SUPPLY AND METHOD TO BE EXECUTED BY ELECTRONIC DEVICE INCLUDING POWER SUPPLY 审中-公开
公开(公告)号：US20190289211A1
公开(公告)日：2019-09-19
申请号：US16353765
申请日：2019-03-14
申请人： Naoto ASAKURA , Yoshitaka KIMURA , Teruyuki TAKEI , Takahiro SUZUKI
发明人： Naoto ASAKURA , Yoshitaka KIMURA , Teruyuki TAKEI , Takahiro SUZUKI
IPC分类号： H04N5/232 , H04N5/369
摘要： An electronic device includes a power supply and a power supply circuit. The power supply circuit is configured to alternately switch a state of the electronic device between a first state to supply power to another device and a second state to receive power from said another device, and stop a switching operation of the state of the electronic device when the electronic device is off, to fix the state of the electronic device to one of the first state and the second state.

15. 发明申请

US20190243288A1 TRANSFER DEVICE AND IMAGE FORMING APPARATUS INCORPORATING SAME 审中-公开
公开(公告)号：US20190243288A1
公开(公告)日：2019-08-08
申请号：US16248939
申请日：2019-01-16
申请人： Takahiro SUZUKI , Yuuji WADA , Naoto KOCHI , Shinya TANAKA
发明人： Takahiro SUZUKI , Yuuji WADA , Naoto KOCHI , Shinya TANAKA
IPC分类号： G03G15/16
摘要： A transfer device includes an intermediate transfer belt configured to bear a toner image and rotate, a transferor configured to contact the intermediate transfer belt via a recording medium and form a transfer nip, a guide configured to guide the recording medium conveyed to the transfer nip, and a pressure reducing device. The intermediate transfer belt is shaped as an endless belt. The pressure reducing device is configured to reduce pressure-contact force of the transferor against the intermediate transfer belt as the recording medium advances in the transfer nip. Therefore, a trailing end of the recording medium does not move toward the intermediate transfer belt when the trailing end of the recording medium has passed the guide.

16. 发明申请

US20120237842A1 OPTICAL SEMICONDUCTOR AND METHOD FOR PRODUCING THE SAME, OPTICAL SEMICONDUCTOR DEVICE, PHOTOCATALYST, HYDROGEN PRODUCING DEVICE, AND ENERGY SYSTEM 有权
标题翻译：光学半导体及其制造方法，光学半导体器件，光催化剂，氢生产装置和能量系统
公开(公告)号：US20120237842A1
公开(公告)日：2012-09-20
申请号：US13482301
申请日：2012-05-29
申请人： Takahiro SUZUKI , Takaiki NOMURA , Satoru TAMURA , Kazuhito HATO , Noboru TANIGUCHI , Kenichi TOKUHIRO , Nobuhiro MIYATA
发明人： Takahiro SUZUKI , Takaiki NOMURA , Satoru TAMURA , Kazuhito HATO , Noboru TANIGUCHI , Kenichi TOKUHIRO , Nobuhiro MIYATA
IPC分类号： C01G33/00 , H01M8/06 , B01J19/08 , H01L31/18
CPC分类号： C01G33/00 , C01B3/042 , C01B21/0821 , C01B2203/066 , C01P2002/72 , C01P2002/84 , H01M8/0656 , Y02E60/364 , Y02P20/128 , Y02P70/56
摘要： The method for producing the optical semiconductor of the present disclosure includes a mixing step of producing a mixture containing a reduction inhibitor and a niobium compound that contains at least oxygen in its composition; a nitriding step of nitriding the mixture by the reaction between the mixture and a nitrogen compound gas; and a washing step of isolating niobium oxynitride from the material obtained through the nitriding step by dissolving chemical species other than niobium oxynitride with a washing liquid. The optical semiconductor of the present disclosure substantially consists of niobium oxynitride having a crystal structure of baddeleyite and having a composition represented by the composition formula, NbON.
摘要翻译：本公开的光半导体的制造方法包括：混合工序，其制造含有还原抑制剂和至少含有氧的组合物的铌化合物的混合物; 通过混合物和氮化合物气体之间的反应氮化该混合物的氮化步骤; 以及从通过氮化步骤获得的材料通过用洗涤液溶解除了氮氧化铌之外的化学物质来分离氮氧化铌的洗涤步骤。本公开的光半导体基本上由具有菱铁矿晶体结构的NbO的NbO的组成式表示的组成的氮氧化铌组成。

17. 发明申请

US20110256685A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：US20110256685A1
公开(公告)日：2011-10-20
申请号：US13085999
申请日：2011-04-13
申请人： Takahiro SUZUKI , Kouta NOSAKA , Katuyuki OKAMASU , Akira MURAKAMI , Katuhiko KAWASUMI
发明人： Takahiro SUZUKI , Kouta NOSAKA , Katuyuki OKAMASU , Akira MURAKAMI , Katuhiko KAWASUMI
IPC分类号： H01L21/02 , H01L21/308
CPC分类号： H01L21/0331 , H01L27/10814 , H01L28/91
摘要： A film structure including at least one film is formed on a face of a semiconductor substrate and then a first mask with a pattern is formed on the film structure. A second mask is formed so as to cover the first mask over a bevel region. The film structure is etched using the first and second masks and thereafter the remaining first and second masks are removed away.
摘要翻译：在半导体衬底的表面上形成包括至少一个膜的膜结构，然后在膜结构上形成具有图案的第一掩模。形成第二掩模以便在斜面区域上覆盖第一掩模。使用第一和第二掩模蚀刻膜结构，此后除去剩余的第一和第二掩模。

18. 发明申请

US20110170308A1 VEHICLE HEAD LAMP 有权
标题翻译：车头灯
公开(公告)号：US20110170308A1
公开(公告)日：2011-07-14
申请号：US13004448
申请日：2011-01-11
申请人： Masao KINOSHITA , Akinori MATSUMOTO , Tomoyuki MORITANI , Takahiro SUZUKI
发明人： Masao KINOSHITA , Akinori MATSUMOTO , Tomoyuki MORITANI , Takahiro SUZUKI
IPC分类号： B60Q1/04
CPC分类号： B60Q1/076 , F21S41/162 , F21S41/255 , F21S41/321 , F21S41/338 , F21S41/36 , F21S41/365 , F21S41/43 , F21S41/47 , F21S41/60 , F21S41/689
摘要： A vehicle head lamp includes: a light source; a reflector that reflects light emitted from the light source; a condenser lens that irradiates the light reflected by the reflector forward; and a shade that blocks part of the light reflected by the reflector to obtain a desired light distribution. The shade includes a main shade that has an opening for passing overhead sign light irradiated forward and upward and a sub-shade that is provided so as to be inclined rearward and downward from an upper edge of the main shade in order to obtain a cut line of the light distribution, and the reflector has an OHS reflection area used to project part of the reflected light toward a lower surface of the sub-shade and that allows the light reflected on the lower surface to pass through the opening of the main shade as the OHS light.
摘要翻译：车头灯包括：光源; 反射从光源发射的光的反射器; 聚光透镜，其将由反射器反射的光向前照射; 以及阻挡由反射器反射的光的一部分以获得期望的光分布的阴影。遮光罩包括：主遮光板，其具有用于通过向上和向上照射的顶部标记光的开口，以及设置成从主色调的上边缘向后和向下倾斜的子遮光板，以获得切割线并且反射器具有OHS反射区域，用于将部分反射光投射到子遮光板的下表面，并且允许反射在下表面上的光通过主色调的开口作为 OHS灯。

19. 发明申请

US20180065111A1 CATALYST FOR PURIFYING EXHAUST GAS 审中-公开
公开(公告)号：US20180065111A1
公开(公告)日：2018-03-08
申请号：US15663952
申请日：2017-07-31
申请人： Yoshinori SAITO , Masahide MIURA , Seiji NAKAHIGASHI , Hiromasa SUZUKI , Takahiro SUZUKI , Kosuke IIZUKA , Minoru ITO , Ryota NAKASHIMA
发明人： Yoshinori SAITO , Masahide MIURA , Seiji NAKAHIGASHI , Hiromasa SUZUKI , Takahiro SUZUKI , Kosuke IIZUKA , Minoru ITO , Ryota NAKASHIMA
IPC分类号： B01J23/10 , B01J35/02 , B01J20/02 , B01J20/28 , B01J23/63 , B01J37/02 , B01J20/32 , B01J35/00 , B01D53/94
CPC分类号： B01J23/10 , B01D53/9445 , B01D53/945 , B01D2255/1023 , B01D2255/1025 , B01D2255/2061 , B01D2255/2063 , B01D2255/2066 , B01D2255/2092 , B01D2255/407 , B01D2255/9022 , B01D2255/908 , B01D2255/9202 , B01J20/0211 , B01J20/0225 , B01J20/28004 , B01J20/3236 , B01J23/63 , B01J35/0006 , B01J35/002 , B01J35/023 , B01J37/0244 , C01G25/00
摘要： An catalyst for purifying exhaust gas comprising an OCS material that has sufficient heat resistance and achieves a favorable balance between the oxygen storage volume and the oxygen absorption/release rate includes an catalyst for purifying exhaust, which has a substrate and a catalyst coating layer formed on the substrate, wherein the catalyst coating layer comprises a ceria-zirconia-based composite oxide having a pyrochlore structure in an amount of 5 to 100 g/L based on the volume of the substrate, the ceria-zirconia-based composite oxide has a secondary particle size (D50) of 3 μm to 7 μm, and the ceria-zirconia-based composite oxide optionally contains praseodymium.

20. 发明申请

US20130024606A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE 审中-公开
标题翻译：非易失性半导体存储器件
公开(公告)号：US20130024606A1
公开(公告)日：2013-01-24
申请号：US13428507
申请日：2012-03-23
申请人： Takahiro SUZUKI , Mami Kakoi
发明人： Takahiro SUZUKI , Mami Kakoi
IPC分类号： G06F12/00
CPC分类号： G11C11/5642 , G06F12/0246 , G11C16/0483 , G11C16/26
摘要： According to one embodiment, a nonvolatile semiconductor memory device comprises a first memory block and a second memory block, and a control circuit. In read operation, when a read target block is the first memory block, the control circuit determines whether the first memory block is single-level or multi-level according to a first flag, and stores a first determination result thereof. While the read target block is the first memory block, the control circuit reads the first memory block as single-level or multi-level according to the first determination result. When the read target block is changed from the first memory block to the second memory block, the control circuit erases the first determination result.
摘要翻译：根据一个实施例，非易失性半导体存储器件包括第一存储器块和第二存储器块以及控制电路。在读操作中，当读目标块是第一存储块时，控制电路根据第一标志确定第一存储块是单级还是多级，并存储其第一确定结果。当读取目标块是第一存储器块时，控制电路根据第一确定结果将第一存储块读取为单级或多级。当读取目标块从第一存储块改变到第二存储块时，控制电路擦除第一确定结果。

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