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11. 发明授权

US06548315B2 Manufacture method for semiconductor inspection apparatus 失效
公开(公告)号：US06548315B2
公开(公告)日：2003-04-15
申请号：US10057921
申请日：2002-01-29
申请人： Ryuji Kohno , Hideo Miura , Yoshishige Endo , Masatoshi Kanamaru , Atsushi Hosogane , Hideyuki Aoki , Naoto Ban
发明人： Ryuji Kohno , Hideo Miura , Yoshishige Endo , Masatoshi Kanamaru , Atsushi Hosogane , Hideyuki Aoki , Naoto Ban
IPC分类号： H01L2166
CPC分类号： H01L22/32 , G01R1/06711 , G01R1/06738 , G01R1/07314 , G01R3/00 , H01L23/13 , H01L2924/0002 , H01L2924/13091 , H01L2924/00
摘要： A semiconductor inspection apparatus which is possible to inspect a plurality of semiconductor devices collectively at one time, which has conventionally been difficult because of precision or the like of probes. A method of manufacturing the semiconductor inspection apparatus comprises the steps of forming a cover film on a surface of the silicon substrate and forming a plurality of probes of a polygonal cone shape or a circular cone shape through etching after patterning by photolithography, after the cover film is removed, again forming a cover film on the surface of the silicon substrate and forming a beam or a diaphragm for each probe through etching after patterning by photolithography, after the cover film is removed, again forming a cover film on the surface of the silicon substrate and forming a through hole corresponding to the probe through etching after patterning by photolithography, and after the cover film is removed, forming an insulating film on the surface of the silicon substrate, forming a metal film on a surface of the insulating film, and forming a wiring lead through etching after patterning by photolithography.

12. 发明授权

US06660541B2 Semiconductor device and a manufacturing method thereof 有权
公开(公告)号：US06660541B2
公开(公告)日：2003-12-09
申请号：US10280117
申请日：2002-10-23
申请人： Masatoshi Kanamaru , Yoshishige Endo , Takanori Aono , Ryuji Kohno , Hideyuki Aoki
发明人： Masatoshi Kanamaru , Yoshishige Endo , Takanori Aono , Ryuji Kohno , Hideyuki Aoki
IPC分类号： H01L2166
CPC分类号： H01L23/544 , H01L2223/54473 , H01L2924/0002 , H01L2924/00
摘要： A method of manufacturing a semiconductor device includes forming process of forming a semiconductor element on a semiconductor wafer and testing process of testing electrical performance of the formed semiconductor element. The testing process includes process of electrically connecting a testing apparatus to an electrode pad formed on the semiconductor element to be tested. The testing apparatus has a probe-formed substrate including a plurality of beams having probes to be electrically connected to the electrode pads. The probe-formed substrate has a first beam having at least one probe for electrically connection with the electrode pad and a second beam having a number of probes for electrical connection with the electrode pads of which number is more than the number of the electrode pads electrically connected by said first beam.

13. 发明授权

US06358762B1 Manufacture method for semiconductor inspection apparatus 失效
公开(公告)号：US06358762B1
公开(公告)日：2002-03-19
申请号：US09534302
申请日：2000-03-23
申请人： Ryuji Kohno , Hideo Miura , Yoshishige Endo , Masatoshi Kanamaru , Atsushi Hosogane , Hideyuki Aoki , Naoto Ban
发明人： Ryuji Kohno , Hideo Miura , Yoshishige Endo , Masatoshi Kanamaru , Atsushi Hosogane , Hideyuki Aoki , Naoto Ban
IPC分类号： G01R3126
CPC分类号： H01L22/32 , G01R1/06711 , G01R1/06738 , G01R1/07314 , G01R3/00 , H01L23/13 , H01L2924/0002 , H01L2924/13091 , H01L2924/00
摘要： A semiconductor inspection apparatus which is possible to inspect a plurality of semiconductor devices collectively at one time, which has conventionally been difficult because of precision or the like of probes. A method of manufacturing the semiconductor inspection apparatus comprises the steps of forming a cover film on a surface of the silicon substrate and forming a plurality of probes of a polygonal cone shape or a circular cone shape through etching after patterning by photolithography, after the cover film is removed, again forming a cover film on the surface of the silicon substrate and forming a beam or a diaphragm for each probe through etching after patterning by photolithography, after the cover film is removed, again forming a cover film on the surface of the silicon substrate and forming a through hole corresponding to the probe through etching after patterning by photolithography, and after the cover film is removed, forming an insulating film on the surface of the silicon substrate, forming a metal film on a surface of the insulating film, and forming a wiring lead through etching after patterning by photolithography.

14. 发明授权

US07018857B2 Method of manufacturing a semiconductor device including defect inspection using a semiconductor testing probe 失效
标题翻译：使用半导体测试探针制造包括缺陷检查的半导体器件的方法
公开(公告)号：US07018857B2
公开(公告)日：2006-03-28
申请号：US10459598
申请日：2003-06-12
申请人： Masatoshi Kanamaru , Takanori Aono , Tatsuya Nagata , Kenji Kawakami , Hideyuki Aoki
发明人： Masatoshi Kanamaru , Takanori Aono , Tatsuya Nagata , Kenji Kawakami , Hideyuki Aoki
IPC分类号： H01L21/66
CPC分类号： G01R1/06761 , G01R1/0735 , G01R3/00
摘要： A manufacturing method for improving the yield in a semiconductor manufacturing process and reducing the manufacturing cost produces a semiconductor device that is inexpensively manufactured and has a high reliability by reliably making contact during inspection with a suitable pressing force, while limiting damage to an electrode pad even when many inspected electrodes are inspected. A substrate used for inspection of the semiconductor device has a beam, a probe on the beam having a projecting shape for coming in contact with an electrode (electrode pad) of the semiconductor device, and a secondary electrode electrically connected to the probe through an electrically conductive member disposed on the side of the beam opposed to the side where the probe is provided. In an inspecting process, an inspecting device having a layer having many projections formed in the probe come in contact with the electrode pad of the semiconductor device.
摘要翻译：一种用于提高半导体制造工艺中的产量并降低制造成本的制造方法产生了廉价制造的半导体器件，并且通过在合适的按压力期间可靠地进行接触检查而具有高的可靠性，同时限制对电极焊盘的损伤甚至当检查了许多检查电极时。用于检查半导体器件的衬底具有光束，所述光束上的探针具有用于与半导体器件的电极（电极焊盘）接触的突出形状，以及通过电气电连接到探针的次级电极导电构件设置在与设置探针的一侧相对的梁的侧面上。在检查过程中，具有形成在探针中的具有许多突起的层的检查装置与半导体器件的电极焊盘接触。

15. 发明申请

US20050074910A1 Manufacturing method of semiconductor device 失效
标题翻译：半导体器件的制造方法
公开(公告)号：US20050074910A1
公开(公告)日：2005-04-07
申请号：US10459598
申请日：2003-06-12
申请人： Masatoshi Kanamaru , Takanori Aono , Tatsuya Nagata , Kenji Kawakami , Hideyuki Aoki
发明人： Masatoshi Kanamaru , Takanori Aono , Tatsuya Nagata , Kenji Kawakami , Hideyuki Aoki
IPC分类号： G01R31/26 , G01R1/067 , G01R1/073 , G01R3/00 , H01L21/66
CPC分类号： G01R1/06761 , G01R1/0735 , G01R3/00
摘要： A manufacturing method for improving the yield in a semiconductor manufacturing process and reducing the manufacturing cost produces a semiconductor device that is inexpensively manufactured and has a high reliability by reliably making contact during inspection with a suitable pressing force, while limiting damage to an electrode pad even when many inspected electrodes are inspected. A substrate used for inspection of the semiconductor device has a beam, a probe on the beam having a projecting shape for coming in contact with an electrode (electrode pad) of the semiconductor device, and a secondary electrode electrically connected to the probe through an electrically conductive member disposed on the side of the beam opposed to the side where the probe is provided. In an inspecting process, an inspecting device having a layer having many projections formed in the probe come in contact with the electrode pad of the semiconductor device.
摘要翻译：一种用于提高半导体制造工艺中的产量并降低制造成本的制造方法产生了廉价制造的半导体器件，并且通过在合适的按压力期间可靠地进行接触检查而具有高的可靠性，同时限制对电极焊盘的损伤甚至当检查了许多检查电极时。用于检查半导体器件的衬底具有光束，所述光束上的探针具有用于与半导体器件的电极（电极焊盘）接触的突出形状，以及通过电气电连接到探针的次级电极导电构件设置在与设置探针的一侧相对的梁的侧面上。在检查过程中，具有形成在探针中的具有许多突起的层的检查装置与半导体器件的电极焊盘接触。

16. 发明授权

US06826720B2 Testing board for semiconductor memory, method of testing semiconductor memory and method of manufacturing semiconductor memory 有权
标题翻译：用于半导体存储器的测试板，半导体存储器的测试方法和制造半导体存储器的方法
公开(公告)号：US06826720B2
公开(公告)日：2004-11-30
申请号：US09994638
申请日：2001-11-28
申请人： Iwao Suzuki , Shuji Kikuchi , Fumie Kobayashi , Hideyuki Aoki
发明人： Iwao Suzuki , Shuji Kikuchi , Fumie Kobayashi , Hideyuki Aoki
IPC分类号： G11C2900
CPC分类号： G11C29/56 , G11C29/10
摘要： A testing circuit using ALPG is mounted in a testing board in which sockets for mounting semiconductor memories as devices to be tested in the board is mounted and a volatile memory for storing a data table for generating a random pattern is provided in the testing circuit so that a test using a test pattern having no regularity is performed using the data table in addition to a test using a test pattern having regularity generated by the ALPG.
摘要翻译：使用ALPG的测试电路安装在测试板中，其中安装半导体存储器的插座作为板中要测试的器件，并且在测试电路中提供用于存储用于产生随机模式的数据表的易失性存储器，使得除了使用由ALPG生成的规则性的测试图案的测试之外，还使用数据表来执行使用不规则的测试图案的测试。

17. 发明授权

US5232418A Hydraulic actuator in automatic transmission 失效
标题翻译：液压执行器在自动变速器
公开(公告)号：US5232418A
公开(公告)日：1993-08-03
申请号：US808849
申请日：1991-12-17
申请人： Hideyuki Aoki , Kozo Kato , Yoichi Hayakawa
发明人： Hideyuki Aoki , Kozo Kato , Yoichi Hayakawa
IPC分类号： F16D25/063 , F16D25/0638 , F16D25/10 , F16H37/04 , F16H57/08 , F16H63/30
CPC分类号： F16D25/0638 , F16D21/06 , F16H57/08 , F16H63/3026 , F16H2200/0043 , F16H2200/2007 , F16H2200/2023 , F16H2200/2056 , F16H37/042
摘要： A double-acting hydraulic actuator structure for use in an automatic transmission has a two-layered structure which includes first and second frictional engagement element hydraulic actuators. The first hydraulic actuator includes a drum member and a first piston fitted hermetically and slidably in the drum member. The second hydraulic actuator is formed by the interior of the first piston and a second piston fitted hermetically and slidably mounted within the first piston. The first and second pistons are both urged toward their disengaged positions by the action of a common return spring. A second spring is provided for urging the second piston alone against the force of the return spring.
摘要翻译：用于自动变速器的双作用液压致动器结构具有包括第一和第二摩擦接合元件液压致动器的两层结构。第一液压致动器包括鼓构件和气密地可滑动地安装在鼓构件中的第一活塞。第二液压致动器由第一活塞的内部和安装在第一活塞内的气密和可滑动地安装的第二活塞形成。第一和第二活塞通过共同的复位弹簧的作用被推向其脱离位置。提供第二弹簧，用于仅抵抗复位弹簧的力推动第二活塞。

18. 发明授权

US08298652B2 Injection molding die for producing molded product having appearance surface, injection molding method for producing molded product having appearance surface, and resin molded product molded by the injection molding method 有权
标题翻译：用于制造具有外观表面的模制品的注塑模具，具有外观表面的模制产品的注射成型方法和通过注模法模制的树脂模塑制品
公开(公告)号：US08298652B2
公开(公告)日：2012-10-30
申请号：US12327126
申请日：2008-12-03
申请人： Hideyuki Aoki
发明人： Hideyuki Aoki
IPC分类号： B32B1/00 , B32B3/00 , B32B3/10
CPC分类号： B29C45/73 , B29C2045/7393 , B29L2031/3475 , Y10T428/24273 , Y10T428/24628 , Y10T428/24736 , Y10T428/24802
摘要： An injection molding die for producing a molded product having an appearance surface, an injection molding method for producing a molded product having an appearance surface, and a resin molded product molded by the injection molding method which is free from occurrence of appearance deficiency such as a flow mark or the like that is a drawback in appearance. A molten thermoplastic resin material is injected into a cavity defined by a molded product's appearance surface forming portion (4a) and a molded product's rear surface forming portion (6a) through one or more direct gates and one or more hot runners to fill the cavity with the molten resin material, thereby performing injection molding.
摘要翻译：一种用于制造具有外观表面的模制产品的注射模具，用于制造具有外观表面的模制产品的注射成型方法，以及通过注射成型方法模制的树脂模制品，该模制产品不会发生外观不足，例如流痕等是外观上的缺点。将熔融的热塑性树脂材料通过一个或多个直接浇口和一个或多个热流道注入到由模制产品的外观表面形成部分（4a）和模制产品的后表面形成部分（6a）限定的空腔中，以用熔融树脂材料，从而进行注射成型。

19. 发明授权

US07341133B2 Hydraulic circuit and hydraulic control unit for hydraulic power transmission 失效
标题翻译：液压回路和液压动力传动液压控制单元
公开(公告)号：US07341133B2
公开(公告)日：2008-03-11
申请号：US11200232
申请日：2005-08-10
申请人： Masahiko Ando , Hideyuki Aoki , Hiroyuki Tsukamoto , Akira Fukatsu , Atsushi Mori , Akira Matsuo , Hideaki Furuta
发明人： Masahiko Ando , Hideyuki Aoki , Hiroyuki Tsukamoto , Akira Fukatsu , Atsushi Mori , Akira Matsuo , Hideaki Furuta
IPC分类号： F16H61/14
CPC分类号： F16H61/143
摘要： A hydraulic power transmission is provided with a frictional engagement element as a lock-up clutch between a hydraulic power transmission chamber, housing a pump impeller and a turbine runner, and a servo oil chamber of the lock-up clutch. A lock-up oil passage that supplies lock-up hydraulic pressure to the servo oil chamber is connected to a hydraulic pressure supply circuit that is used in common with a circulation oil passage that supplies hydraulic pressure for circulation to the hydraulic power transmission chamber. An orifice is disposed in the circulation oil passage. It is thus possible to perform lock-up with different supply pressures. A common oil supply for the lock-up oil passage and the circulation oil passage is provided, for example, by disposing a converting circuit that adapts an oil passage connection to hydraulic transmissions with different types of lock-up clutches.
摘要翻译：液压动力传动装置设置有作为锁定离合器的摩擦接合元件，在液压动力传递室，容纳泵叶轮和涡轮转轮之间以及锁止离合器的伺服油室之间。向伺服油室供给锁定液压的锁止油路连接到与向液压动力传递室供给循环用的液压的循环油路共同使用的液压供给回路。在循环油通道中设置孔口。因此可以在不同的供应压力下执行锁定。提供了用于锁止油路和循环油通道的常见供油装置，例如通过设置一个转换回路，该转换回路使用不同类型的锁止离合器将油路连接件适配到液压变速器。

20. 发明授权

US06222406B1 Semiconductor integrated circuit device, semiconductor memory system and clock synchronous circuit 失效
标题翻译：半导体集成电路器件，半导体存储器系统和时钟同步电路
公开(公告)号：US06222406B1
公开(公告)日：2001-04-24
申请号：US09109181
申请日：1998-07-02
申请人： Hiromasa Noda , Masakazu Aoki , Hitoshi Tanaka , Hideyuki Aoki
发明人： Hiromasa Noda , Masakazu Aoki , Hitoshi Tanaka , Hideyuki Aoki
IPC分类号： H03K513
CPC分类号： G11C7/1084 , G11C7/1078 , G11C7/22 , G11C7/222 , H03K5/133 , H03K5/135 , H03K5/1504
摘要： A lattice-like delay circuit is configured wherein a plurality of logic gate circuits which are respectively provided with impedance elements for respectively coupling two input signals inputted to first and second input terminals and respectively form output signals obtained by inverting the input signals inputted to the first and second signals, are used so as to be disposed in lattice form in a first signal transfer direction and a second signal transfer direction. In the lattice-like delay circuit, input clock signals are successively delayed in the first signal transfer direction and thereafter inputted to the respective logic gate circuits extending from the first to the last as seen in the first signal transfer direction. Output signals are obtained from output terminals of a plurality of logic gate circuits placed in at least a plural-numbered stage as seen in the second signal transfer direction and arranged in the first signal transfer direction.
摘要翻译：格子状延迟电路被配置为其中分别设置有用于分别耦合输入到第一和第二输入端子的两个输入信号的阻抗元件的多个逻辑门电路，并且分别形成通过将输入到第一和第二输入端的输入信号反相而获得的输出信号和第二信号被使用以在第一信号传送方向和第二信号传送方向上以格子形式布置。在格子状延迟电路中，输入时钟信号在第一信号传送方向上连续延迟，然后输入到从第一信号传送方向观察的从第一到最后延伸的各个逻辑门电路。输出信号从放置在至少多个级的多个逻辑门电路的输出端获得，如在第二信号传送方向上看到的，并且以第一信号传送方向布置。

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