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11. 发明申请

WO2013177855A1 SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME 审中-公开
标题翻译：半导体结构及其形成方法
公开(公告)号：WO2013177855A1
公开(公告)日：2013-12-05
申请号：PCT/CN2012/078789
申请日：2012-07-18
申请人： TSINGHUA UNIVERSITY , WANG, Wei , WANG, Jing , GUO, Lei
发明人： WANG, Wei , WANG, Jing , GUO, Lei
IPC分类号： H01L29/04 , H01L21/335
CPC分类号： H01L29/7849 , H01L29/78603 , H01L29/78654 , H01L29/78681 , H01L29/78684
摘要： A semiconductor structure and a method for forming the same are provided. The semiconductor structure comprises: a semiconductor substrate (100); a rare earth oxide layer (200) formed on the semiconductor substrate (100); a channel region (300) formed on the rare earth oxide layer (200); and a source region (400) and a drain region (500) formed at both sides of the channel region (300) respectively, in which a relationship between a lattice constant a of the rare earth oxide layer (200) and a lattice constant b of a semiconductor material of the channel region (300) and/or the source region (400) and the drain region (500) is a = (n ± c)b, where n is an integer, c is a mismatch ratio of lattice constants, and 0
摘要翻译：提供半导体结构及其形成方法。半导体结构包括：半导体衬底（100）; 形成在半导体衬底（100）上的稀土氧化物层（200）; 形成在所述稀土氧化物层（200）上的沟道区（300）。以及分别形成在沟道区（300）的两侧的源区（400）和漏区（500），其中稀土氧化物层（200）的晶格常数a与晶格常数b 沟道区域（300）和/或源极区域（400）和漏极区域（500）的半导体材料是a =（n±c）b，其中n是整数，c是晶格的失配比常数，0

12. 发明申请

WO2013078950A1 SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME 审中-公开
标题翻译：半导体结构及其形成方法
公开(公告)号：WO2013078950A1
公开(公告)日：2013-06-06
申请号：PCT/CN2012/084694
申请日：2012-11-15
申请人： LI, Yuan , GUO, Lei
发明人： LI, Yuan , GUO, Lei
IPC分类号： H01L27/00
CPC分类号： H01L33/0062 , H01L33/007 , H01L33/16 , H01L33/20
摘要： A semiconductor structure and a method for forming the same are provided. The semiconductor structure comprises: a substrate (100); and a plurality of zigzag structures (200) formed on a surface of the substrate (100), in which each zigzag structure (200) has a first long side (202) and a first short side (204), the first long side (202) of one zigzag structure (200) is adjacent to the first short side (204) of another zigzag structure (200) adjacent to the one zigzag structure (200), each first long side (202) defines a first surface (300) of each zigzag structure (200), each first short side (204) defines a second surface (302) of each zigzag structure, and each first surface (300) is a growth surface for a compound semiconductor layer.
摘要翻译：提供半导体结构及其形成方法。半导体结构包括：衬底（100）; 以及形成在所述基板（100）的表面上的多个锯齿形结构（200），其中每个锯齿形结构（200）具有第一长边（202）和第一短边（204），所述第一长边一个之字形结构（200）的第一表面（202）与邻近一个之字形结构（200）的另一个锯齿形结构（200）的第一短边（204）相邻，每个第一长边（202）限定第一表面（300）每个Z字形结构（200）的每个第一短边（204）限定每个锯齿形结构的第二表面（302），并且每个第一表面（300）是化合物半导体层的生长表面。

13. 发明申请

WO2013067967A1 SEMICONDUCTOR ELECTRICITY CONVERTER 审中-公开
标题翻译：半导体电力转换器
公开(公告)号：WO2013067967A1
公开(公告)日：2013-05-16
申请号：PCT/CN2012/084413
申请日：2012-11-09
申请人： GUO, Lei
发明人： GUO, Lei
IPC分类号： H02M5/20 , H02M7/06 , H02N6/00 , H01L31/042 , H01L33/00
CPC分类号： H02M11/00 , H01L31/173
摘要： A semiconductor electricity converter is provided. The semiconductor electricity converter comprises: an AC input module, for converting an input AC electric energy into a light energy, the AC input module comprising a plurality of semiconductor electricity-to-light conversion structures (1), each semiconductor electricity-to-light conversion structure (1) comprising an electricity-to-light conversion layer (102); and an AC output module, for converting the light energy into an output AC electric energy, the AC output module comprising a plurality of semiconductor light-to-electricity conversion structures (2), each semiconductor light-to-electricity conversion structure (2) comprising a light-to-electricity conversion layer (110); in which an emitting spectrum of each semiconductor electricity-to-light conversion structure (1) and an absorption spectrum of each semiconductor light-to-electricity conversion structure (2) are matched with each other.
摘要翻译：提供了一种半导体电力转换器。所述半导体电力转换器包括：AC输入模块，用于将输入的AC电能转换为光能，所述AC输入模块包括多个半导体电 - 光转换结构（1），每个半导体电 - 光转换结构（1），包括电 - 光转换层（102）; 和交流输出模块，用于将光能转换为输出交流电能，所述交流输出模块包括多个半导体光 - 电转换结构（2），每个半导体光 - 电转换结构（2）包括光电转换层（110）; 其中每个半导体电 - 光转换结构（1）的发射光谱和每个半导体光 - 电转换结构（2）的吸收光谱彼此匹配。

14. 发明申请

WO2012163047A1 SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME 审中-公开
标题翻译：半导体结构及其形成方法
公开(公告)号：WO2012163047A1
公开(公告)日：2012-12-06
申请号：PCT/CN2011/082110
申请日：2011-11-11
申请人： TSINGHUA UNIVERSITY , WANG, Jing , GUO, Lei
发明人： WANG, Jing , GUO, Lei
IPC分类号： H01L29/06 , H01L27/088 , H01L21/8234
CPC分类号： H01L21/764 , H01L21/823412 , H01L21/823418 , H01L21/823481
摘要： A semiconductor structure and a method for forming the same are provided. The semiconductor structure comprises: a substrate (1100); a plurality of convex structures (1200) formed on the substrate (1100), in which every two adjacent convex structures (1200) are separated by a cavity; a plurality of floated films (1300), in which each floated film (1300) is formed between the every two adjacent convex structures (1200) and connected with tops of the every two adjacent convex structures (1200), the floated films (1300) are partitioned into a plurality of sets, a channel layer is formed on a convex structure (1200) between the floated films (1300) in each set, a source region and a drain region are formed on two sides of the channel layer respectively, and an isolation portion (1200) is set between two adjacent sets of floated films (1300); and a gate stack (1400) formed on each channel layer.
摘要翻译：提供半导体结构及其形成方法。半导体结构包括：衬底（1100）; 形成在所述基板（1100）上的多个凸起结构（1200），其中每两个相邻凸起结构（1200）由空腔分隔开; 多个浮动膜（1300），其中每个浮动膜（1300）形成在每两个相邻的凸起结构（1200）之间并与每两个相邻凸起结构（1200）的顶部连接，浮动膜（1300）被划分为多组，在每组中的浮动膜（1300）之间的凸形结构（1200）上形成沟道层，在沟道层的两侧分别形成源极区和漏极区，以及隔离部分（1200）设置在两组相邻的漂浮膜（1300）之间; 和形成在每个沟道层上的栅叠层（1400）。

15. 发明申请

WO2013067966A1 CHIP WITH SEMICONDUCTOR ELECTRICITY CONVERSION STRUCTURE 审中-公开
标题翻译：芯片与半导体电力转换结构
公开(公告)号：WO2013067966A1
公开(公告)日：2013-05-16
申请号：PCT/CN2012/084409
申请日：2012-11-09
申请人： GUO, Lei
发明人： GUO, Lei
IPC分类号： H01L31/12 , H01L31/173 , H01L31/153
CPC分类号： H04B10/00 , H01L31/125 , H01L31/173
摘要： A semiconductor electricity conversion structure is provided. The semiconductor electricity conversion structure comprises: a substrate (20); and at least one semiconductor electricity conversion structure (10) formed on the substrate (20), the at least one semiconductor electricity conversion structure (10) comprising: at least one semiconductor electricity-to-light conversion unit (110) for converting an input electric energy into a light energy, and at least one semiconductor light-to-electricity conversion unit (120) for converting the light energy back into an output electric energy, in which a number of the semiconductor electricity-to-light conversion unit (110) is in proportion to a number of the semiconductor light-to-electricity conversion unit (120) to realize an electricity conversion, and an emitting spectrum of the semiconductor electricity-to-light conversion unit (110) and an absorption spectrum of the semiconductor light-to-electricity conversion unit (120) are matched with each other.
摘要翻译：提供了一种半导体电转换结构。半导体电转换结构包括：衬底（20）; 以及形成在所述基板上的至少一个半导体电转换结构（10），所述至少一个半导体电转换结构（10）包括：至少一个半导体电 - 光转换单元（110），用于将输入将电能转换为光能，以及至少一个用于将光能转换回输出电能的半导体光电转换单元（120），其中多个半导体电光转换单元（110 ）与半导体光电转换单元（120）的数量成比例，以实现电转换，并且半导体电光转换单元（110）的发射光谱和半导体的光吸收光谱的吸收光谱光电转换单元（120）彼此匹配。

16. 发明申请

WO2012163048A1 SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME 审中-公开
标题翻译：半导体结构及其形成方法
公开(公告)号：WO2012163048A1
公开(公告)日：2012-12-06
申请号：PCT/CN2011/082111
申请日：2011-11-11
申请人： TSINGHUA UNIVERSITY , WANG, Jing , GUO, Lei
发明人： WANG, Jing , GUO, Lei
IPC分类号： H01L29/06 , H01L27/088 , H01L21/8234
CPC分类号： H01L29/7842 , H01L21/02532 , H01L21/0257 , H01L21/02587 , H01L21/02664 , H01L21/26506 , H01L21/3247 , H01L21/764 , H01L21/823412 , H01L21/823418 , H01L21/823481 , H01L29/0653 , H01L29/0665 , H01L29/0688 , H01L29/1054 , H01L29/151 , H01L29/161 , H01L29/165 , H01L29/66568 , H01L29/78
摘要： A semiconductor structure and a method for forming the same are provided. The semiconductor structure comprises: a substrate (1100); a plurality of convex structures (1200) formed on the substrate (1100), in which every two adjacent convex structures (1200) are separated by a cavity in a predetermined pattern, and the cavity between every two adjacent convex structures (1200) is less than 50nm in width; a plurality of floated films (1300), in which the floated films (1300) are partitioned into a plurality of sets, a channel layer is formed on a convex structure (1200) between the floated films (1300) in each set, a source region and a drain region are formed on two sides of the channel layer respectively, and the cavity between the every two adjacent convex structures (1200) is filled with an insulating material (2000); and a gate stack (1400) formed on each channel layer.
摘要翻译：提供半导体结构及其形成方法。半导体结构包括：衬底（1100）; 形成在所述基板（1100）上的多个凸起结构（1200），其中每两个相邻凸起结构（1200）以预定图案被空腔隔开，并且每两个相邻的凸起结构（1200）之间的空腔较小宽50nm; 多个浮动膜（1300），其中浮动膜（1300）被分成多个组，在每组中的浮动膜（1300）之间的凸形结构（1200）上形成沟道层，源区域和漏极区域分别形成在沟道层的两侧，并且每两个相邻凸起结构（1200）之间的空腔填充有绝缘材料（2000）; 和形成在每个沟道层上的栅叠层（1400）。

17. 发明申请

WO2012119419A1 STRAINED GE-ON-INSULATOR STRUCTURE AND METHOD FOR FORMING THE SAME 审中-公开
标题翻译：应变导电绝缘体结构及其形成方法
公开(公告)号：WO2012119419A1
公开(公告)日：2012-09-13
申请号：PCT/CN2011/078948
申请日：2011-08-25
申请人： TSINGHUA UNIVERSITY , WANG, Jing , XU, Jun , GUO, Lei
发明人： WANG, Jing , XU, Jun , GUO, Lei
IPC分类号： H01L21/336 , H01L21/20
CPC分类号： H01L21/76283 , H01L21/76251 , H01L29/7843 , H01L29/7846 , H01L29/7848 , H01L29/78684
摘要： A strained Ge-on-insulator structure is provided, comprising: a silicon substrate (1100), in which an oxide insulating layer (1200) is formed on a surface of the silicon substrate (1100); a Ge layer (1300) formed on the oxide insulating layer (1200), in which a first passivation layer (1400) is formed between the Ge layer (1300) and the oxide insulating layer (1200); a gate stack (1600, 1700) formed on the Ge layer (1300); and a channel region formed below the gate stack (1600, 1700), and a source (1800) and a drain (1800) formed on sides of the channel region, in which the source (1800) and the drain (1800) are a Si x Ge -x :C source and a Si x Ge -x :C drain respectively to produce a tensile 10 strain in the channel region, in which x is within a range from 0 to 1 and a content of C is within a range from 0 to 7.5%. Further, a method for forming the strained Ge-on-insulator structure is also provided.
摘要翻译：提供了一种应变绝缘体上的结构，包括：在硅衬底（1100）的表面上形成氧化物绝缘层（1200）的硅衬底（1100）; 形成在氧化物绝缘层（1200）上的Ge层（1300），其中在Ge层（1300）和氧化物绝缘层（1200）之间形成第一钝化层（1400）; 形成在所述Ge层（1300）上的栅叠层（1600,1700）; 以及形成在所述栅极堆叠（1600,1700）下面的沟道区域，以及形成在所述沟道区域的侧面上的源极（1800）和漏极（1800），所述源极（1800）和所述漏极（1800） Si x Ge-X：C源和Si x Ge-X：C漏极，以在沟道区域中产生拉伸10应变，其中x在0至1的范围内，并且C的含量在范围内从0％到7.5％。此外，还提供了用于形成应变的绝缘体上Ge的结构的方法。

18. 发明申请

WO2012041087A1 SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME 审中-公开
标题翻译：半导体器件及其形成方法
公开(公告)号：WO2012041087A1
公开(公告)日：2012-04-05
申请号：PCT/CN2011/076392
申请日：2011-06-27
申请人： TSINGHUA UNIVERSITY , WANG, Jing , XU, Jun , GUO, Lei
发明人： WANG, Jing , XU, Jun , GUO, Lei
IPC分类号： H01L29/06 , H01L21/02 , H01L29/12 , H01L21/20
CPC分类号： H01L29/267 , H01L21/02381 , H01L21/0245 , H01L21/0251 , H01L21/02538 , H01L21/0262 , H01L21/02639 , H01L21/02647
摘要： A semiconductor device and a method for forming the same are provided. The semiconductor device comprises: a substrate (1); an insulating layer (2), formed on the substrate (1) and having a trench (21) to expose an upper surface of the substrate (1); a first buffer layer (3), formed on the substrate (1) and in the trench (21); and a compound semiconductor layer (4), formed on the first buffer layer (3), wherein an aspect ratio of the trench (21) is larger than 1 and smaller than 10, wherein the first buffer layer (3) is formed by a low-temperature reduced pressure chemical vapor deposition process at a temperature between 200°C and 500°C, and wherein the compound semiconductor layer (4) is formed by a low-temperature metal organic chemical vapor deposition process at a temperature between 200°C and 600°C.
摘要翻译：提供半导体器件及其形成方法。半导体器件包括：衬底（1）; 形成在所述基板（1）上并具有用于露出所述基板（1）的上表面的沟槽（21）的绝缘层（2）; 形成在所述基板（1）和所述沟槽（21）中的第一缓冲层（3）; 和形成在第一缓冲层（3）上的化合物半导体层（4），其中沟槽（21）的纵横比大于1且小于10，其中第一缓冲层（3）由在200℃〜500℃的温度下进行低温减压化学气相沉积工艺，其中化合物半导体层（4）通过低温金属有机化学气相沉积工艺在200℃ 和600℃。

19. 发明申请

WO2013177856A1 SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME 审中-公开
标题翻译：半导体结构及其形成方法
公开(公告)号：WO2013177856A1
公开(公告)日：2013-12-05
申请号：PCT/CN2012/078790
申请日：2012-07-18
申请人： TSINGHUA UNIVERSITY , WANG, Wei , WANG, Jing , GUO, Lei
发明人： WANG, Wei , WANG, Jing , GUO, Lei
IPC分类号： H01L21/336 , H01L29/78
CPC分类号： H01L29/78603 , H01L29/7849 , H01L29/78654 , H01L29/78681 , H01L29/78684
摘要： A semiconductor structure and a method for forming the same are provided. The semiconductor structure comprises: a semiconductor substrate (100); a trench (200) formed in the semiconductor substrate (100), in which a rare earth oxide layer (300) is formed in the trench (200); a channel region (400) partly or entirely formed on the rare earth oxide layer (300); and a source region (500) and a drain region (600) formed at both sides of the channel region (400), respectively. A relationship between a lattice constant a of the rare earth oxide layer (300) and a lattice constant b of a semiconductor material of the channel region (400) and/or the source region (500) and the drain region (600) is a = (n ± c)b, where n is an integer, c is a mismatch ratio of lattice constants, and 0
摘要翻译：提供半导体结构及其形成方法。半导体结构包括：半导体衬底（100）; 形成在半导体衬底（100）中的沟槽（200），其中在沟槽（200）中形成稀土氧化物层（300）; 在所述稀土氧化物层（300）上部分或全部形成的沟道区（400）。以及分别形成在沟道区域（400）的两侧的源极区（500）和漏极区（600）。稀土氧化物层（300）的晶格常数a与沟道区域（400）和/或源极区域（500）和漏极区域（600）的半导体材料的晶格常数b之间的关系是 =（n±c）b，其中n是整数，c是晶格常数的失配比，0

20. 发明申请

WO2013174069A1 SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME 审中-公开
标题翻译：半导体结构及其形成方法
公开(公告)号：WO2013174069A1
公开(公告)日：2013-11-28
申请号：PCT/CN2012/078728
申请日：2012-07-16
申请人： TSINGHUA UNIVERSITY , WANG, Jing , GUO, Lei , WANG, Wei
发明人： WANG, Jing , GUO, Lei , WANG, Wei
IPC分类号： H01L27/092 , H01L21/8238
CPC分类号： H01L21/823807 , H01L21/823814
摘要： A semiconductor structure and a method for forming the same are provided. The semiconductor structure comprises: a semiconductor substrate (100); a source region and a drain region defined in the semiconductor substrate (100) respectively, and a trench (200, 300) formed in the source region and/or the drain region, in which a rare earth oxide layer (400) is formed in the trench (200, 300); a source (500) and/or a drain (600) formed on the rare earth oxide layer (400); and a channel region (700) formed between the source (500) and the drain (600). A relationship between a lattice constant a of the rare earth oxide layer (400) and a lattice constant b of a semiconductor material of the source (500) and/or the drain (600) and/or the channel region (700) is a = (n ?c)b, where n is an integer, c is a mismatch ratio of lattice constants, and 0
摘要翻译：提供半导体结构及其形成方法。半导体结构包括：半导体衬底（100）; 分别限定在半导体衬底（100）中的源极区和漏极区以及形成在源区和/或漏区中的在其中形成稀土氧化物层（400）的沟槽（200,300）沟槽（200,300）; 在所述稀土氧化物层（400）上形成的源极（500）和/或漏极（600）。以及形成在源极（500）和漏极（600）之间的沟道区域（700）。稀土氧化物层（400）的晶格常数a与源极（500）和/或漏极（600）和/或沟道区域（700）的半导体材料的晶格常数b之间的关系为 =（n≥c）b，其中n是整数，c是晶格常数的失配比，0

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