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    • 12. 发明授权
    • Liquid crystal display and thin film transistor array panel therefor
    • 液晶显示器和薄膜晶体管阵列面板
    • US08228452B2
    • 2012-07-24
    • US12630249
    • 2009-12-03
    • Jung-Hee LeeYoon-Sung UmJong-Ho SonJae-Jin Lyu
    • Jung-Hee LeeYoon-Sung UmJong-Ho SonJae-Jin Lyu
    • G02F1/1343
    • G02F1/1368G02F1/13624G02F2001/134345H01L27/1255
    • A thin film transistor array panel is provided, which includes: an insulating substrate; a gate line formed on the substrate and including a gate electrode; a gate insulating layer formed on the gate line; a semiconductor layer formed on the gate insulating layer opposite the gate electrode; a data line formed on the gate insulating layer and including a first source electrode located on the semiconductor layer; first and second drain electrodes formed on the semiconductor layer, separated from each other and overlapping the gate electrode; a passivation layer formed on the data line and the first and second drain electrodes; and first and second pixel electrodes electrically connected to the first and second electrodes, respectively, wherein an overlapping area between the gate electrode and the first drain electrode is different from an overlapping area between the gate electrode and the second drain electrode.
    • 提供薄膜晶体管阵列面板,其包括:绝缘基板; 形成在所述基板上并包括栅电极的栅极线; 栅极绝缘层,形成在栅极线上; 形成在与栅电极相对的栅极绝缘层上的半导体层; 形成在所述栅绝缘层上并且包括位于所述半导体层上的第一源电极的数据线; 形成在半导体层上的第一和第二漏极彼此分离并与栅电极重叠; 形成在所述数据线和所述第一和第二漏电极上的钝化层; 以及分别电连接到第一和第二电极的第一和第二像素电极,其中栅电极和第一漏电极之间的重叠区域与栅电极和第二漏电极之间的重叠区域不同。
    • 14. 发明授权
    • Methods of manufacturing liquid crystal display devices with reduced
susceptibility to electrostatic discharge faults
    • 制造具有降低的静电放电故障敏感性的液晶显示装置的方法
    • US5805246A
    • 1998-09-08
    • US855301
    • 1997-05-13
    • Jung-Hee LeeKweon-Sam Hong
    • Jung-Hee LeeKweon-Sam Hong
    • G02F1/133G02F1/1362G02F1/1333G02F1/13G02F1/1345
    • G02F1/136204
    • Methods of manufacturing liquid crystal display devices with reduced susceptibility to electrostatic discharge faults include delaying the removal of an electrostatic shorting bar from a liquid crystal display substrate until after a display driver has been electrically coupled to the control lines (e.g., data and gate lines) on the display substrate. Thus, in contrast to the prior art, electrostatic discharge faults can also be prevented during the step of electrically coupling display drivers to the display substrate. A preferred method includes the steps of forming a first substrate comprising a thin-film transistor display region, a plurality of data and gate lines coupled to the display region and an electrostatic shorting bar electrically interconnecting the data and gate lines together, and then electrically connecting a second substrate (e.g., printed circuit board) comprising a display driver circuit, before electrically disconnecting the electrostatic shorting bar from the plurality of control lines. Here, the step of electrically disconnecting the shorting bar from the control lines is preferably performed by removing the shorting bar from the first substrate using a cutting tool such as a saw or laser. The step of removing the shorting bar is also preferably performed at an edge of the first substrate which extends opposite an edge to which the second substrate (containing the driver circuit) is attached.
    • 制造对静电放电故障敏感性降低的液晶显示装置的方法包括延迟静电短路棒从液晶显示基板的去除,直到显示驱动器已经电耦合到控制线(例如,数据和栅极线) 在显示基板上。 因此,与现有技术相反,在将显示器驱动器电耦合到显示器基板的步骤期间,也可以防止静电放电故障。 优选的方法包括以下步骤:形成包括薄膜晶体管显示区域,耦合到显示区域的多个数据和栅极线的第一衬底和将数据和栅极线电连接在一起的静电短路棒,然后电连接 在将所述静电短路杆与所述多个控制线电气断开之前,包括显示驱动器电路的第二基板(例如,印刷电路板)。 这里,短路棒与控制线电气断开的步骤优选通过使用诸如锯或激光器的切割工具从第一基板去除短路棒来进行。 去除短路棒的步骤也优选地在与第二基板(包含驱动电路)相连的边缘相对延伸的第一基板的边缘处进行。
    • 17. 发明授权
    • Liquid crystal display and thin film transistor array panel therefor
    • 液晶显示器和薄膜晶体管阵列面板
    • US06999134B2
    • 2006-02-14
    • US10445849
    • 2003-05-28
    • Jung-Hee LeeYoon-Sung UmJong-Ho SonJae-Jin Lyu
    • Jung-Hee LeeYoon-Sung UmJong-Ho SonJae-Jin Lyu
    • G02F1/1343
    • G02F1/1368G02F1/13624G02F2001/134345H01L27/1255
    • A thin film transistor array panel is provided, which includes: an insulating substrate; a gate line formed on the substrate and including a gate electrode; a gate insulating layer formed on the gate line; a semiconductor layer formed on the gate insulating layer opposite the gate electrode; a data line formed on the gate insulating layer and including a first source electrode located on the semiconductor layer; first and second drain electrodes formed on the semiconductor layer, separated from each other and overlapping the gate electrode; a passivation layer formed on the data line and the first and the second drain electrodes; and first and second pixel electrodes electrically connected to the first and the second drain electrodes, respectively, wherein an overlapping area between the gate electrode and the first drain electrode is different from an overlapping area between the gate electrode and the second drain electrode.
    • 提供薄膜晶体管阵列面板,其包括:绝缘基板; 形成在所述基板上并包括栅电极的栅极线; 栅极绝缘层,形成在栅极线上; 形成在与栅电极相对的栅极绝缘层上的半导体层; 形成在所述栅绝缘层上并且包括位于所述半导体层上的第一源电极的数据线; 形成在半导体层上的第一和第二漏极彼此分离并与栅电极重叠; 形成在数据线和第一和第二漏电极上的钝化层; 以及分别与第一和第二漏电极电连接的第一和第二像素电极,其中栅电极和第一漏电极之间的重叠区域与栅电极和第二漏电极之间的重叠区域不同。
    • 19. 发明授权
    • Method of fabricating a semiconductor substrate
    • 半导体衬底的制造方法
    • US5773353A
    • 1998-06-30
    • US564505
    • 1995-11-29
    • Oh-Joon KwonJung-Hee LeeYong-Hyun Lee
    • Oh-Joon KwonJung-Hee LeeYong-Hyun Lee
    • H01L21/18H01L21/762H01L21/76
    • H01L21/76264H01L21/7627H01L21/76283Y10S438/96
    • A semiconductor substrate and a method of fabricating the same, and provides which the active area to be formed the active element is defined by the trench filled with any conductive polycrystal silicon in which any portion of a large number of the epitaxial layer is crystally grown on any conductive silicon substrate, and the multi-aperture silicon oxide layer is formed from the metal line to be used to the passive element or the transmitting line outside the trench, so that the interference between the passive element and the semiconductor substrate is prevented, and to attenuate the transmitting signal prevents to be attenuated in the high frequency band operation. Therefore, the semiconductor substrate for a unit active element and the MMIC to be able to operate the high frequency band is manufactured into the silicon, and thus it is advantageous to reduce the cost and enhance the yield. Silicon oxide layer is formed from the metal line to be used to the passive element or the transmitting line outside the trench, so that the interference between the passive element and the semiconductor substrate is prevented, and to attenuate the transmitting signal prevents to be attenuated in the high frequency band operation. Therefore, the semiconductor substrate for a unit active element and the MMIC to be able to operate the high frequency band is manufactured into the silicon, and thus it is advantageous to reduce the cost and enhance the yield.
    • 一种半导体衬底及其制造方法,其特征在于,所形成的有源区域由填充有任何导电多晶硅的沟槽限定,其中大量外延层的任何部分在其上生长在 任何导电硅衬底和多孔径氧化硅层由用于沟槽外的无源元件或发射线的金属线形成,从而防止了无源元件与半导体衬底之间的干涉, 衰减发送信号防止在高频带操作中被衰减。 因此,将单位有源元件的半导体衬底和能够操作高频带的MMIC制造成硅,因此有利于降低成本并提高产量。 氧化硅层由用于无源元件或沟槽外部的传输线的金属线形成,从而防止无源元件与半导体衬底之间的干涉,并且衰减发射信号防止衰减 高频段操作。 因此,将单位有源元件的半导体衬底和能够操作高频带的MMIC制造成硅,因此降低成本并提高产量是有利的。