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11. 发明申请

WO2009105731A1 BARCODE DETECTION BASED ON MORPHOLOGICAL OPERATIONS 审中-公开
标题翻译：基于形态学运算的条形码检测
公开(公告)号：WO2009105731A1
公开(公告)日：2009-08-27
申请号：PCT/US2009/034799
申请日：2009-02-21
申请人： QUALCOMM INCORPORATED , LI, Hsiang-Tsun , LI, Jingqiang , HWANG, Hau , JIANG, Xiaoyun , CHEUNG, Joseph
发明人： LI, Hsiang-Tsun , LI, Jingqiang , HWANG, Hau , JIANG, Xiaoyun , CHEUNG, Joseph
IPC分类号： G06K7/14
CPC分类号： G06K7/10 , G06K7/1443 , G06K7/1452
摘要： This disclosure describes techniques for detecting a barcode within an image. An image processor may, for example, process an image to detect regions within the image that may be barcodes. The image processor may identify regions of the image that exhibit a high concentration of edges and a high concentration of pixels with low optical intensity co-instantaneously as potential barcodes. The image processor may identify the regions using a number of morphological operations. The image processor may then determine whether the identified regions are actually barcodes by verifying whether the region have unique barcode features. The barcode detection techniques described in this disclosure may be independent of barcode size, location and orientation within the image. Moreover, the use of morphological operations results in faster and more computationally efficient barcode detection, as well as lower computational complexity.
摘要翻译：本公开描述了用于检测图像内的条形码的技术。图像处理器可以例如处理图像以检测图像内可能是条形码的区域。图像处理器可以识别呈现高浓度边缘的图像区域和具有低光强度的高浓度像素作为潜在条形码。图像处理器可以使用多个形态操作来识别区域。然后，图像处理器可以通过验证该区域是否具有独特的条形码特征来确定识别的区域是否实际上是条形码。本公开中描述的条形码检测技术可以独立于图像内的条形码尺寸，位置和取向。此外，使用形态学运算导致更快和更有计算效率的条形码检测，以及较低的计算复杂度。

12. 发明公开

EP2965480A1 EFFICIENT N-FACTORIAL DIFFERENTIAL SIGNALING TERMINATION NETWORK 有权
标题翻译：的N- FAKTOR-DIFFERENZSIGNALISIERUNGS-ABSCHLUSSNETZWERK
公开(公告)号：EP2965480A1
公开(公告)日：2016-01-13
申请号：EP14713723.6
申请日：2014-03-07
申请人： Qualcomm Incorporated
发明人： SENGOKU, Shoichiro , WILEY, George Alan , LEE, Chulkyu , CHEUNG, Joseph
IPC分类号： H04L25/02
CPC分类号： H03H2/005 , H04B1/04 , H04L25/0272 , H04L25/0278 , H04L25/14 , Y02D30/30
摘要： A termination network circuit for a differential signal transmitter comprises a plurality of n resistance elements and a plurality of differential signal drivers. A first end of each of the resistance elements is coupled at a common node, where n is an integer value and is the number of conductors used to transmit a plurality of differential signals. Each differential signal driver may include a positive terminal driver and a negative terminal driver. The positive terminal driver is coupled to a second end of a first resistance element while the negative terminal driver is coupled to a second end of a second resistance element. The positive terminal driver and the negative terminal driver are separately and independently switchable to provide a current having a magnitude and direction. During a transmission cycle each of the resistance elements has a current of a different magnitude and/or direction than the other resistance elements.
摘要翻译：用于差分信号发射机的终端网络电路包括多个n个电阻元件和多个差分信号驱动器。每个电阻元件的第一端在公共节点处耦合，其中n是整数值，并且是用于发送多个差分信号的导体的数量。每个差分信号驱动器可以包括正极端子驱动器和负极端子驱动器。正端子驱动器耦合到第一电阻元件的第二端，而负端子驱动器耦合到第二电阻元件的第二端。正极端子驱动器和负极端子驱动器是独立且可独立地切换以提供具有大小和方向的电流。在传输周期期间，每个电阻元件具有与其它电阻元件不同的大小和/或方向的电流。

13. 发明公开

EP2556659A1 COMBINING DATA FROM MULTIPLE IMAGE SENSORS 审中-公开
标题翻译：数据从多个图像传感器组合
公开(公告)号：EP2556659A1
公开(公告)日：2013-02-13
申请号：EP11722207.5
申请日：2011-04-05
申请人： Qualcomm Incorporated
发明人： GOMA, Sergiu, R. , ALEKSIC, Milivoje , HWANG, Hau , CHEUNG, Joseph
IPC分类号： H04N5/232 , H04N13/00
CPC分类号： H04N13/239 , H04N5/247 , H04N13/161 , H04N13/296
摘要： A method of combining data from multiple sensors is disclosed. The method includes receiving lines of image data at an image processor having an input for a single camera. Each line of the image data includes first line data from a first image captured by a first camera and second line data from a second image captured by a second camera. The method also includes generating an output frame having a first section corresponding to line data of the first image and having a second section corresponding to line data of the second image. The first section and the second section are configured to be used to generate a three-dimensional (3D) image format or a 3D video format.

14. 发明申请

WO2014201289A1 CAMERA CONTROL INTERFACE EXTENSION BUS 审中-公开
标题翻译：摄像机控制界面扩展总线
公开(公告)号：WO2014201289A1
公开(公告)日：2014-12-18
申请号：PCT/US2014/042182
申请日：2014-06-12
申请人： QUALCOMM INCORPORATED
发明人： SENGOKU, Shoichiro , WILEY, George Alan , CHEUNG, Joseph
IPC分类号： G06F13/42
CPC分类号： G06F13/4291 , G06F13/364 , G06F13/4282 , G06F13/4295 , H04L7/0331
摘要： System, methods and apparatus are described that offer improved performance of a serial bus used for Inter-Integrated Circuit (I2C) and/or camera control interface (CCI) operations. CCI extension (CCIe) devices are described. CCIe devices may be configured as a bus master or as a slave. In one method, a CCIe transmitter may generate a transition number from a set of bits, convert the transition number into a sequence of symbols, and transmit the sequence of symbols in the signaling state of a two-wire serial bus. Timing information may be encoded in the transitions between symbols of consecutive pairs of symbols in the sequence of symbols. For example, each transition may cause a change in the signaling state of at least one wire of the two-wire serial bus. A CCIe receiver may derive a receive clock from the transitions in order to receive and decode the sequence of symbols.
摘要翻译：描述了提供用于内部集成电路（I2C）和/或相机控制接口（CCI）操作的串行总线的改进的性能的系统，方法和装置。描述CCI扩展（CCIe）设备。 CCIe设备可以配置为总线主机或从机。在一种方法中，CCIe发射机可以从一组比特生成转换号码，将转换号码转换为符号序列，并以两线串行总线的信令状态发送符号序列。定时信息可以在符号序列中的连续符号对符号之间的转换中被编码。例如，每个转换可能导致两线串行总线的至少一根线的信令状态改变。 CCIe接收机可以从转换中导出接收时钟，以便接收和解码符号序列。

15. 发明申请

WO2014153472A1 MULTI-WIRE OPEN-DRAIN LINK WITH DATA SYMBOL TRANSITION BASED CLOCKING 审中-公开
标题翻译：多线打开链接与数据符号转换的时钟
公开(公告)号：WO2014153472A1
公开(公告)日：2014-09-25
申请号：PCT/US2014/031363
申请日：2014-03-20
申请人： QUALCOMM INCORPORATED
发明人： SENGOKU, Shoichiro , CHEUNG, Joseph , WILEY, George Alan
IPC分类号： H04L7/033 , H03K5/153 , H03K3/017 , H03L7/081
CPC分类号： H04L7/0087 , H03K3/017 , H03K5/13 , H03K5/133 , H03K5/134 , H03K5/14 , H03K5/153 , H03K5/1534 , H03K19/00 , H03K2005/00293 , H03L7/081 , H04L7/0037 , H04L7/033 , H04L7/0331
摘要： A method, an apparatus, and a computer program product are described. The apparatus generates a receive clock signal for receiving data from a multi-wire opendrain link by determining a transition in a signal received from the multi-wire opendrain link, generating a clock pulse responsive to the transition, delaying the clock pulse by a preconfigured first interval if the transition is in a first direction, and delaying the clock by a preconfigured second interval if the transition is in a second direction. The preconfigured first and/or second intervals are configured based on a rise time and/or a fall time associated with the communication interface and may be calibrated by measuring respective delays associated with clock pulses generated for first and second calibration transitions.
摘要翻译：描述了一种方法，装置和计算机程序产品。该装置通过确定从多线opendrain链路接收到的信号中的转变来产生一个接收时钟信号，用于从多线开启链路链路接收数据，产生响应于转换的时钟脉冲，将时钟脉冲延迟预先配置的第一如果转换处于第一方向，并且如果转换处于第二方向则将时钟延迟预定的第二间隔。基于与通信接口相关联的上升时间和/或下降时间来配置预配置的第一和/或第二间隔，并且可以通过测量与为第一和第二校准转换产生的时钟脉冲相关联的相应延迟来校准预先配置的第一和/或第二间隔。

16. 发明申请

WO2018034737A1 SYSTEMS AND METHODS FOR REDUCED POWER CONSUMPTION VIA MULTI-STAGE STATIC REGION DETECTION 审中-公开
标题翻译：用于通过多级静态区域检测降低功耗的系统和方法
公开(公告)号：WO2018034737A1
公开(公告)日：2018-02-22
申请号：PCT/US2017/039450
申请日：2017-06-27
申请人： QUALCOMM INCORPORATED
发明人： DONG, Suolong , CHENG, Scott , CHU, Jeffrey, Hao , CHRISTANTO, Neil , CHEUNG, Joseph , COULTER, Michael, Lee , TENG, Chia-Yuan , XU, Haoping
IPC分类号： G06T1/20
CPC分类号： H04N5/23241 , G06K9/6202 , G06T1/20 , G06T3/4015 , G06T2207/10024 , H04N1/2112 , H04N5/23293 , H04N19/132
摘要： Methods and apparatus improve static region detection in an imaging pipeline. An imaging pipeline may perform detection of static regions of an image at multiple stages of the pipeline. For example, as static regions may be eliminated from further processing by the imaging pipeline, static region detection performed at an early stage of the pipeline may provide for maximized power savings. As images early in the pipeline may contain artifacts inhibiting detection of some static regions, additional static region detection may be performed after further image processing. For example, static region detection may be performed for a second time after some filtering is applied to images in the pipeline. Regions previously characterized as dynamic may be characterized as static later in the pipeline due to a reduction of noise for example provided by the filters, and differences between the static region detection at different positions within the imaging pipeline.
摘要翻译：方法和设备改进了成像管线中的静态区域检测。成像管线可以在管线的多个阶段执行图像的静态区域的检测。例如，由于可以通过成像管线从进一步处理中消除静态区域，所以在管线的早期阶段执行的静态区域检测可以提供最大化的功率节省。由于流水线早期的图像可能包含抑制某些静态区域的检测的伪像，因此可以在进一步的图像处理之后执行额外的静态区域检测。例如，可以在对流水线中的图像应用一些滤波之后第二次执行静态区域检测。先前表征为动态的区域由于例如由滤波器提供的噪声的减少以及在成像管线内的不同位置处的静态区域检测之间的差异而可以被表征为稍后在流水线中的静态。

17. 发明申请

WO2003065610A3 BUFFER-BASED GPS AND CDMA PILOT SEARCHER 审中-公开
公开(公告)号：WO2003065610A3
公开(公告)日：2003-08-07
申请号：PCT/US2003/002912
申请日：2003-01-31
申请人： QUALCOMM INCORPORATED
发明人： KANG, Inyup , PATRICK, Christopher , MEAGHER, Bruce, R. , PATEL, Shimman , LI, Tao , CHEUNG, Joseph , SRINAVAS, Pillappakkam , FOERSTER, Gregory, B. , VARADARAJAN, Srinivas , WEI, Jian
IPC分类号： H04B1/707
摘要： A pilot searcher for CDMA and GPS signals. In one aspect, the searcher is operated in conjunction with a sample buffer in a "real-time" or "off-line" mode. The writing/reading of samples to/from the buffer may be performed in a TDM manner via a common port, and samples may be decimated and packed prior to storing in the buffer. In another aspect, the overall search for pilots is partitioned into a number of tasks, with each task corresponding to a search over a given sample segment and based on a particular set of parameter values. The tasks may be stored in a queue and performed one at a time based on their order in the queue. Prior to performing a new task, the parameter values for that task is downloaded to a set of configuration registers. The parameters may be ordered and linked such that only new values are downloaded.

18. 发明申请

WO2014201293A1 CAMERA CONTROL INTERFACE EXTENSION BUS 审中-公开
标题翻译：摄像机控制接口扩展总线
公开(公告)号：WO2014201293A1
公开(公告)日：2014-12-18
申请号：PCT/US2014/042188
申请日：2014-06-12
申请人： QUALCOMM INCORPORATED
发明人： SENGOKU, Shoichiro , WILEY, George Alan , CHEUNG, Joseph
IPC分类号： G06F13/42
CPC分类号： G06F13/4291 , G06F13/364 , G06F13/4282 , G06F13/4295 , H04L7/0331
摘要： System, methods and apparatus are described that offer improved performance of a serial bus used for Inter-Integrated Circuit (I2C) and/or camera control interface (CCI) operations. CCI extension (CCIe) devices are described. CCIe devices may be configured as a bus master or as a slave. In one method, a CCIe transmitter may generate a transition number from a set of bits, convert the transition number into a sequence of symbols, and transmit the sequence of symbols in the signaling state of a two-wire serial bus. Timing information may be encoded in the transitions between symbols of consecutive pairs of symbols in the sequence of symbols. For example, each transition may cause a change in the signaling state of at least one wire of the two-wire serial bus. A CCIe receiver may derive a receive clock from the transitions in order to receive and decode the sequence of symbols.
摘要翻译：描述了提供用于集成电路间（I2C）和/或相机控制接口（CCI）操作的串行总线的改进性能的系统，方法和设备。描述了CCI扩展（CCIe）设备。 CCIe设备可以配置为总线主设备或从设备。在一种方法中，CCIe发射机可以从一组比特中生成转换号码，将转换号码转换成符号序列，并且在双线串行总线的信令状态下发送符号序列。定时信息可以在符号序列中的连续码元对符号之间的转换中编码。例如，每个转换可能导致双导线串行总线的至少一条导线的信号状态的改变。 CCIe接收器可以从转换中获得接收时钟，以接收和解码符号序列。

19. 发明申请

WO2014150984A1 MULTI-WIRE SINGLE-ENDED PUSH-PULL LINK WITH DATA SYMBOL TRANSITION BASED CLOCKING 审中-公开
标题翻译：带数据符号转换的多线单向推拉链接
公开(公告)号：WO2014150984A1
公开(公告)日：2014-09-25
申请号：PCT/US2014/024704
申请日：2014-03-12
申请人： QUALCOMM INCORPORATED
发明人： SENGOKU, Shoichiro , WILEY, George Alan , CHEUNG, Joseph
IPC分类号： G06F13/42 , G06F13/40 , H04L25/00
CPC分类号： H04L7/027 , G06F13/4072 , G06F13/4295 , H04L25/00 , H04L25/14
摘要： System, methods and apparatus are described that facilitate transmission of data over a multi-wire data communications link, particularly between two devices within an electronic apparatus. A sequence of data bits is converted into M transition numbers, which are then converted into a sequence of symbols. The sequence of symbols is transmitted received over N wires. A clock signal may be effectively embedded in the transmission of the sequence of symbols. Each of the sequence of symbols may be selected based on a corresponding one of the M transition numbers and a value of a preceding one of the sequence of symbols.
摘要翻译：描述了便于通过多线数据通信链路，特别是在电子设备内的两个设备之间传输数据的系统，方法和装置。数据比特序列被转换成M个转换号码，然后转换成符号序列。符号序列通过N线传输。时钟信号可以被有效地嵌入在符号序列的传输中。符号序列中的每一个可以基于M个转换号中的一个和符号序列中的前一个的值来选择。

20. 发明申请

WO2014138658A1 EFFICIENT N-FACTORIAL DIFFERENTIAL SIGNALING TERMINATION NETWORK 审中-公开
标题翻译：有效的N-FACICE差分信令终止网络
公开(公告)号：WO2014138658A1
公开(公告)日：2014-09-12
申请号：PCT/US2014/022031
申请日：2014-03-07
申请人： QUALCOMM INCORPORATED
发明人： SENGOKU, Shoichiro , WILEY, George Alan , LEE, Chulkyu , CHEUNG, Joseph
IPC分类号： H04L25/02
CPC分类号： H03H2/005 , H04B1/04 , H04L25/0272 , H04L25/0278 , H04L25/14 , Y02D30/30
摘要： A termination network circuit for a differential signal transmitter comprises a plurality of n resistance elements and a plurality of differential signal drivers. A first end of each of the resistance elements is coupled at a common node, where n is an integer value and is the number of conductors used to transmit a plurality of differential signals. Each differential signal driver may include a positive terminal driver and a negative terminal driver. The positive terminal driver is coupled to a second end of a first resistance element while the negative terminal driver is coupled to a second end of a second resistance element. The positive terminal driver and the negative terminal driver are separately and independently switchable to provide a current having a magnitude and direction. During a transmission cycle each of the resistance elements has a current of a different magnitude and/or direction than the other resistance elements.
摘要翻译：用于差分信号发射机的终端网络电路包括多个n个电阻元件和多个差分信号驱动器。每个电阻元件的第一端在公共节点处耦合，其中n是整数值，并且是用于发送多个差分信号的导体的数量。每个差分信号驱动器可以包括正极端子驱动器和负极端子驱动器。正端子驱动器耦合到第一电阻元件的第二端，而负端子驱动器耦合到第二电阻元件的第二端。正极端子驱动器和负极端子驱动器分别独立地切换以提供具有幅度和方向的电流。在传输周期期间，每个电阻元件具有与其它电阻元件不同的大小和/或方向的电流。

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