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    • 14. 发明申请
    • Semiconductor device and fabrication method thereof
    • 半导体器件及其制造方法
    • US20050067615A1
    • 2005-03-31
    • US10962492
    • 2004-10-13
    • Shigeo YoshiiNobuyuki OtsukaKoichi MizunoAsamira Suzuki
    • Shigeo YoshiiNobuyuki OtsukaKoichi MizunoAsamira Suzuki
    • H01L29/68H01L29/06H01L29/08H01L29/12H01L29/737H01L31/0328
    • B82Y10/00H01L29/0817H01L29/127H01L29/7371
    • The present invention relates to a semiconductor device comprising a substrate (101); a semiconductor multi-layered structure formed on the substrate (101); the semiconductor multi-layered structure comprising an emitter layer (102), a base layer (105), and a collector layer (107), each composed of a group III-V n-type compound semiconductor and layered in this order; a quantum dot barrier layer (103) disposed between the emitter layer (102) and the base layer (105); a collector electrode (110), a base electrode (111) and an emitter electrode (112) connected to the collector layer (107), the base layer (105) and the emitter layer (102), respectively; the quantum dot barrier layer (103) comprising a plurality of quantum dots (103c); the quantum dots (103) being sandwiched between first and second barrier layers (103a, 103d) from the emitter layer side and the base layer side, respectively; each of the quantum dots (103c) having a convex portion that is convex to the base layer (105); a base layer (105) side interface (d1) in the second barrier layer (103d), and collector layer side and emitter layer side interfaces (d2, d3) in the base layer (105); the interfaces having curvatures (d12, d22, d23) that are convex to the collector layer (107) corresponding to the convex portions of the quantum dots (103c).
    • 本发明涉及一种包括衬底(101)的半导体器件; 形成在所述基板(101)上的半导体多层结构; 所述半导体多层结构包括由III-V族N型化合物半导体构成的发射极层(102),基极层(105)和集电极层(107),并且按顺序层叠; 设置在发射极层(102)和基极层(105)之间的量子点势垒层(103); 分别与集电极层(107)连接的集电极(110),基极(111)和发射极(112),基极层(105)和发射极层(102) 所述量子点势垒层(103)包括多个量子点(103c); 量子点(103)分别从发射极侧和基极侧夹在第一和第二阻挡层(103a,103d)之间; 每个量子点(103c)具有与基底层(105)凸起的凸部; 第二阻挡层(103d)中的基底层(105)侧界面(d1),以及基底层(105)中的集电极层侧和发射极层侧界面(d2,d3) 具有对应于量子点(103c)的凸部的与集电体层(107)凸起的曲率(d12,d22,d23)的界面。
    • 17. 发明申请
    • METHOD FOR DETECTING AN ANTIGEN
    • 检测抗原的方法
    • US20120309033A1
    • 2012-12-06
    • US13536202
    • 2012-06-28
    • Kazuaki NishioNozomu MatsukawaShigeo Yoshii
    • Kazuaki NishioNozomu MatsukawaShigeo Yoshii
    • G01N21/78
    • G01N33/542C12Q1/26G01N33/54373G01N2333/90287
    • The present invention relates to a method for detecting an antigen with use of an antibody and an enzyme. Specifically, the present invention provides a method for detecting an antigen without use of a labeled-antibody. the method comprises immersing particles in a first buffer solution which is predicted to contain the antigen; wherein an antibody and a multi-copper oxidase CueO are immobilized on each surface of the particles, and the antibody reacts specifically with the antigen. The method further comprises the following steps recovering the obtained particles; mixing the particles recovered, an oxidation-reduction indicator (reductant), and a second buffer solution so as to prepare a reaction solution; measuring an activity degree of the multi-copper oxidase CueO contained in the reaction solution; determining that the first buffer solution contains the antigen based on the above activity degree.
    • 本发明涉及使用抗体和酶检测抗原的方法。 具体而言,本发明提供了不使用标记抗体来检测抗原的方法。 该方法包括将颗粒浸入预测含有抗原的第一缓冲溶液中; 其中抗体和多铜氧化酶CueO固定在颗粒的每个表面上,并且抗体与抗原特异性反应。 该方法还包括以下步骤:回收所获得的颗粒; 混合回收的颗粒,氧化还原指示剂(还原剂)和第二缓冲溶液以制备反应溶液; 测定反应溶液中所含的多铜氧化酶CueO的活度; 基于上述活性度确定第一缓冲溶液含有抗原。
    • 19. 发明授权
    • Semiconductor device
    • 半导体器件
    • US07323725B2
    • 2008-01-29
    • US10962492
    • 2004-10-13
    • Shigeo YoshiiNobuyuki OtsukaKoichi MizunoAsamira Suzuki
    • Shigeo YoshiiNobuyuki OtsukaKoichi MizunoAsamira Suzuki
    • H01L29/739H01L31/00
    • B82Y10/00H01L29/0817H01L29/127H01L29/7371
    • The present invention relates to a semiconductor device having a multi-layered structure comprising an emitter layer, a base layer, and a collector layer, each composed of a group III-V n-type compound semiconductor in this order; a quantum dot barrier layer disposed between the emitter layer and the base layer; a collector electrode, a base electrode and the emitter layer all connected to an emitter electrode; the quantum dot barrier layer having a plurality of quantum dots being sandwiched between first and second barrier layers from the emitter layer side and the base layer side, respectively and each having a portion that is convex to the base layer; a base layer side interface in the second barrier layer, and collector layer side and emitter layer side interfaces in the base layer having curvatures that are convex to the collector layer corresponding to the convex portions of the quantum dots.
    • 本发明涉及一种具有多层结构的半导体器件,该多层结构包括依次由III-V族n型化合物半导体构成的发射极层,基极层和集电极层; 设置在发射极层和基极层之间的量子点势垒层; 集电极,基极和发射极层全部连接到发射极; 所述量子点势垒层分别具有从所述发射极层侧和所述基极侧侧夹在第一和第二阻挡层之间的多个量子点,并且各自具有与所述基极层相对的部分。 第二阻挡层中的基底层侧界面,基底层中的集电极层侧发射极侧接合具有对应于量子点的凸部的集电极层的曲率的曲率。