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11. 发明授权

US08345155B2 Integrated circuit comprising deflicker unit for filtering image data, and a method therefor 有权
标题翻译：包括用于过滤图像数据的防抖单元的集成电路及其方法
公开(公告)号：US08345155B2
公开(公告)日：2013-01-01
申请号：US13142281
申请日：2009-01-21
申请人： Shlomo Beer-Gingold , Eyal Rabia , Michael Zarubinsky
发明人： Shlomo Beer-Gingold , Eyal Rabia , Michael Zarubinsky
IPC分类号： H04N7/01 , H04N11/20
CPC分类号： H04N7/0132
摘要： An integrated circuit comprises deflicker unit is described for adaptively applying deflicker filtering to image data to be displayed using an interlaced scan line technique. The deflicker unit comprises analysis unit arranged to receive the image data and identify at least one region of an image to which deflicker filtering is to be applied, and filter arranged to apply deflicker filtering to those regions identified by the analysis unit. In one example, the analysis unit may be arranged to identify regions of the image to which deflicker filtering is to be applied based at least on energy levels for a high frequency range component within the vertical frequency domain of the image data.
摘要翻译：描述了一种集成电路，其中描述了用于使用隔行扫描线技术对要显示的图像数据进行自适应应用防闪烁滤波。所述脱墨单元包括分析单元，其被配置为接收所述图像数据并且识别将要应用防抖滤波器滤波的图像的至少一个区域，并且滤波器被布置为对由所述分析单元识别的那些区域应用deflicker滤波。在一个示例中，分析单元可以被布置为至少基于图像数据的垂直频域内的高频范围分量的能量水平来识别将要施加减震器滤波的图像的区域。

12. 发明授权

US07738563B2 Method and system for performing deblocking filtering 有权
标题翻译：执行去块滤波的方法和系统
公开(公告)号：US07738563B2
公开(公告)日：2010-06-15
申请号：US10887132
申请日：2004-07-08
申请人： Oskar Pelc , Michael Zarubinsky , David Young
发明人： Oskar Pelc , Michael Zarubinsky , David Young
IPC分类号： H04N7/12 , G06K9/40
CPC分类号： H04N19/86 , H04N19/197 , H04N19/42 , H04N19/80
摘要： A system and method for filtering a frame, the method includes: (i) processing, by a processing unit executing instructions, at least one portion of a frame to provide at least one processed frame portion; (ii) performing, by a hardware filter, deblocking filtering of the at least one processed frame portion to provide at least one filtered frame portion; and (ii) storing the at least one filtered frame portion in a memory unit that is accessible by the processing unit; whereas the stage of processing is responsive to previously filtered frame portions. The system includes: (i) a processing unit, adapted to execute instructions such as to process at least one portion of a frame to provide at least one processed frame portion; (ii) a hardware filter, connected to the processing unit, adapted to deblocking filter the at least one processed frame portion to provide at least one filtered frame portion; and (iii) a memory unit, connected to the processing unit, adapted to store the at least one filtered frame portion; whereas the processing unit is adapted to process the at least one portion in response to previously filtered frame portions.
摘要翻译：一种用于过滤帧的系统和方法，所述方法包括：（i）通过执行指令的处理单元处理帧的至少一部分以提供至少一个经处理的帧部分; （ii）通过硬件滤波器执行所述至少一个经处理的帧部分的去块滤波以提供至少一个滤波的帧部分; 以及（ii）将所述至少一个滤波的帧部分存储在可由所述处理单元访问的存储器单元中; 而处理阶段响应于先前滤波的帧部分。该系统包括：（i）处理单元，适于执行诸如处理帧的至少一部分以提供至少一个已处理帧部分的指令; （ii）连接到所述处理单元的硬件滤波器，适于对所述至少一个经处理的帧部分进行去块滤波，以提供至少一个滤波的帧部分; 和（iii）连接到所述处理单元的适于存储所述至少一个滤波的帧部分的存储器单元; 而处理单元适于响应于先前滤波的帧部分来处理该至少一个部分。

13. 发明授权

US06380811B1 Signal generator, and method 有权
标题翻译：信号发生器和方法
公开(公告)号：US06380811B1
公开(公告)日：2002-04-30
申请号：US09784279
申请日：2001-02-16
申请人： Michael Zarubinsky , Konstantin Berman , Eliav Zipper
发明人： Michael Zarubinsky , Konstantin Berman , Eliav Zipper
IPC分类号： H03L706
CPC分类号： H03L7/0993 , H03L7/085 , H03L7/23
摘要： A signal generator (100) receives an input clock signal (X1) at a first frequency (F1) and derives an output clock signal (Y) at a second frequency (FY). An arrangement (110) using a first intermediate signal (Z) receives the input clock signal (X1) and provides a second intermediate signal (X2) by selectively providing transitions (119) of the second intermediate signal (X2) at time intervals (T2(n)) that are determined by a variable number (A+P(n)) of periods (TZ) of the first intermediate signal (Z). The second intermediate signal (X2) has a frequency (F2) that is in average (F′2) higher than the first frequency (F1). A phase-looked loop (PLL) circuit (180) locks at this average frequency (F′2) and provides the output clock signal (Y).
摘要翻译：信号发生器（100）以第一频率（F1）接收输入时钟信号（X1），并以第二频率（FY）导出输出时钟信号（Y）。使用第一中间信号（Z）的装置（110）通过选择性地以时间间隔（T2）提供第二中间信号（X2）的转变（119）来接收输入时钟信号（X1）并提供第二中间信号（X2）（N）），其由第一中间信号（Z）的周期（TZ）的可变数（A + P（n））确定。第二中间信号（X2）具有比第一频率（F1）高的平均值（F'2）的频率（F2）。相位环路（PLL）电路（180）以该平均频率（F'2）锁定并提供输出时钟信号（Y）。

14. 发明授权

US06181168B2 High speed phase detector and a method for detecting phase difference 有权
标题翻译：高速相位检测器和相位差检测方法
公开(公告)号：US06181168B2
公开(公告)日：2001-01-30
申请号：US09405191
申请日：1999-09-24
申请人： Michael Zarubinsky , Eliav Zipper , Leonid Tsukerman
发明人： Michael Zarubinsky , Eliav Zipper , Leonid Tsukerman
IPC分类号： H03D1300
CPC分类号： H03D13/002
摘要： A phase detector and a method for detecting phase difference between two high frequency signals, the phase detector is adapted to receive a reference signal REF, a high frequency signal ICOS, and a signal FD synchronized to ICOS. REF, ICOS and FD have opposite edges. The phase detector comprising of: An asynchronous phase detector circuit, for providing an asynchronous control signal CTP, for representing a time interval between a time of occurrence of an edge of REF and the time of occurrence of a corresponding edge of ICOS. A synchronous phase detector circuit, for providing an synchronous control signal TC, for representing a time interval between a time of the occurrence of the corresponding edge of ICOS and the time of occurrence of a corresponding edge of FD.A combing circuit, for receiving TC and CTP and providing an error signal ERS, representing the phase difference between REF and FD.
摘要翻译：相位检测器和用于检测两个高频信号之间的相位差的方法，相位检测器适于接收参考信号REF，高频信号ICOS和与ICOS同步的信号FD。 REF，ICOS和FD有相反的边。相位检测器包括：用于提供异步控制信号CTP的异步相位检测器电路，用于表示REF的边缘出现时间与ICOS的对应边缘出现时间之间的时间间隔。一种用于提供同步控制信号TC的同步相位检测器电路，用于表示ICOS的相应边缘出现的时间与FD的相应边缘的发生时间之间的时间间隔。一个组合电路，用于接收TC 和CTP，并提供表示REF和FD之间的相位差的误差信号ERS。

15. 发明授权

US5903232A Apparatus and method for sampling rate conversion with rational factors 失效
标题翻译：具有理性因素的采样率转换的装置和方法
公开(公告)号：US5903232A
公开(公告)日：1999-05-11
申请号：US943715
申请日：1997-10-03
申请人： Michael Zarubinsky , Vladimir Koifman , Eliezer Sand
发明人： Michael Zarubinsky , Vladimir Koifman , Eliezer Sand
IPC分类号： H03H17/06 , H03M7/00
CPC分类号： H03H17/0685
摘要： A rational decimation circuit (200) has an integration filter (210) and an FIR-filter (220). The integration filter (210) has N serially arranged integrator blocks (230-n) and an interpolator block (250). The FIR-filter (220) has K filter channels (260-k) and a commutator (290) which are controlled by a control block (300). Each channel (260-k) has a multiplier unit (270-k) and an accumulator unit (280-k).The integration filter (210) has a transfer function with N-fold poles and the FIR-filter (220) has a transfer function with zeros which cancel the poles. FIR-coefficients h.sub.k (T.sub.V) in the FIR-filter (220) are related to the F.sub.V /F.sub.X ratio of the interpolator block (250) and to the number N of integrator blocks (230-n). A method is also described.
摘要翻译：有理抽取电路（200）具有积分滤波器（210）和FIR滤波器（220）。积分滤波器（210）具有N个串行排列的积分器块（230-n）和内插器块（250）。 FIR滤波器（220）具有由控制块（300）控制的K个滤波器通道（260-k）和换向器（290）。每个信道（260-k）具有乘法器单元（270-k）和累加器单元（280-k）。积分滤波器（210）具有N倍极的传递函数，并且FIR滤波器（220）具有消除极点的零的传递函数。 FIR滤波器（220）中的FIR系数hk（TV）与内插器块（250）的FV / FX比和积分器块（230-n）的数量N有关。还描述了一种方法。

16. 发明授权

US5889482A Analog-to-digital converter using dither and method for converting analog signals to digital signals 失效
标题翻译：使用抖动的模数转换器和将模拟信号转换为数字信号的方法
公开(公告)号：US5889482A
公开(公告)日：1999-03-30
申请号：US944639
申请日：1997-10-06
申请人： Michael Zarubinsky , Yachin Afek , Vladimir Koifman
发明人： Michael Zarubinsky , Yachin Afek , Vladimir Koifman
IPC分类号： H03M3/02 , H03M1/20
CPC分类号： H03M3/33 , H03M3/458
摘要： An analog-to-digital converter (100) has a first path (110) with a first sigma-delta modulator (114) which transforms an analog input signal X.sub.0 (111') from an input terminal (101) to a digital output signal Y.sub.0 at an output terminal (102). In a second path (120), a digital dither signal D (121') is combined with a digital intermediate signal Z.sub.0 (115') from the first modulator (114) and digitally processed by a second sigma-delta modulator (124) to an intermediate signal Y.sub.1 (125') Y.sub.1 is fed to the first modulator (114) and to the output terminal (102) with opposite sign ("+" and "-", respectively). Thereby, multipliers (133 and 127) attenuate Y.sub.1. The dither signal D (121') is used substantially only within the converter (100), and is substantially canceled before the output terminal (102). This features preserve a high SNR of the converter (100) and low spectral tones in output signal Y.sub.0.
摘要翻译：模拟 - 数字转换器（100）具有第一路径（110），其具有将来自输入端（101）的模拟输入信号X0（111'）变换成数字输出信号的第一Σ-Δ调制器（114） Y0在输出端子（102）处。在第二路径（120）中，将数字抖动信号D（121'）与来自第一调制器（114）的数字中间信号Z0（115'）组合并由第二Σ-Δ调制器（124）进行数字处理，中间信号Y1（125'）Y1以相反的符号（分别为“+”和“ - ”）馈送到第一调制器（114）和输出端子（102）。由此，乘法器（133和127）衰减Y1。抖动信号D（121'）基本上仅在转换器（100）内使用，并且在输出端（102）之前基本上被消除。这特征保留了转换器（100）的高SNR和输出信号Y0中的低频谱。

17. 发明授权

US10102828B2 Method and apparatus for adaptive graphics compression and display buffer switching 有权
公开(公告)号：US10102828B2
公开(公告)日：2018-10-16
申请号：US14655183
申请日：2013-01-09
申请人： Michael Priel , Ran Ferderber , Michael Zarubinsky
发明人： Michael Priel , Ran Ferderber , Michael Zarubinsky
IPC分类号： G09G5/00 , G09G5/377 , G09G5/36 , G09G5/397
摘要： There is provided a multimedia computing apparatus for processing and displaying video data with overlay graphic data, said multimedia computing apparatus comprising a compression unit arranged to compress graphic overlay data prior to storage of said compressed overlay graphic data in a compressed display buffer, and a control unit arranged to determine when to compress the overlay graphic data dependent upon a refresh parameter of the overlay graphic data. There is also provided a method of adaptively compressing graphics data in a multimedia computing system comprising dynamically controlling compression of graphic overlay data in a display buffer dependent upon a refresh parameter of the graphic overlay data.

18. 发明授权

US08532424B2 Method and system for filtering image data 有权
标题翻译：用于过滤图像数据的方法和系统
公开(公告)号：US08532424B2
公开(公告)日：2013-09-10
申请号：US12094572
申请日：2005-11-22
申请人： Michael Zarubinsky , Roy Kehat , Alexander Sverdlov
发明人： Michael Zarubinsky , Roy Kehat , Alexander Sverdlov
IPC分类号： G06K9/40
CPC分类号： H04N19/86 , H04N19/117 , H04N19/136 , H04N19/42
摘要： A device that includes at least one memory unit adapted to store image data; the device is characterized by including a configurable filter adapted to apply de-ringing filtering and de-blocking filtering such as to filter image data retrieved from the at least one memory unit, whereas the device is adapted to repetitively determine a configuration of the configurable filter in response to received image data and to at least one mode selection rule and to configure the configurable filter in response to the determination. A method for filtering image data, the method includes receiving or defining filtering mode selection rules; and receiving image data; whereas the method is characterized by including repeating the stages of: determining a configuration of a configurable filter that is adapted to perform de-ringing and de-blocking filtering, in response to the received image data and to at least one mode selection rule; configuring the configurable filter in response to the determination; and filtering, by the configurable filter, image data.
摘要翻译：一种包括适于存储图像数据的至少一个存储单元的装置; 该设备的特征在于包括适合于应用去振荡滤波和去块滤波的可配置滤波器，例如对从至少一个存储器单元检索的图像数据进行滤波，而该装置适于重复地确定可配置滤波器的配置响应于接收到的图像数据和至少一个模式选择规则并且响应于该确定来配置可配置的过滤器。一种用于过滤图像数据的方法，所述方法包括接收或定义过滤模式选择规则; 并接收图像数据; 而该方法的特征在于包括重复以下阶段：响应于所接收的图像数据和至少一个模式选择规则，确定适于执行去振铃和解块滤波的可配置滤波器的配置; 响应于确定配置可配置的过滤器; 并通过可配置的滤波器过滤图像数据。

19. 发明申请

US20090207191A1 METHOD FOR GAMMA CORRECTION AND A DEVICE HAVING GAMMA CORRECTION CAPABILITIES 有权
标题翻译：用于伽马校正的方法和具有伽马校正能力的装置
公开(公告)号：US20090207191A1
公开(公告)日：2009-08-20
申请号：US12305160
申请日：2006-07-12
申请人： Michael Zarubinsky , Konstantin Berman , Arnold Yanof
发明人： Michael Zarubinsky , Konstantin Berman , Arnold Yanof
IPC分类号： G09G5/10
CPC分类号： H04N5/202
摘要： A method and device for gamma compensation. The method includes: receiving a non-gamma compensated input; selecting, in response to the input value, a selected approximating interval out of a group of low-brightness approximating intervals and out of a group of high-brightness approximating intervals; wherein at least one low-brightness approximating interval is smaller than at least one high-brightness approximating interval and wherein at least one low-brightness approximating interval is smaller than at least one other low-brightness; wherein a low-brightness approximating interval is characterized by a low-brightness approximating interval slope and by a low-brightness approximating interval offset representative of an imaginary intersection point between a output value axis and between an imaginary line that extends from the low-brightness approximating interval towards the output value axis while having the low-brightness approximating interval slope; wherein a high-brightness approximating interval is characterized by a high-brightness approximating interval slope and by a high-brightness approximating interval offset representative of a start point of the high-brightness approximating interval; multiplying a portion of the input value by a selected approximating interval slope to provide an intermediate result; adding the intermediate result to a selected approximating interval offset to provide the gamma compensated output value; and outputting a gamma compensated output value.
摘要翻译：用于伽马补偿的方法和装置。该方法包括：接收非伽马补偿输入; 响应于所述输入值，从一组低亮度近似间隔和一组高亮度近似间隔中选择一个选定的近似间隔; 其中至少一个低亮度近似间隔小于至少一个高亮度近似间隔，并且其中至少一个低亮度近似间隔小于至少一个其它低亮度; 其中低亮度近似间隔由低亮度近似间隔斜率和低亮度近似间隔偏移表征，所述低亮度近似间隔偏移表示输出值轴之间的假想交点和从低亮度近似值延伸的假想线之间间隔朝向输出值轴，同时具有低亮度近似间隔斜率; 其中高亮度近似间隔的特征在于高亮度近似间隔斜率和表示高亮度近似间隔的开始点的高亮度近似间隔偏移; 将输入值的一部分乘以所选择的近似间隔斜率以提供中间结果; 将所述中间结果添加到选定的近似间隔偏移量以提供伽马补偿输出值; 并输出伽马补偿输出值。

20. 发明申请

US20090185544A1 METHOD FOR PROCESSING CDMA SIGNALS AND A DEVICE HAVING CDMA SIGNAL CAPABILITIES 有权
标题翻译：用于处理CDMA信号的方法和具有CDMA信号能力的设备
公开(公告)号：US20090185544A1
公开(公告)日：2009-07-23
申请号：US12375796
申请日：2006-08-02
申请人： Michael Zarubinsky , Boris Beri , Boaz Perlman , Leonid Smolyansky , Alexander Sverdlov
发明人： Michael Zarubinsky , Boris Beri , Boaz Perlman , Leonid Smolyansky , Alexander Sverdlov
IPC分类号： H04B7/216
CPC分类号： H04B1/7117 , H04B2201/7071
摘要： A device and a method for processing CDMA compliant signals. The method includes receiving input signals; selecting, for each time interval out of multiple evenly length successive time intervals, multiple selected channel processing tasks that are scheduled to be at least partially executed during the time interval; storing input data at a first input buffer and providing data associated with at least one selected processing task from a second input buffer during even time intervals; and storing input data at the second input buffer and providing data associated with at least one selected processing task from the first input buffer during odd time intervals.
摘要翻译：一种用于处理CDMA兼容信号的装置和方法。该方法包括接收输入信号; 在多个均匀长度的连续时间间隔内为每个时间间隔选择被调度为在该时间间隔期间至少部分地执行的多个选定的信道处理任务; 在第一输入缓冲器处存储输入数据，并且在偶数时间间隔期间从第二输入缓冲器提供与至少一个所选择的处理任务相关联的数据; 以及在第二输入缓冲器处存储输入数据，并且在奇数时间间隔期间从第一输入缓冲器提供与至少一个所选处理任务相关联的数据。

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