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    • 1. 发明授权
    • Apparatus and method for sampling rate conversion with rational factors
    • 具有理性因素的采样率转换的装置和方法
    • US5903232A
    • 1999-05-11
    • US943715
    • 1997-10-03
    • Michael ZarubinskyVladimir KoifmanEliezer Sand
    • Michael ZarubinskyVladimir KoifmanEliezer Sand
    • H03H17/06H03M7/00
    • H03H17/0685
    • A rational decimation circuit (200) has an integration filter (210) and an FIR-filter (220). The integration filter (210) has N serially arranged integrator blocks (230-n) and an interpolator block (250). The FIR-filter (220) has K filter channels (260-k) and a commutator (290) which are controlled by a control block (300). Each channel (260-k) has a multiplier unit (270-k) and an accumulator unit (280-k).The integration filter (210) has a transfer function with N-fold poles and the FIR-filter (220) has a transfer function with zeros which cancel the poles. FIR-coefficients h.sub.k (T.sub.V) in the FIR-filter (220) are related to the F.sub.V /F.sub.X ratio of the interpolator block (250) and to the number N of integrator blocks (230-n). A method is also described.
    • 有理抽取电路(200)具有积分滤波器(210)和FIR滤波器(220)。 积分滤波器(210)具有N个串行排列的积分器块(230-n)和内插器块(250)。 FIR滤波器(220)具有由控制块(300)控制的K个滤波器通道(260-k)和换向器(290)。 每个信道(260-k)具有乘法器单元(270-k)和累加器单元(280-k)。 积分滤波器(210)具有N倍极的传递函数,并且FIR滤波器(220)具有消除极点的零的传递函数。 FIR滤波器(220)中的FIR系数hk(TV)与内插器块(250)的FV / FX比和积分器块(230-n)的数量N有关。 还描述了一种方法。
    • 2. 发明授权
    • Fast start-up circuit
    • 快速启动电路
    • US5892381A
    • 1999-04-06
    • US868335
    • 1997-06-03
    • Vladimir KoifmanYachin AfekEliezer SandKiyoshi Kase
    • Vladimir KoifmanYachin AfekEliezer SandKiyoshi Kase
    • H03F1/00G05F1/46G05F3/16
    • G05F1/468
    • The rise time of a voltage Vo presented to a load, based on an input voltage Vi provided via an RC filter coupled to the load for removing higher frequency noise on Vo, is substantially reduced by providing a sensor circuit with differential inputs Vi, Vo. The sensor circuit drives a charger circuit coupled to a DC potential and the load so that rapid charging of C to Vo does not depend on R. As Vo approaches Vi, the sensor circuit deactivates the charger circuit to stop further charging and a latch coupled to the sensor circuit shuts off the sensor circuit to reduce power consumption while (Vo.about.Vi)>0. A current mirror buffer is desirably included between the sensor output and the latch for level shifting.
    • 基于通过耦合到负载的用于消除Vo上的更高频率噪声的RC滤波器提供的输入电压Vi,提供给负载的电压Vo的上升时间通过向具有差分输入Vi,Vo的传感器电路提供而大大减少。 传感器电路驱动耦合到直流电位和负载的充电器电路,使得C至Vo的快速充电不依赖于R.当Vo接近Vi时,传感器电路使充电器电路停用以停止进一步的充电,并将锁存器耦合到 传感器电路关闭传感器电路,以减少功耗(Vo差分Vi)> 0。 理想地,传感器输出和锁存器之间包括电流镜缓冲器以进行电平转换。
    • 3. 发明授权
    • Circuit compensating nonlinearities
    • 电路补偿非线性
    • US5939906A
    • 1999-08-17
    • US925161
    • 1997-09-08
    • Vladimir KoifmanYachin AfekEliezer Sand
    • Vladimir KoifmanYachin AfekEliezer Sand
    • G05F3/24H03F1/32H02M11/00
    • H03F1/3211G05F3/242
    • In a circuit (200), a differential pair (217/227) of transistors (210 and 220) receives a differential input signal (X.sub.1 -X.sub.2) from input terminals (211 and 221) and provides a differential output signal (Y.sub.1 -Y.sub.2) to output lines (215 and 225). The differential pair (217/227) is powered from a common constant current source (290) at a common node (205). Nonlinearities, such as cubic terms in a transfer function H=(Y.sub.1 -Y.sub.2)/(X.sub.1 -X.sub.2) caused by the transistors are compensated by compensation circuits (237 and 247). The compensation circuits (237 and 247) are coupled between the node (205) and the output lines (215 and 225). The compensation circuits (237 and 247) are controlled by the input signal (X.sub.1 -X.sub.2) and drain current from the node (205). Thereby, the currents going into the transistors (210 and 220) and the transistors gains (Y.sub.1 /X.sub.1 and Y.sub.2 /X.sub.2) are modified, so that nonlinearities are substantially canceled.
    • 在电路(200)中,晶体管(210和220)的差分对(217/227)从输入端(211和221)接收差分输入信号(X1-X2),并提供差分输出信号(Y1-Y2 )到输出线(215和225)。 差分对(217/227)由公共节点(205)上的公共恒流源(290)供电。 由晶体管引起的传递函数H =(Y1-Y2)/(X1-X2)中的三次项的非线性由补偿电路(237和247)补偿。 补偿电路(237和247)耦合在节点(205)和输出线(215和225)之间。 补偿电路(237和247)由输入信号(X1-X2)和来自节点(205)的漏极电流控制。 因此,进入晶体管(210和220)和晶体管增益(Y1 / X1和Y2 / X2)的电流被修改,使得非线性基本上被消除。