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    • 19. 发明授权
    • Silicon epitaxial wafer and method for manufacturing the same
    • 硅外延晶片及其制造方法
    • US06277501B1
    • 2001-08-21
    • US09230684
    • 1999-01-29
    • Takashi Fujikawa
    • Takashi Fujikawa
    • B32B1500
    • C30B29/06C30B15/00H01L21/3225Y10S428/93Y10S438/959Y10S438/974Y10T156/10Y10T428/12674Y10T428/31663
    • The present invention has as an objective providing a silicon epi-wafer, and a manufacturing method therefor, which simplifies processing as much as possible in an attempt to lower the cost of an epi-wafer, and which is capable of manifesting a sufficient IG effect even in low-temperature device fabrication processing of under 1080° C. in an epi-wafer, and furthermore, in device processing, which enhances gettering capabilities for a variety of impurities in wafer device processing, without performing, following wafer slicing, any process from which an EG effect can be anticipated. As for the silicon single crystal, which is grown via the CZ method so as to make the oxygen concentration relatively high, and to intentionally make the carbon concentration high, outstanding gettering capabilities are manifested in the wafer itself, without performing EG processing. And, in accordance with suitably controlling oxygen concentration and carbon concentration while pulling a single crystal, and performing short-duration annealing at a low temperature after silicon wafer slicing, [the present invention], in addition to furnishing IG capabilities, is capable of reducing the number of processes by not performing any of the various complex EG processes performed following conventional silicon wafer formation, strives to lower costs, makes possible the granting of IG capabilities, which are generated in low-temperature device processing that uses an epi-wafer, and, since EG is not needed even when two-side mirror finishing is required to realize high-precision planarity, makes possible the manufacture of a substrate capable of measures designed to increase precision.
    • 本发明的目的是提供一种硅外延晶片及其制造方法,其尽可能地简化了处理,以降低外延片的成本,并且能够表现出足够的IG效应 即使在外延晶片中低于1080℃的低温器件制造处理中,此外,在器件处理中,其提高晶片器件处理中的各种杂质的吸杂能力,而不执行晶片切片之后的任何工艺 从中可以预见到EG效应。 对于通过CZ方法生长以使氧浓度相对较高的硅单晶,并且有意地使碳浓度高,在晶片本身上表现出优异的吸气能力,而不进行EG处理。 并且,根据适当地控制氧浓度和碳浓度同时牵引单晶,并且在硅晶片切片之后在低温下进行短时间退火,[本发明]除了提供IG能力之外,还能够减少 通过不执行常规硅晶片形成之后执行的各种复杂EG工艺中的任何一个处理的次数,力求降低成本,使得可以授予在使用外延晶片的低温器件处理中产生的IG能力, 并且由于即使需要双面镜面精加工来实现高精度平面化也不需要EG,因此可以制造能够提高精度的措施。
    • 20. 发明授权
    • Active matrix substrate with concave portion in region at edge of pixel
electrode and method for fabricating the same using ashing treatment
    • 在像素电极的边缘处的区域中具有凹部的有源矩阵基板和使用灰化处理的其制造方法
    • US06091470A
    • 2000-07-18
    • US926574
    • 1997-09-04
    • Takashi FujikawaYoshiharu Kataoka
    • Takashi FujikawaYoshiharu Kataoka
    • G02F1/136G02F1/1362G02F1/1368G02F1/1333
    • G02F1/136227
    • An active-matrix substrate includes: two kinds of lines arranged in a matrix on an insulating plate; switching elements each provided in the vicinity of an intersection of the two kinds of lines; an insulating film for flattening, covering an entire surface of the insulating plate so as to flatten the uneven surface of the insulating plate due to the presence of the lines and the switching elements; and pixel electrodes provided in a matrix on the insulating film for flattening. A concave portion for preventing a short-circuit from occurring between the pixel electrodes during a production process is formed in a region of the insulating film for flattening which corresponds to a gap between pixel electrodes which are adjacent to each other. Also, a method for fabricating the active-matrix substrate includes the step of forming a concave portion for preventing a short-circuit from occurring between the pixel electrodes in an exposed portion of the insulating film for flattening at a gap between the pixel electrodes adjacent to each other, forming the concave portion by an ashing treatment after forming the pixel electrodes in a matrix.
    • 有源矩阵基板包括:在绝缘板上以矩阵布置的两种线; 各个设置在两条线路的交点附近的开关元件; 用于平坦化的绝缘膜,覆盖绝缘板的整个表面,以便由于线和开关元件的存在而使绝缘板的不平坦表面变平; 以及设置在绝缘膜上的矩阵中的像素电极用于平坦化。 在用于平坦化的绝缘膜的与彼此相邻的像素电极之间的间隙对应的区域中形成用于防止在制造工艺期间在像素电极之间发生短路的凹部。 此外,制造有源矩阵基板的方法包括形成用于防止在绝缘膜的暴露部分中的像素电极之间发生短路的凹部的步骤,用于在邻近的像素电极之间的间隙处变平 彼此形成像素电极之后通过灰化处理形成凹部。