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11. 发明授权

US08071187B2 Method for fabricating metallized ceramics substrate, metallized ceramics substrate fabricated by the method, and package 有权
标题翻译：用于制造金属化陶瓷衬底的方法，通过该方法制造的金属化陶瓷衬底和封装
公开(公告)号：US08071187B2
公开(公告)日：2011-12-06
申请号：US12161193
申请日：2007-01-23
申请人： Yasuyuki Yamamoto , Osamu Yatabe , Masakatsu Maeda
发明人： Yasuyuki Yamamoto , Osamu Yatabe , Masakatsu Maeda
IPC分类号： B29D22/00 , B32B7/02 , H01L23/15 , H05K5/06 , H05K7/02
CPC分类号： H01L23/15 , H01L23/10 , H01L2924/0002 , H01L2924/01079 , H05K1/092 , H05K3/4667 , H05K2201/0266 , H05K2201/0352 , Y10T428/131 , Y10T428/24355 , Y10T428/24917 , Y10T428/24926 , Y10T428/24942 , Y10T428/31 , H01L2924/00
摘要： A fabrication method for metallized a ceramics substrate including the steps of: forming a first conductive paste layer containing metallic powder on a sintered ceramics substrate; forming a second conductive paste layer containing metallic powder of which average particle diameter is different from that of metallic powder constituting the first conductive paste layer; and forming a first conductive layer and a second conductive paste layer. The surface roughness of the first conductive layer and the second conductive layer is different. By this method, it is possible to secure airtightness of the metallized ceramics substrate even if it is a multilayered substrate having a plurality of metallized layers.
摘要翻译：一种金属化陶瓷基板的制造方法，包括以下步骤：在烧结陶瓷基板上形成含有金属粉末的第一导电浆料层; 形成含有与构成第一导电糊层的金属粉末的平均粒径不同的金属粉末的第二导电膏层; 以及形成第一导电层和第二导电糊层。第一导电层和第二导电层的表面粗糙度不同。通过这种方法，即使是具有多个金属化层的多层基板，也可以确保金属化陶瓷基板的气密性。

12. 发明授权

US07974333B2 Semiconductor apparatus and radio circuit apparatus using the same 失效
标题翻译：半导体装置及其使用的无线电电路装置
公开(公告)号：US07974333B2
公开(公告)日：2011-07-05
申请号：US11994542
申请日：2006-06-27
申请人： Masakatsu Maeda
发明人： Masakatsu Maeda
IPC分类号： H04B1/38
CPC分类号： H04B1/30 , H03L7/183
摘要： A semiconductor apparatus includes a signal source 7 that outputs a signal of predetermined frequency, a frequency divider 15 that receives the output signal of the signal source and is capable of switching the output signal to two or more frequency division ratios, a delta-sigma modulator 16 that controls the frequency division ratio of the frequency divider, and a bandpass filter 17 that receives an output of the frequency divider. The frequency of the input signal of the frequency divider is divided by the frequency division ratio controlled by the delta-sigma modulator, and quantization noise appearing in the output of the frequency divider generated by the delta-sigma modulator is attenuated with the bandpass filter. The semiconductor apparatus easily can convert a signal output by a single signal source to a signal of predetermined frequency and supply a plurality of signals of predetermined frequency using a simple configuration with reduced chip size.
摘要翻译：半导体装置包括输出预定频率的信号的信号源7，接收信号源的输出信号并且能够将输出信号切换到两个或更多个分频比的分频器15，Δ-Σ调制器 16，其控制分频器的分频比，以及带通滤波器17，其接收分频器的输出。分频器的输入信号的频率除以由Δ-Σ调制器控制的分频比，并且由Δ-Σ调制器产生的分频器的输出中出现的量化噪声被带通滤波器衰减。半导体装置可以容易地将由单个信号源输出的信号转换为预定频率的信号，并且使用具有减小的芯片尺寸的简单配置来提供预定频率的多个信号。

13. 发明授权

US07973481B2 Nitride sintered body and method for manufacturing thereof 有权
公开(公告)号：US07973481B2
公开(公告)日：2011-07-05
申请号：US12767254
申请日：2010-04-26
申请人： Yasuyuki Yamamoto , Yukihiro Kanechika , Masakatsu Maeda
发明人： Yasuyuki Yamamoto , Yukihiro Kanechika , Masakatsu Maeda
IPC分类号： H01J17/16 , C04B35/00
CPC分类号： C04B35/64 , C04B35/581 , C04B35/62625 , C04B35/6264 , C04B35/6303 , C04B2235/3205 , C04B2235/3222 , C04B2235/3224 , C04B2235/3225 , C04B2235/5436 , C04B2235/5445 , C04B2235/652 , C04B2235/656 , C04B2235/658 , C04B2235/77 , C04B2235/85 , C04B2235/9607 , C04B2235/9646 , Y10T428/249921 , Y10T428/268
摘要： An insulating material high both in thermal conductivity and light reflectance, and a submount high in heat radiatability for mounting an LED element thereon, capable of raising a light utilization factor and quickly radiating heat generated from the element. For example, used as a substrate material of a submount is a nitride sintered body having a reflectance of light in the wavelength region of from 350 nm to 800 nm of 50% or more and a reflectance of light with a wavelength of 700 nm of 60% or more, obtained by sintering a preform consisting of a composition containing 100 parts by mass of aluminum nitride powder and 0.5 to 10 parts by mass of a compound containing an alkaline earth metal such as 3CaO×Al2O3 in an inert atmosphere containing a specific quantity of carbon vapor, or by burning a coat of a nitride paste applied on a base substrate having a heat resistance at a predetermined temperature.

14. 发明申请

US20100178461A1 METHOD FOR FABRICATING METALLIZED CERAMICS SUBSTRATE, METALLIZED CERAMICS SUBSTRATE FABRICATED BY THE METHOD, AND PACKAGE 有权
标题翻译：金属化陶瓷基板的制造方法，由该方法制成的金属化陶瓷基板和封装
公开(公告)号：US20100178461A1
公开(公告)日：2010-07-15
申请号：US12161193
申请日：2007-01-23
申请人： Yasuyuki Yamamoto , Osamu Yatabe , Masakatsu Maeda
发明人： Yasuyuki Yamamoto , Osamu Yatabe , Masakatsu Maeda
IPC分类号： B32B3/02 , B05D3/02
CPC分类号： H01L23/15 , H01L23/10 , H01L2924/0002 , H01L2924/01079 , H05K1/092 , H05K3/4667 , H05K2201/0266 , H05K2201/0352 , Y10T428/131 , Y10T428/24355 , Y10T428/24917 , Y10T428/24926 , Y10T428/24942 , Y10T428/31 , H01L2924/00
摘要： A fabrication method for metallized a ceramics substrate including the steps of: forming a first conductive paste layer containing metallic powder on a sintered ceramics substrate; forming a second conductive paste layer containing metallic powder of which average particle diameter is different from that of metallic powder constituting the first conductive paste layer; and forming a first conductive layer and a second conductive paste layer. The surface roughness of the first conductive layer and the second conductive layer is different. By this method, it is possible to secure airtightness of the metallized ceramics substrate even if it is a multilayered substrate having a plurality of metallized layers.
摘要翻译：一种金属化陶瓷基板的制造方法，包括以下步骤：在烧结陶瓷基板上形成含有金属粉末的第一导电浆料层; 形成含有与构成第一导电糊层的金属粉末的平均粒径不同的金属粉末的第二导电膏层; 以及形成第一导电层和第二导电糊层。第一导电层和第二导电层的表面粗糙度不同。通过这种方法，即使是具有多个金属化层的多层基板，也可以确保金属化陶瓷基板的气密性。

15. 发明申请

US20100065310A1 METHOD FOR MANUFACTURING METALLIZED CERAMIC SUBSTRATE CHIP 审中-公开
标题翻译：用于制造金属化陶瓷衬底芯片的方法
公开(公告)号：US20100065310A1
公开(公告)日：2010-03-18
申请号：US12516394
申请日：2007-11-29
申请人： Yasuyuki Yamamoto , Kouichi Yamamoto , Masakatsu Maeda
发明人： Yasuyuki Yamamoto , Kouichi Yamamoto , Masakatsu Maeda
IPC分类号： H05K1/03 , H01R43/00
CPC分类号： H05K3/0052 , H01L23/13 , H01L2924/0002 , H05K1/0306 , H05K2201/09036 , H05K2201/0909 , H05K2203/0228 , Y10T29/49117 , Y10T29/49124 , H01L2924/00
摘要： A method for manufacturing a substrate chip including the steps of: setting the thickness of at least a part of a metal wiring pattern unit provided on the raw substrate to be 0.1 μm to 5 μm; forming a groove for creating at least a crack in the surface of the ceramic substrate along a planned cutting line which passes through the part of the metal wiring pattern unit by using a cutting wheel having a cutter blade being formed into substantially V shape in cross section along the circumferential portion of the disk rotating wheel; and cutting the raw substrate by giving load from just behind of the groove. When manufacturing metallized ceramic substrate chips by cutting (dividing) the ceramic substrate on the surface of which wiring patterns made of a metal film is formed, the method is capable of effectively using the base material, inhibiting defects in the metallized portion, and efficiently manufacturing the substrate chips in high yield.
摘要翻译：一种用于制造衬底芯片的方法，包括以下步骤：将设置在原始衬底上的金属布线图案单元的至少一部分的厚度设定为0.1μm至5μm; 形成用于沿着规划的切割线在陶瓷基板的表面中至少形成裂纹的槽，该切割线穿过金属布线图案单元的一部分，通过使用具有切割刀的切割轮，该切割轮具有大致V形截面沿着盘旋转轮的圆周部分; 并通过从凹槽的后面施加载荷来切割原始基底。当通过在形成由金属膜制成的布线图案的表面上切割（分割）陶瓷基板来制造金属化陶瓷基板芯片时，该方法能够有效地使用基材，抑制金属化部分中的缺陷并有效地制造基片芯片产量高。

16. 发明申请

US20090096114A1 Epoxy Resin Composition and Semiconductor Device 失效
标题翻译：环氧树脂组合物和半导体装置
公开(公告)号：US20090096114A1
公开(公告)日：2009-04-16
申请号：US12270162
申请日：2008-11-13
申请人： Takahiro Kotani , Hidetoshi Seki , Masakatsu Maeda , Kazuya Shigeno , Yoshinori Nishitani
发明人： Takahiro Kotani , Hidetoshi Seki , Masakatsu Maeda , Kazuya Shigeno , Yoshinori Nishitani
IPC分类号： H01L23/29 , C08L63/00
CPC分类号： H01L23/295 , C08C19/06 , C08K3/013 , C08L13/00 , C08L15/00 , C08L61/06 , C08L63/00 , C09D163/00 , C09D163/08 , H01L21/56 , H01L23/293 , H01L2924/0002 , H01L2924/12044 , C08L2666/04 , C08L2666/02 , C08L2666/22 , H01L2924/00
摘要： An epoxy resin composition for encapsulating a semiconductor chip according to this invention comprises (A) a crystalline epoxy resin, (B) a phenol resin represented by general formula (1): wherein R1 and R2 are independently hydrogen or alkyl having 1 to 4 carbon atoms and two or more R1s or two or more R2s are the same or different; a is integer of 0 to 4; b is integer of 0 to 4; c is integer of 0 to 3; and n is average and is number of 0 to 10, (C) a (co)polymer containing butadiene-derived structural unit or its derivative, and (D) an inorganic filler in the amount of 80 wt % to 95 wt % both inclusive in the total epoxy resin composition.
摘要翻译：根据本发明的用于封装半导体芯片的环氧树脂组合物包含（A）结晶环氧树脂，（B）由通式（1）表示的酚醛树脂：其中R 1和R 2独立地为氢或具有1至4个碳的烷基原子和两个或更多个R 1或两个或更多个R 2相同或不同; a为0〜4的整数; b为0〜4的整数; c为0〜3的整数; n为平均值，为0〜10的数，（C）含有丁二烯衍生的结构单元或其衍生物的（共）聚合物，（D）80重量％〜95重量％的无机填料，在总环氧树脂组合物中。

17. 发明申请

US20050231295A1 Voltage controlled oscillator apparatus 失效
标题翻译：压控振荡器
公开(公告)号：US20050231295A1
公开(公告)日：2005-10-20
申请号：US11097863
申请日：2005-04-01
申请人： Masakatsu Maeda
发明人： Masakatsu Maeda
IPC分类号： H03B5/02 , H03B5/00 , H03B5/12
CPC分类号： H03B5/1228 , H03B5/1215 , H03B5/1243 , H03B5/1265
摘要： A voltage controlled oscillator apparatus includes at least two voltage controlled oscillators, each of the voltage controlled oscillators being formed on a semiconductor substrate and having an LC-resonant circuit including a three-terminal inductor or a two-terminal inductor, and a continuously variable capacitor, and an amplifier including n-channel transistors or n-channel transistors and p-channel transistors. Two of the three-terminal or two-terminal inductors constructing the first and second voltage controlled oscillators have a coil shape formed with a wiring layer of an integrated circuit formed on the semiconductor substrate, and one of the three-terminal or two-terminal inductors has such a shape that its inductance value differs from that of the other of the three-terminal or two-terminal inductors, and is disposed in a region inside of the other of the three-terminal or two-terminal inductors with respect to its planar shape. Broadband in oscillation frequencies can be achieved while avoiding deterioration of the phase noise characteristics and enlarged chip sizes.
摘要翻译：压控振荡器装置包括至少两个压控振荡器，每个压控振荡器形成在半导体衬底上并具有包括三端电感器或两端电感器的LC谐振电路，以及连续可变电容器以及包括n沟道晶体管或n沟道晶体管和p沟道晶体管的放大器。构成第一和第二压控振荡器的三端或二端电感器中的两个具有形成有形成在半导体衬底上的集成电路的布线层的线圈形状，并且三端或两端电感器具有这样的形状，即其电感值与三端子或两端子电感器的电感值不同，并且设置在三端子或两端子电感器的另一个内侧的区域相对于其平面形状。可以实现振荡频率的宽带，同时避免相位噪声特性的恶化和芯片尺寸的扩大。

18. 发明授权

US5665473A Package for mounting a semiconductor device 失效
标题翻译：用于安装半导体器件的封装
公开(公告)号：US5665473A
公开(公告)日：1997-09-09
申请号：US527225
申请日：1995-09-12
申请人： Tokio Okoshi , Yuka Kato , Hideki Okoshi , Kenichiro Miyahara , Masakatsu Maeda
发明人： Tokio Okoshi , Yuka Kato , Hideki Okoshi , Kenichiro Miyahara , Masakatsu Maeda
IPC分类号： H01L23/057 , H01L23/495 , B32B9/00
CPC分类号： H01L23/49537 , H01L23/057 , H01L24/49 , H01L2224/45014 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/49109 , H01L2224/85205 , H01L24/45 , H01L24/48 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/01013 , H01L2924/01014 , H01L2924/0102 , H01L2924/01022 , H01L2924/01023 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01041 , H01L2924/01042 , H01L2924/01045 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/01322 , H01L2924/014 , H01L2924/09701 , H01L2924/10253 , H01L2924/12042 , H01L2924/15153 , H01L2924/1517 , H01L2924/15311 , H01L2924/1532 , H01L2924/16195 , H01L2924/181 , H01L2924/19041 , H01L2924/20753 , H01L2924/30107 , H01L2924/3011 , Y10S428/901
摘要： A package for mounting a semiconductor device comprises a base plate and a conductive layer laminated onto the base plate via an adhesive layer. The modulus of elasticity at 25.degree. C. of the adhesive layer is 10 kg/mm.sup.2 or less.
摘要翻译：用于安装半导体器件的封装包括基板和通过粘合剂层层压到基板上的导电层。粘合剂层的25℃下的弹性模量为10kg / mm 2以下。

19. 发明申请

US20130337608A1 SEMICONDUCTOR DEVICE, AND PROCESS FOR MANUFACTURING SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件及制造半导体器件的工艺
公开(公告)号：US20130337608A1
公开(公告)日：2013-12-19
申请号：US14003404
申请日：2012-03-09
申请人： Takahiro Kotani , Masakatsu Maeda
发明人： Takahiro Kotani , Masakatsu Maeda
IPC分类号： H01L21/56
CPC分类号： H01L21/561 , H01L21/568 , H01L23/29 , H01L23/3128 , H01L23/49816 , H01L23/5389 , H01L24/19 , H01L24/20 , H01L24/96 , H01L25/0655 , H01L2224/12105 , H01L2224/13024 , H01L2224/96 , H01L2924/01029 , H01L2924/10253 , H01L2924/3511 , H01L2224/19 , H01L2924/00
摘要： According to the present invention, a structure of a semiconductor device in which adhesive deposits are reduced and yield is excellent; and a process for manufacturing the same can be provided. A process for manufacturing a semiconductor device according to the present invention includes: a step of arranging plural semiconductor elements (106) on a main surface of a thermal release adhesive layer (mount film); a step of forming an encapsulant layer (108), which encapsulates the plural semiconductor elements (106) on the main surface of the mount film, using a semiconductor-encapsulating resin composition; and a step of peeling off the mount film to expose a lower surface (30) of the encapsulant layer (108) and lower surfaces (20) of the semiconductor elements (106). A contact angle of the lower surface (30) of the encapsulant layer (108) is less than or equal to 70° when measured using formamide after the step of peeling off the mount film.
摘要翻译：根据本发明，其中粘合剂沉积物减少并且产率优异的半导体器件的结构; 并且可以提供其制造方法。根据本发明的半导体器件的制造方法包括：将多个半导体元件（106）布置在热剥离粘合剂层（安装膜）的主表面上的步骤; 使用半导体封装树脂组合物形成将所述多个半导体元件（106）封装在所述安装膜的主表面上的密封剂层（108）的工序; 以及剥离所述安装膜以暴露所述密封剂层（108）的下表面（30）和所述半导体元件（106）的下表面（20）的步骤。在剥离安装膜的步骤之后，使用甲酰胺测量时，密封剂层（108）的下表面（30）的接触角小于或等于70°。

20. 发明授权

US08309164B2 Metallized substrate and method for producing the same 有权
标题翻译：金属化基板及其制造方法
公开(公告)号：US08309164B2
公开(公告)日：2012-11-13
申请号：US12602828
申请日：2008-06-10
申请人： Tetsuo Imai , Osamu Yatabe , Masakatsu Maeda
发明人： Tetsuo Imai , Osamu Yatabe , Masakatsu Maeda
IPC分类号： B05D3/10 , B05D5/12 , B05D5/00
CPC分类号： H01L23/498 , B22F7/04 , B22F2998/00 , C22C5/02 , C22C5/04 , C22C19/03 , C22C27/04 , C22C32/0047 , C23C18/32 , C23C18/54 , C25D5/48 , C25D5/50 , H01L21/4853 , H01L23/15 , H01L23/49811 , H01L24/45 , H01L24/48 , H01L24/85 , H01L2224/45015 , H01L2224/45124 , H01L2224/45144 , H01L2224/48227 , H01L2224/48599 , H01L2224/48644 , H01L2224/48699 , H01L2224/48744 , H01L2224/85444 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/01011 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01027 , H01L2924/01028 , H01L2924/01033 , H01L2924/01042 , H01L2924/01046 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/15787 , H01L2924/20752 , Y10T428/12889 , H01L2924/00014 , B22F9/04 , H01L2924/00
摘要： A metallized substrate having, disposed in the order mentioned: a ceramics substrate; a high-melting point metal layer; a base nickel plating layer; a layered nickel-phosphorous plating layer; a diffusion-inhibiting plating layer; and a gold plating layer. The base nickel plating layer being any one of a nickel plating layer, a nickel-boron plating layer, or a nickel-cobalt plating layer. The diffusion-inhibiting plating layer being any one of a columnar nickel-phosphorous plating layer, a palladium-phosphorous plating layer, or a palladium plating layer. According to the above composition, even after heating the semiconductor chips in a mounted state, the metallized substrate can make the connection strength of wire bonding favorable.
摘要翻译：金属化基板，具有按照以下顺序设置的陶瓷基板; 高熔点金属层; 基底镍镀层; 层状镍 - 磷电镀层; 扩散抑制镀层; 和镀金层。基底镀镍层是镀镍层，镍 - 硼镀层或镍钴镀层中的任意一种。扩散抑制镀层是柱状镍 - 磷镀层，钯 - 磷镀层或钯镀层中的任一种。根据上述组成，即使在安装状态下加热半导体芯片之后，金属化基板也可以使引线接合的连接强度有利。

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