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11. 发明授权

US09859882B2 High voltage composite semiconductor device with protection for a low voltage device 有权
公开(公告)号：US09859882B2
公开(公告)日：2018-01-02
申请号：US13416252
申请日：2012-03-09
申请人： Jason Zhang , Tony Bramian
发明人： Jason Zhang , Tony Bramian
IPC分类号： H03K17/081 , H03K17/10 , H03K17/567
CPC分类号： H03K17/08116 , H03K17/107 , H03K17/567
摘要： There are disclosed herein various implementations of composite semiconductor devices including a voltage protected device. In one exemplary implementation, a normally OFF composite semiconductor device comprises a normally ON III-nitride power transistor having a first output capacitance, and a low voltage (LV) device cascoded with the normally ON III-nitride power transistor to form the normally OFF composite semiconductor device, the LV device having a second output capacitance. A ratio of the first output capacitance to the second output capacitance is set based on a ratio of a drain voltage of the normally ON III-nitride power transistor to a breakdown voltage of the LV device so as to provide voltage protection for the LV device.

12. 发明申请

US20130225998A1 Dispersive Ultrasound Technology as a Diagnostic Device for Traumatic Brain Injuries 有权
标题翻译：分散超声技术作为创伤性脑损伤的诊断装置
公开(公告)号：US20130225998A1
公开(公告)日：2013-08-29
申请号：US13407378
申请日：2012-02-28
申请人： Stergios Stergiopoulos , Andreas Freibert , Jason Zhang
发明人： Stergios Stergiopoulos , Andreas Freibert , Jason Zhang
IPC分类号： A61B8/08
CPC分类号： A61B8/0808 , A61B5/4064 , A61B8/0858 , G01N2291/048
摘要： Described herein is the use of ultrasound pulses at different frequencies to track the dispersion properties of intracranial tissues which may have been altered due to traumatic or other neurological brain injury. Dispersive ultrasound does not provide imaging, but it can provide data of significant diagnostic value by using decision support systems that can be trained as a medical diagnostic system for traumatic brain injuries applications to detect specific patterns of dispersion that are associated with specific intracranial injuries.
摘要翻译：这里描述的是使用不同频率的超声波脉冲跟踪可能由于创伤性或其他神经性脑损伤而改变的颅内组织的分散性质。分散超声不提供成像，但它可以通过使用可被训练为创伤性脑损伤应用的医学诊断系统的检测支持系统来提供具有显着诊断价值的数据，以检测与特定颅内损伤相关的特定分散模式。

13. 发明申请

US20120241756A1 High Voltage Composite Semiconductor Device with Protection for a Low Voltage Device 有权
标题翻译：具有低压器件保护的高压复合半导体器件
公开(公告)号：US20120241756A1
公开(公告)日：2012-09-27
申请号：US13416252
申请日：2012-03-09
申请人： Jason Zhang , Tony Bramian
发明人： Jason Zhang , Tony Bramian
IPC分类号： H01L29/20 , H01L27/06
CPC分类号： H03K17/08116 , H03K17/107 , H03K17/567
摘要： There are disclosed herein various implementations of composite semiconductor devices including a voltage protected device. In one exemplary implementation, a normally OFF composite semiconductor device comprises a normally ON III-nitride power transistor having a first output capacitance, and a low voltage (LV) device cascoded with the normally ON III-nitride power transistor to form the normally OFF composite semiconductor device, the LV device having a second output capacitance. A ratio of the first output capacitance to the second output capacitance is set based on a ratio of a drain voltage of the normally ON III-nitride power transistor to a breakdown voltage of the LV device so as to provide voltage protection for the LV device.
摘要翻译：这里公开了包括电压保护装置的复合半导体器件的各种实施方式。在一个示例性实施例中，正常关闭复合半导体器件包括具有第一输出电容的正常的III-III族氮化物功率晶体管和与正常的III型氮化物功率晶体管共同形成正常关断复合的低电压（LV）器件半导体器件，LV器件具有第二输出电容。第一输出电容与第二输出电容的比例基于正常导通的III族氮化物功率晶体管的漏极电压与LV器件的击穿电压的比设定，以便为LV器件提供电压保护。

14. 发明申请

US20120223322A1 III-Nitride Transistor Stacked with Diode in a Package 有权
标题翻译： III型氮化物晶体管与二极管堆叠在一起
公开(公告)号：US20120223322A1
公开(公告)日：2012-09-06
申请号：US13053646
申请日：2011-03-22
申请人： Heny Lin , Jason Zhang , Alberto Guerra
发明人： Heny Lin , Jason Zhang , Alberto Guerra
IPC分类号： H01L29/20
CPC分类号： H01L27/0727 , H01L23/49562 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/065 , H01L25/18 , H01L27/0605 , H01L29/2003 , H01L29/778 , H01L2224/2919 , H01L2224/32245 , H01L2224/45014 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48147 , H01L2224/48247 , H01L2224/48257 , H01L2224/49111 , H01L2224/73265 , H01L2924/01013 , H01L2924/01014 , H01L2924/10253 , H01L2924/10323 , H01L2924/1033 , H01L2924/10334 , H01L2924/10344 , H01L2924/10346 , H01L2924/12032 , H01L2924/12036 , H01L2924/12041 , H01L2924/1306 , H01L2924/19104 , H01L2924/30107 , H01L2924/00 , H01L2924/00014
摘要： One exemplary disclosed embodiment comprises a two-terminal stacked-die package including a diode, such as a silicon diode, stacked atop a III-nitride transistor, such that a cathode of the diode resides on and is electrically coupled to a source of the III-nitride transistor. A first terminal of the package is coupled to a drain of the III-nitride transistor, and a second terminal of the package is coupled to an anode of the diode. In this manner, devices such as cascoded rectifiers may be packaged in a stacked-die form, resulting in reduced parasitic inductance and resistance, improved thermal dissipation, smaller form factor, and lower manufacturing cost compared to conventional packages.
摘要翻译：一个示例性的公开的实施例包括二端子堆叠管芯封装，其包括二极管，例如硅二极管，堆叠在III族氮化物晶体管的顶部，使得二极管的阴极位于III的源极上并与其电耦合氮化晶体管。封装的第一端子耦合到III族氮化物晶体管的漏极，并且封装的第二端子耦合到二极管的阳极。以这种方式，诸如级联整流器的器件可以以堆叠的管芯形式封装，与常规封装相比，导致减小的寄生电感和电阻，改善的散热，更小的外形尺寸以及更低的制造成本。

15. 发明授权

US08063613B2 Power converter driver with split power supply 有权
标题翻译：电源转换器驱动器，带分电源
公开(公告)号：US08063613B2
公开(公告)日：2011-11-22
申请号：US11953950
申请日：2007-12-11
申请人： Michael A. Briere , Jason Zhang , HamidTony Bahramian
发明人： Michael A. Briere , Jason Zhang , HamidTony Bahramian
IPC分类号： G05F1/00
CPC分类号： H03K3/012 , H02M3/1588 , H02M7/538 , H03K17/6871 , H03K2217/0036 , Y02B70/1466
摘要： A power converter driver that is supplied with two different voltages.
摘要翻译：电源转换器驱动器，提供两种不同的电压。

16. 发明申请

US20090051225A1 GATE DRIVING SCHEME FOR DEPLETION MODE DEVICES IN BUCK CONVERTERS 有权
标题翻译：闸阀转换器中的取消模式装置的闸门驱动方案
公开(公告)号：US20090051225A1
公开(公告)日：2009-02-26
申请号：US12163100
申请日：2008-06-27
申请人： Bo Yang , Jason Zhang , Michael A. Briere
发明人： Bo Yang , Jason Zhang , Michael A. Briere
IPC分类号： H01H47/00
CPC分类号： H02M3/1588 , H02J7/0018 , H02J7/345 , Y02B40/90 , Y02B70/1466 , Y10T307/747
摘要： A circuit for driving a switching stage including control and sync switches series connected at a switching node, at least one of the control and sync switches being a normal ON depletion mode device, the circuit comprising a gate driver including first and second switching stages for generating gate drive signals for the sync and control switches, respectively, the first switching stage having a first driver output node and the second switching stage having a second driver output node, a signal from the first node driving the sync switch and a signal from the second node driving the control switch and a circuit connected to the first and second switching stages, the circuit including a first circuit providing a first voltage source, the first circuit being coupled to the first switching stage and to the sync switch, a first bias voltage from the first voltage source being switched by the first switching stage, the first switching stage having a first state wherein the sync switch is on, and a second state wherein the first bias voltage is switched to the gate of the sync switch to turn the sync switch off and a second circuit including a first energy storage device for charging with a second bias voltage, the second switching circuit having a first state, wherein the control switch is on when the sync switch is off and having a second state wherein the control switch is switched off when the sync switch is on by switching the second bias voltage to the gate of the control switch.
摘要翻译：一种用于驱动开关级的电路，包括连接在开关节点处的控制和同步开关串联，所述控制和同步开关中的至少一个是正常的导通耗尽型装置，所述电路包括栅极驱动器，所述栅极驱动器包括第一和第二开关级，用于产生分别具有用于同步和控制开关的栅极驱动信号，第一开关级具有第一驱动器输出节点，第二开关级具有第二驱动器输出节点，来自驱动同步开关的第一节点的信号和来自第二驱动器输出节点的信号节点驱动控制开关和连接到第一和第二开关级的电路，该电路包括提供第一电压源的第一电路，第一电路耦合到第一开关级和同步开关，第一偏置电压来自第一电压源由第一开关级切换，第一开关级具有第一状态，其中同步开关为o n和第二状态，其中第一偏置电压切换到同步开关的栅极以使同步开关断开，第二电路包括第二电路，第二电路包括用于以第二偏置电压充电的第一能量存储装置，第二开关电路具有第一状态，其中当同步开关关闭时，控制开关接通，并且具有第二状态，其中当同步开关接通时，通过将第二偏置电压切换到控制开关的门，控制开关被切断。

17. 发明授权

US07492138B2 Synchronous rectifier circuits and method for utilizing common source inductance of the synchronous FET 有权
标题翻译：同步整流电路和方法，用于同步FET的共源电感
公开(公告)号：US07492138B2
公开(公告)日：2009-02-17
申请号：US11096929
申请日：2005-04-01
申请人： Jason Zhang , Bo Yang
发明人： Jason Zhang , Bo Yang
IPC分类号： G05F1/00 , H02M3/335
CPC分类号： H02M3/33592 , H02M3/1588 , Y02B70/1466 , Y02B70/1475
摘要： A method of improving the operation of a synchronous rectifier circuit which includes a switching transistor and synchronous transistor, by providing an operatively effective value of inductance in the current path of the synchronous transistor; which is shared by the control terminal circuit path of the transistor and by selecting a synchronous transistor having a low resistance to a control signal provided at the control terminal, as well as improved synchronous rectifier circuits designed according to the method. When the transistors are MOSFETs, the inductance provided is preferably a purely parasitic common source inductance in the range of about 2 nH to about 3 nH. The synchronous transistor exhibits a low value of gate resistance to facilitate fast energy exchange between the common source inductance and the gate-source capacitance.
摘要翻译：一种通过在同步晶体管的电流路径中提供可操作有效的电感值来改善包括开关晶体管和同步晶体管的同步整流电路的操作的方法; 其由晶体管的控制端子电路路径共享，并且通过选择对控制端子处提供的控制信号具有低电阻的同步晶体管以及根据该方法设计的改进的同步整流器电路。当晶体管是MOSFET时，所提供的电感优选为大约2nH至大约3nH范围内的纯寄生共源电感。同步晶体管表现出低的栅极电阻值，以促进共源极电感和栅源电容之间的快速能量交换。

18. 发明申请

US20080150099A1 Local control of underfill flow on high density packages, packages and systems made therewith, and methods of making same 审中-公开
标题翻译：在高密度封装，封装和制造的系统上的底部填充流的局部控制及其制造方法
公开(公告)号：US20080150099A1
公开(公告)日：2008-06-26
申请号：US12074565
申请日：2008-03-04
申请人： Juan Landeros , Jason Zhang , Lejun Wang
发明人： Juan Landeros , Jason Zhang , Lejun Wang
IPC分类号： H05K13/04 , H01L21/00
CPC分类号： B23K1/0016 , B23K3/0623 , B23K3/08 , B23K2101/42 , H01L21/563 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/73 , H01L24/83 , H01L25/18 , H01L2224/131 , H01L2224/16225 , H01L2224/16227 , H01L2224/16237 , H01L2224/26175 , H01L2224/32225 , H01L2224/73204 , H01L2224/83385 , H01L2924/01029 , H01L2924/14 , H01L2924/1433 , H01L2924/14335 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H05K3/284 , H05K2201/10674 , H05K2201/10977 , Y10T29/49146 , H01L2924/014 , H01L2924/00
摘要： An article includes a mounting substrate, a passive component site on the mounting substrate, and an active component site on the mounting substrate. The article also includes a fluid flow barrier disposed local to the passive component site and spaced apart from the active component site. The fluid flow barrier can be a recess that resists fluid flow thereinto because of surface tension of the fluid when it meets-the recess edge. The fluid flow barrier can include a boundary that diverts fluid flow due to the angle of the recess edge as the fluid approaches it. An embodiment also includes a packaging system that includes the article and at least one passive component. An embodiment also includes a method of assembling the article or the packaging system.
摘要翻译：一种物品包括安装基板，安装基板上的无源部件位置和安装基板上的有源部件位置。该制品还包括设置在被动部件部位的局部并与活性部件部位间隔开的流体流动阻挡件。流体阻流层可以是当流体遇到凹口边缘时由于流体的表面张力而阻碍流体流动的凹槽。流体阻挡层可以包括当流体接近它时由于凹口边缘的角度而转移流体流动的边界。实施例还包括包括物品和至少一个无源部件的包装系统。实施例还包括组装物品或包装系统的方法。

19. 发明申请

US20080116589A1 Ball grid array package assembly with integrated voltage regulator 审中-公开
标题翻译：带集成稳压器的球栅阵列封装组件
公开(公告)号：US20080116589A1
公开(公告)日：2008-05-22
申请号：US11601266
申请日：2006-11-17
申请人： Zong-Fu Li , David England , Bobby Nikjou , Joseph T. Dibene , Hong Xie , Jason Zhang
发明人： Zong-Fu Li , David England , Bobby Nikjou , Joseph T. Dibene , Hong Xie , Jason Zhang
IPC分类号： H01L23/48 , H01L21/00 , H01L21/44
CPC分类号： H01L23/3128 , H01L21/563 , H01L23/3677 , H01L25/0657 , H01L2224/16225 , H01L2224/16227 , H01L2224/16235 , H01L2224/16237 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2225/06517 , H01L2225/06572 , H01L2924/01079 , H01L2924/15311 , H01L2924/19041 , H05K1/0262 , H05K1/182 , H05K2201/09072 , H05K2201/10734 , H01L2924/00
摘要： An integrated voltage regulator may be provided on the bottom of a ball grid array processor package. This may be done despite the fact that conventionally integrated voltage regulator chips are too thick to fit in the area normally available between the motherboard and the ball grid array package because that area is defined by solder balls of a necessarily limited height which is conventionally believed to be too small to accommodate the integrated voltage regulator.
摘要翻译：集成电压调节器可以设置在球栅阵列处理器封装的底部。尽管传统集成的电压调节器芯片太厚以至于不能装配在主板和球栅阵列封装之间通常可用的区域中，但是由于通常被认为是有限的高度的焊球限定了该区域太小，不能容纳集成稳压器。

20. 发明授权

US07359211B2 Local control of underfill flow on high density packages, packages and systems made therewith, and methods of making same 有权
标题翻译：在高密度封装，封装和制造的系统上的底部填充流的局部控制及其制造方法
公开(公告)号：US07359211B2
公开(公告)日：2008-04-15
申请号：US10791048
申请日：2004-03-02
申请人： Juan Landeros , Jason Zhang , Lejun Wang
发明人： Juan Landeros , Jason Zhang , Lejun Wang
IPC分类号： H05K7/00
CPC分类号： B23K1/0016 , B23K3/0623 , B23K3/08 , B23K2101/42 , H01L21/563 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/73 , H01L24/83 , H01L25/18 , H01L2224/131 , H01L2224/16225 , H01L2224/16227 , H01L2224/16237 , H01L2224/26175 , H01L2224/32225 , H01L2224/73204 , H01L2224/83385 , H01L2924/01029 , H01L2924/14 , H01L2924/1433 , H01L2924/14335 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H05K3/284 , H05K2201/10674 , H05K2201/10977 , Y10T29/49146 , H01L2924/014 , H01L2924/00
摘要： An article includes a mounting substrate, a passive component site on the mounting substrate, and an active component site on the mounting substrate. The article also includes a fluid flow barrier disposed local to the passive component site and spaced apart from the active component site. The fluid flow barrier can be a recess that resists fluid flow thereinto because of surface tension of the fluid when it meets the recess edge. The fluid flow barrier can include a boundary that diverts fluid flow due to the angle of the recess edge as the fluid approaches it. An embodiment also includes a packaging system that includes the article and at least one passive component. An embodiment also includes a method of assembling the article or the packaging system.
摘要翻译：一种物品包括安装基板，安装基板上的无源部件位置和安装基板上的有源部件位置。该制品还包括设置在被动部件部位的局部并与活性部件部位间隔开的流体流动阻挡件。流体阻挡层可以是当流体遇到凹陷边缘时由于流体的表面张力而阻止流体流入其中的凹槽。流体阻挡层可以包括当流体接近它时由于凹口边缘的角度而转移流体流动的边界。实施例还包括包括物品和至少一个无源部件的包装系统。实施例还包括组装物品或包装系统的方法。

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