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11. 发明申请

WO2017052662A1 STREAM IDENTIFIER LANE PROTECTION 审中-公开
标题翻译：潮流识别器LANE保护
公开(公告)号：WO2017052662A1
公开(公告)日：2017-03-30
申请号：PCT/US2015/052511
申请日：2015-09-26
申请人： INTEL CORPORATION
发明人： IYER, Venkatraman , WAGH, Mahesh , HOR, Joon Teik
IPC分类号： H04L1/00 , H04L1/20 , H04L29/06
CPC分类号： H04L1/00 , H04L1/0041 , H04L1/0045 , H04L1/0061 , H04L1/0072 , H04L1/0075 , H04L1/1607 , H04L1/20 , H04L29/06
摘要： Data of different types are received on a plurality of data lanes of a physical link. Particular data is received on at least a portion of the plurality of data lanes, and a stream signal, corresponding to the particular data, is received on another of the lanes of the physical link, where the particular data is of a particular type different from other data previously sent on the plurality of data lanes. The stream signal includes a code component indicating that the particular data is of the particular type and a parity component for use in identifying whether a bit error is present in the stream signal.
摘要翻译：在物理链路的多个数据通道上接收不同类型的数据。在多个数据通道的至少一部分上接收特定数据，并且在物理链路的另一个通道上接收对应于特定数据的流信号，其中特定数据是不同于先前在多条数据线上发送的其他数据。流信号包括指示特定数据是特定类型的代码组件和用于识别流信号中是否存在位错误的奇偶校验分量。

12. 发明申请

WO2016153662A1 PSEUDORANDOM BIT SEQUENCES IN AN INTERCONNECT 审中-公开
标题翻译：互连中的PSEUDORANDOM位比特序列
公开(公告)号：WO2016153662A1
公开(公告)日：2016-09-29
申请号：PCT/US2016/018842
申请日：2016-02-22
申请人： INTEL CORPORATION
发明人： WAGH, Mahesh , WU, Zuoguo , IYER, Venkatraman
IPC分类号： G01R31/317 , G01R31/3177 , G01R31/3183 , G06F13/42
CPC分类号： H04B3/46 , H04B3/32 , H04B3/487
摘要： In an example, a linear feedback shift register (LFSR) provides pseudorandom bit sequences (PRBSs) to an interconnect for training, testing, and scrambling purposes. The interconnect may include a state machine, with states including LOOPBACK, CENTERING, RECENTERING, and ACTIVE states, among others The interconnect is permitted to move from "CENTERING" to "LOOPBACK" via a sideband signal. In LOOPBACK, CENTERING, and RECENTERING, PRBSs are used for training and testing purposes to electrically characterize and test the interconnect, and to locate a midpoint for a reference voltage V ref. A unique, noncorrelated PRBS is provided to each lane, calculated using one common output bit. Multiple bits per lane may also be computed per clock cycle so that the LFSR can run at a slower clock rate than the interconnect. A selecting network may also be provided so that, as necessary, "victim," "aggressor," and "neutral" lanes may be provided for testing purposes.
摘要翻译：在一个示例中，线性反馈移位寄存器（LFSR）向用于训练，测试和加扰目的的互连提供伪随机比特序列（PRBS）。互连可以包括状态机，其中包括LOOPBACK，CENTERING，RECENTERING和ACTIVE状态等状态。互连允许经由边带信号从“CENTERING”移动到“LOOPBACK”。在LOOPBACK，CENTERING和RECENTERING中，PRBS用于训练和测试目的，用于电气表征和测试互连，并定位参考电压V ref的中点。使用一个公共输出位计算每个通道提供一个独特的，不相关的PRBS。每个时钟周期也可以计算每个通道的多个位，以便LFSR可以以比互连更慢的时钟速率运行。还可以提供选择网络，以便根据需要，可以为测试目的提供“受害者”，“侵略者”和“中立”通道。

13. 发明申请

WO2014149439A1 DEVICE, SYSTEM AND METHOD FOR COMMUNICATION WITH HETEROGENOUS PHYSICAL LAYERS 审中-公开
标题翻译：用于与异质物理层通信的装置，系统和方法
公开(公告)号：WO2014149439A1
公开(公告)日：2014-09-25
申请号：PCT/US2014/018438
申请日：2014-02-25
申请人： INTEL CORPORATION
发明人： PETHE, Akshay, G. , WAGH, Mahesh , KULKARNI, Manjari
IPC分类号： G06F13/38 , G06F13/14
CPC分类号： G06F13/4282 , G06F13/4027 , Y02D10/14 , Y02D10/151
摘要： A device to process data packets for communication across PHY layers which are of different respective communication protocols. In an embodiment, the device includes a first protocol stack and a second protocol stack which are each for a PCIe™ communication protocol. The first protocol stack and a second protocol stack may interface, respectively, with a first physical (PHY) layer and a second PHY layer of the device. The first protocol stack and the second protocol stack may exchange packets to facilitate communications via both the first PHY layer and the second PHY layer. In another embodiment, the first PHY layer is for communication according to the PCIe™ communication protocol and the second PHY layer is for communication according to another, comparatively low power communication protocol.
摘要翻译：用于处理数据分组以用于通过不同相应通信协议的PHY层进行通信的设备。在一个实施例中，该设备包括第一协议栈和第二协议栈，它们各自用于PCIe TM通信协议。第一协议栈和第二协议栈可分别与设备的第一物理（PHY）层和第二PHY层接口。第一协议栈和第二协议栈可以交换分组以促进通过第一PHY层和第二PHY层的通信。在另一个实施例中，第一PHY层用于根据PCIe TM通信协议进行通信，第二PHY层用于根据另一种较低功率通信协议进行通信。

14. 发明申请

WO2009045884A2 ADDRESS TRANSLATION CACHING AND I/O CACHE PERFORMANCE IMPROVEMENT IN VIRTUALIZED ENVIRONMENTS 审中-公开
标题翻译：地址翻译缓存和虚拟化环境中的I / O高速缓存性能改进
公开(公告)号：WO2009045884A2
公开(公告)日：2009-04-09
申请号：PCT/US2008/077819
申请日：2008-09-26
申请人： INTEL CORPORATION , WAGH, Mahesh , AJANOVIC, Jasmin
发明人： WAGH, Mahesh , AJANOVIC, Jasmin
IPC分类号： G06F12/08
CPC分类号： G06F12/08 , G06F12/023 , G06F12/10 , G06F12/1009 , G06F12/1027 , G06F12/121 , G06F2212/152
摘要： Methods and apparatus relating to improving address translation caching and/or input/output (I/O) cache performance in virtualized environments are described. In one embodiment, a hint provided by an endpoint device may be utilized to update information stored in an I/O cache. Such information may be utilized for implementation of a more efficient replacement policy in an embodiment. Other embodiments are also disclosed.
摘要翻译：描述了在虚拟化环境中改进地址转换缓存和/或输入/输出（I / O）缓存性能的方法和装置。在一个实施例中，由端点设备提供的提示可用于更新存储在I / O高速缓存中的信息。这样的信息可以用于在实施例中实现更有效的替换策略。还公开了其他实施例。

15. 发明申请

WO2018063707A1 VOLTAGE MODULATED CONTROL LANE 审中-公开
标题翻译：电压调节控制LANE
公开(公告)号：WO2018063707A1
公开(公告)日：2018-04-05
申请号：PCT/US2017/049343
申请日：2017-08-30
申请人： INTEL CORPORATION
发明人： IYER, Venkatraman , WU, Zuoguo , WAGH, Mahesh
IPC分类号： G06F13/40 , G06F13/42
CPC分类号： G06F13/4265 , G06F1/3253 , Y02D10/14 , Y02D10/151
摘要： A computing component is provided with physical layer logic to receive data on a physical link including a plurality of lanes, where the data is received from a particular component on one or more data lanes of the physical link. The physical layer is further to receive a stream signal on a particular one of the plurality of lanes of the physical link, where the stream signal is to identify a type of the data on the one or more data lanes, the type is one of a plurality of different types supported by the particular component, and the stream signal is encoded through voltage amplitude modulation on the particular lane.
摘要翻译：为物理层逻辑提供计算组件以在包括多个通道的物理链路上接收数据，其中从物理链路的一个或多个数据通道上的特定组件接收数据。物理层进一步在物理链路的多个通道中的特定通道上接收流信号，其中流信号将识别一个或多个数据通道上的数据的类型，该类型是由特定部件支持的多种不同类型，并且流信号通过特定通道上的电压幅度调制进行编码。

16. 发明申请

WO2016099627A1 DATA TRANSMISSION USING PCIe PROTOCOL VIA USB PORT 审中-公开
标题翻译：使用PCIe协议通过USB端口进行数据传输
公开(公告)号：WO2016099627A1
公开(公告)日：2016-06-23
申请号：PCT/US2015/053760
申请日：2015-10-02
申请人： INTEL CORPORATION
发明人： PETHE, Akshay G. , HARRIMAN, David J. , WAGH, Mahesh , ISMAIL, Abdul Hawk
IPC分类号： G06F13/42 , G06F13/38
CPC分类号： G06F13/102 , G06F1/266 , G06F1/3203 , G06F13/287 , G06F13/387 , G06F13/4022 , G06F13/4221 , G06F13/4282
摘要： Techniques for transmitted data through a USB port using a PCIe protocol are described herein. In one example, a method includes detecting a coupling of an apparatus and a PCIe compatible device via a Type-C connector and sending at least one vendor defined message to the PCIe compatible device. The method can also include receiving an alternate mode indicator corresponding to a data transfer via a PCIe protocol and sending an enter mode command to the PCIe compatible device to enable the data transfer between the apparatus and the PCIe compatible device via the PCIe protocol. Furthermore, the method can include transferring data between the apparatus and the PCIe compatible device via the Type-C connector with the PCIe protocol.
摘要翻译：本文描述了通过使用PCIe协议的USB端口传输的数据的技术。在一个示例中，一种方法包括经由Type-C连接器检测设备和PCIe兼容设备的耦合，并向PCIe兼容设备发送至少一个供应商定义的消息。该方法还可以包括经由PCIe协议接收对应于数据传输的备用模式指示符，并且向PCIe兼容设备发送输入模式命令，以通过PCIe协议启用设备与PCIe兼容设备之间的数据传输。此外，该方法可以包括经由具有PCIe协议的Type-C连接器在设备和PCIe兼容设备之间传送数据。

17. 发明申请

WO2015099719A1 MULTICHIP PACKAGE LINK 审中-公开
标题翻译：多媒体包链接
公开(公告)号：WO2015099719A1
公开(公告)日：2015-07-02
申请号：PCT/US2013/077744
申请日：2013-12-26
申请人： INTEL CORPORATION , WU, Zuoguo J. , WAGH, Mahesh , DAS SHARMA, Debendra , PASDAST, Gerald S. , AYYASAMY, Ananthan , LI, Xiaobei , BLANKENSHIP, Robert G. , SAFRANEK, Robert J.
发明人： WU, Zuoguo J. , WAGH, Mahesh , DAS SHARMA, Debendra , PASDAST, Gerald S. , AYYASAMY, Ananthan , LI, Xiaobei , BLANKENSHIP, Robert G. , SAFRANEK, Robert J.
IPC分类号： G06F13/14 , G06F13/38
CPC分类号： G06F13/4282 , G06F13/124 , G06F13/4273 , G06F15/173 , Y02D10/14 , Y02D10/151
摘要： Physical layer logic is provided that is to receive data on one or more data lanes of a physical link, receive a valid signal on another of the lanes of the physical link identifying that valid data is to follow assertion of the valid signal on the one or more data lanes, and receive a stream signal on another of the lanes of the physical link identifying a type of the data on the one or more data lanes.
摘要翻译：提供物理层逻辑，其是在物理链路的一个或多个数据通道上接收数据，在物理链路的另一个通道上接收一个有效信号，该有效信号标识该有效数据将跟随有效信号在一个或更多的数据通道，并且在物理链路的另一个通道上接收标识在一个或多个数据通道上的数据类型的流信号。

18. 发明申请

WO2014004737A1 LOW POWER LOW FREQUENCY SQUELCH BREAK PROTOCOL 审中-公开
标题翻译：低功率低频率方案
公开(公告)号：WO2014004737A1
公开(公告)日：2014-01-03
申请号：PCT/US2013/048000
申请日：2013-06-26
申请人： INTEL CORPORATION , WAGH, Mahesh
发明人： WAGH, Mahesh
IPC分类号： G06F13/14 , G06F13/42
CPC分类号： G06F1/3253 , G06F1/3209 , G06F13/4282 , G06F2213/0026 , Y02D10/151
摘要： Methods and apparatus for provision of a low power, low frequency squelch break protocol are described. In some embodiments, a fixed or variable time transmitter LFPS (Low Frequency Periodic Signaling) mechanism may be used that does not require a handshake and therefore much simpler in implementation than USB3 (Universal Serial Bus 3.0), for example. Also, an embodiment does not require a link common mode to be established and therefore may be optimized to support shorter durations for effecting exit from an electrical idle state that may be established via power-gating, for example. Other embodiments are also disclosed.
摘要翻译：描述了提供低功率，低频静噪中断协议的方法和装置。在一些实施例中，例如可以使用固定或可变时间发射机LFPS（低频周期性信令）机制，其不需要握手，因此比USB3（通用串行总线3.0）简单得多。而且，实施例不需要建立链路共同模式，因此可以被优化以支持更短的持续时间，以实现例如通过电源门控建立的电空闲状态的退出。还公开了其他实施例。

19. 发明申请

WO2014004213A1 CONTROLLING A PHYSICAL LINK OF A FIRST PROTOCOL USING AN EXTENDED CAPABILITY STRUCTURE OF A SECOND PROTOCOL 审中-公开
标题翻译：使用第二个协议的扩展能力结构控制第一个协议的物理链接
公开(公告)号：WO2014004213A1
公开(公告)日：2014-01-03
申请号：PCT/US2013/046574
申请日：2013-06-19
申请人： INTEL CORPORATION
发明人： WAGH, Mahesh
IPC分类号： H04L29/06
CPC分类号： G06F13/4027 , G06F13/385 , G06F13/4265 , Y02D10/14 , Y02D10/151
摘要： In one embodiment, a method includes accessing a first field of a first link capabilities register of a first device having a protocol stack including a transaction layer and a link layer according to a first communication protocol and a physical layer of the protocol stack having a physical unit of a second communication protocol, using the first field as a pointer value to a location in a second link capabilities register of the first device, and using information from the location in the second link capabilities register to perform a configuration operation for a physical link coupled to the device. Other embodiments are described and claimed.
摘要翻译：在一个实施例中，一种方法包括访问第一设备的第一链路能力寄存器的第一字段，其具有根据第一通信协议的协议栈和具有物理层的协议栈的物理层的包括事务层和链路层的协议栈第二通信协议的单元，使用第一字段作为第一设备的第二链路能力寄存器中的位置的指针值，以及使用来自第二链路能力寄存器中的位置的信息来执行物理链路的配置操作耦合到设备。描述和要求保护其他实施例。

20. 发明申请

WO2013176951A1 PROVIDING A LOAD/STORE COMMUNICATION PROTOCOL WITH A LOW POWER PHYSICAL UNIT 审中-公开
标题翻译：提供具有低功率物理单元的负载/存储通信协议
公开(公告)号：WO2013176951A1
公开(公告)日：2013-11-28
申请号：PCT/US2013/041305
申请日：2013-05-16
申请人： INTEL CORPORATION
发明人： RANGANATHAN, Sridharan , WAGH, Mahesh , HARRIMAN, David J.
IPC分类号： H04L29/10 , H04L29/06
CPC分类号： G06F13/385 , G06F13/40 , H04L49/109
摘要： In one embodiment, a converged protocol stack can be used to unify communications from a first communication protocol to a second communication protocol to provide for data transfer across a physical interconnect. This stack can be incorporated in an apparatus that includes a protocol stack for a first communication protocol including transaction and link layers, and a physical (PHY) unit coupled to the protocol stack to provide communication between the apparatus and a device coupled to the apparatus via a physical link. This PHY unit may include a physical unit circuit according to the second communication protocol. Other embodiments are described and claimed.
摘要翻译：在一个实施例中，可以使用融合协议栈来将通信从第一通信协议统一到第二通信协议，以提供跨物理互连的数据传输。该堆叠可以并入包括用于包括交易和链路层的第一通信协议的协议栈的装置，以及耦合到协议栈的物理（PHY）单元，以在设备和耦合到装置的设备之间通信一个物理链接。该PHY单元可以包括根据第二通信协议的物理单元电路。描述和要求保护其他实施例。

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