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11. 发明授权

US07179704B2 Methods of forming capacitors with high dielectric layers and capacitors so formed 有权
标题翻译：形成具有高介电层和电容器的电容器的方法
公开(公告)号：US07179704B2
公开(公告)日：2007-02-20
申请号：US11002571
申请日：2004-12-02
申请人： Seung-hwan Lee , Jae-dong Byun , Sung-tae Kim , Young-sun Kim , Dal-won Lee , Song-won Ko
发明人： Seung-hwan Lee , Jae-dong Byun , Sung-tae Kim , Young-sun Kim , Dal-won Lee , Song-won Ko
IPC分类号： H01L21/8242
CPC分类号： H01L28/56
摘要： Methods of forming a capacitor of a semiconductor device can include forming a lower electrode of a capacitor on a semiconductor substrate and forming a dielectric material layer of Ba(Ti1-xSnx)O3 (BTS) or Ba(Ti1-xZrx)O3 (BTZ) on the lower electrode. An amorphous layer can be formed on the dielectric material layer. An upper electrode of the capacitor can be formed on the amorphous layer.
摘要翻译：形成半导体器件的电容器的方法可以包括在半导体衬底上形成电容器的下电极并形成Ba（Ti 1-x Sn Sn x x）的介电材料层 3）（3）（BTS）或Ba（Ti 1-x Zr x x）O 3（BTZ）在下电极上。可以在介电材料层上形成非晶层。可以在非晶层上形成电容器的上电极。

12. 发明授权

US06977634B2 Apparatus and method for driving image display device 有权
标题翻译：用于驱动图像显示装置的装置和方法
公开(公告)号：US06977634B2
公开(公告)日：2005-12-20
申请号：US10330296
申请日：2002-12-30
申请人： Young-sun Kim , Bong-hwan Cho
发明人： Young-sun Kim , Bong-hwan Cho
IPC分类号： G02F1/133 , G09G3/20 , G09G3/36
CPC分类号： G09G3/3659 , G09G3/3648 , G09G3/3688 , G09G2300/0809 , G09G2300/0842 , G09G2310/0251 , G09G2310/027
摘要： An apparatus and method are provided for driving an image display device by converting digital image data per pixel into an analog signal and driving a liquid crystal cell in response to the analog pixel signal, using a voltage charged with a driving circuit with a dual buffer structure. According to the apparatus, digital image data per pixel is converted into an analog signal to generate a voltage for driving an image display device, and an analog voltage for driving the image display device is generated using a driving circuit with a dual buffer structure. With the apparatus, it is possible to effectively prevent generation of undesired noise and display R.G.B. image signals using a single panel.
摘要翻译：提供一种装置和方法，用于通过将每像素的数字图像数据转换成模拟信号并且响应于模拟像素信号驱动液晶单元，使用带有双缓冲结构的驱动电路的电压来驱动图像显示装置。根据该装置，每像素的数字图像数据被转换为模拟信号以产生用于驱动图像显示装置的电压，并且使用具有双缓冲结构的驱动电路产生用于驱动图像显示装置的模拟电压。利用该装置，可以有效地防止产生不期望的噪声并显示R.G.B. 图像信号使用单个面板。

13. 发明申请

US20050225565A1 Display apparatus and control method thereof 有权
标题翻译：显示装置及其控制方法
公开(公告)号：US20050225565A1
公开(公告)日：2005-10-13
申请号：US11100458
申请日：2005-04-07
申请人： Hwa-seok Seong , Young-sun Kim , Jong-sul Min , Ho-seop Lee
发明人： Hwa-seok Seong , Young-sun Kim , Jong-sul Min , Ho-seop Lee
IPC分类号： H04N5/66 , G09G3/20 , G09G3/28 , G09G3/288 , G09G5/00
CPC分类号： G09G3/2077 , G09G3/2022 , G09G3/2059 , G09G2320/0247 , G09G2320/0261 , G09G2320/0266 , G09G2320/103 , G09G2320/106
摘要： A display apparatus that displays a picture based on a video signal, including a moving picture determiner that determines whether the video signal is used for displaying a moving picture; a moving picture gradation level table that stores information about a moving picture gradation level group for displaying the moving picture; a still picture gradation level table storing information about a still picture gradation level group including a predetermined number of gradation levels in consideration of a gradation level difference between the gradation levels of adjacent gradation levels in the case where the gradation level difference between the adjacent gradation levels of the moving picture gradation level group is larger than a predetermined reference gradation level difference; and a gradation level converter that converts the video signal to have the gradation level of the moving picture gradation level group or the still picture gradation level group according to results of the determination. With this configuration, a false contour is attenuated and a flicker is avoided in a moving picture.
摘要翻译：一种基于视频信号显示图像的显示装置，包括确定视频信号是否用于显示运动图像的运动图像确定器; 运动图像灰度级表，其存储关于用于显示运动图像的运动图像灰度等级组的信息; 在相邻灰度级之间的灰度级差异的情况下，考虑到相邻灰度级的灰度级之间的灰度级差，存储关于包括预定数量的灰度级的静止图像灰度级组的信息的静止图像灰度级表的运动图像灰度级组大于预定参考灰度级差; 以及灰度级转换器，其根据确定结果将视频信号转换为具有运动图像灰度等级组或静态图像灰度级组的灰度级。利用这种配置，假轮廓被衰减并且在运动图像中避免了闪烁。

14. 发明申请

US20050212026A1 Trench capacitors with insulating layer collars in undercut regions and method of fabricating the same 失效
标题翻译：在底切区域具有绝缘层套的沟槽电容器及其制造方法
公开(公告)号：US20050212026A1
公开(公告)日：2005-09-29
申请号：US11037626
申请日：2005-01-18
申请人： Suk-jin Chung , Seung-hwan Lee , Sung-tae Kim , Young-sun Kim , Jae-soon Lim , Young-geun Park
发明人： Suk-jin Chung , Seung-hwan Lee , Sung-tae Kim , Young-sun Kim , Jae-soon Lim , Young-geun Park
IPC分类号： H01L27/108 , H01L21/334 , H01L21/82 , H01L21/8242 , H01L29/94
CPC分类号： H01L27/10867 , H01L27/10829 , H01L27/1087 , H01L29/66181 , H01L29/945
摘要： Trench capacitors that have insulating layer collars in undercut regions and methods of fabricating such trench capacitors are provided. Some methods of fabricating a trench capacitor include forming a first layer on a substrate. A second layer is formed on the first layer opposite to the substrate. A mask is formed that has an opening on top of the first and second layers. A first trench is formed by removing a portion of the first and second layers through the opening in the mask. A portion of the first layer under the second layer is removed to form an undercut region under the second layer. An insulating layer collar is formed in the undercut region under the second layer. A second trench is formed that extends from the first trench by removing a portion of the substrate through the opening in the mask. A buried plate is formed in the substrate along the second trench. A dielectric layer is formed on an inner wall and bottom of the second trench. A storage electrode is formed in the second trench on the dielectric layer.
摘要翻译：提供了在底切区域中具有绝缘层套环的沟槽电容器和制造这种沟槽电容器的方法。制造沟槽电容器的一些方法包括在衬底上形成第一层。在与衬底相对的第一层上形成第二层。形成在第一和第二层的顶部上具有开口的掩模。通过从掩模中的开口去除第一层和第二层的一部分来形成第一沟槽。除去第二层下面的第一层的一部分，以在第二层下形成底切区域。在第二层下方的底切区域中形成绝缘层套环。形成第二沟槽，其通过从掩模中的开口去除衬底的一部分而从第一沟槽延伸。掩埋板沿着第二沟槽形成在衬底中。介电层形成在第二沟槽的内壁和底部上。在电介质层上的第二沟槽中形成存储电极。

15. 发明申请

US20050140590A1 Apparatus for generating ramp reset waveform for display panel and design method therefor 失效
标题翻译：用于生成显示面板的斜坡复位波形的装置及其设计方法
公开(公告)号：US20050140590A1
公开(公告)日：2005-06-30
申请号：US11003321
申请日：2004-12-06
申请人： Jeong-il Kang , Young-sun Kim , Chung-wook Roh
发明人： Jeong-il Kang , Young-sun Kim , Chung-wook Roh
IPC分类号： G09G3/20 , G09F9/313 , G09G3/288 , G09G3/291 , G09G3/292 , G09G3/294 , G09G3/296 , G09G3/298 , H01J17/49 , G09G3/28
CPC分类号： G09G3/296 , G09G3/2927 , G09G2330/028
摘要： A ramp reset waveform generating apparatus in a display panel driving apparatus for a display panel includes a current source which is connected to a first electrode sustain circuit of the display panel through a first terminal of the current source, and generates a current corresponding to a predetermined reference current; a first switching unit which switches current flow between a second terminal of the current source and a first electrode terminal of the display panel; and a second switching unit which switches current flow between the second terminal of the current source and a second electrode terminal of the display panel, wherein, in a reset period, a ramp reset waveform is generated in the first electrode terminal and the second electrode terminal by the charge or discharge process of the display panel by the current generated in the current source according to a predetermined switching sequence.
摘要翻译：用于显示面板的显示面板驱动装置中的斜坡复位波形发生装置包括：电流源，其通过电流源的第一端子连接到显示面板的第一电极维持电路，并产生对应于预定的参考电流; 第一切换单元，其切换电流源的第二端子与显示面板的第一电极端子之间的电流; 以及第二开关单元，其切换电流源的第二端子与显示面板的第二电极端子之间的电流，其中在复位时段中，在第一电极端子和第二电极端子中产生斜坡复位波形通过根据预定的切换顺序在电流源中产生的电流对显示面板进行充电或放电处理。

16. 发明授权

US6087226A Methods of forming capacitors including electrodes with hemispherical grained silicon layers on sidewalls thereof and related structures 失效
标题翻译：形成电容器的方法，其包括在其侧壁上具有半球形硅层的电极和相关结构
公开(公告)号：US6087226A
公开(公告)日：2000-07-11
申请号：US48501
申请日：1998-03-26
申请人： Young-sun Kim , Se-jin Shim , Cha-young Yoo , Young-wook Park
发明人： Young-sun Kim , Se-jin Shim , Cha-young Yoo , Young-wook Park
IPC分类号： H01L21/02 , H01L21/8242 , H01L21/8234
CPC分类号： H01L28/82 , H01L27/10852 , H01L28/84 , H01L28/90
摘要： A method of forming an integrated circuit device includes forming a conductive layer on an integrated circuit substrate, and forming a buffer layer on the conductive layer opposite the integrated circuit substrate. The buffer layer and the conductive layer are patterned to provide a mesa structure including the patterned buffer and conductive layers. A conductive spacer is formed along a sidewall of the mesa structure, and a hemispherical grained silicon layer is formed on the conductive spacer opposite the sidewall of the mesa structure. The patterned buffer layer is then removed after the step of forming the hemispherical grained silicon layer. Related structures are also discussed.
摘要翻译：形成集成电路器件的方法包括在集成电路衬底上形成导电层，并在与集成电路衬底相对的导电层上形成缓冲层。将缓冲层和导电层图案化以提供包括图案化缓冲层和导电层的台面结构。沿着台面结构的侧壁形成导电间隔物，并且在与台面结构的侧壁相对的导电间隔物上形成半球状的硅层。然后在形成半球形颗粒硅层的步骤之后去除图案化的缓冲层。还讨论了相关结构。

17. 发明授权

US6039811A Apparatus for fabricating polysilicon film for semiconductor device 失效
标题翻译：用于制造用于半导体器件的多晶硅膜的装置
公开(公告)号：US6039811A
公开(公告)日：2000-03-21
申请号：US871452
申请日：1997-06-09
申请人： Young-wook Park , Cha-young Yoo , Young-sun Kim , Seung-hee Nam
发明人： Young-wook Park , Cha-young Yoo , Young-sun Kim , Seung-hee Nam
IPC分类号： H01L21/28 , C23C16/24 , C23C16/44 , C23C16/54 , H01L21/205 , H01L21/677 , C23C16/00
CPC分类号： C23C16/54 , C23C16/24 , C23C16/4401
摘要： An apparatus for fabricating a semiconductor device having cooling jackets for preventing a gas from being exuded in a reaction chamber, thereby minimizing the generation of contaminating particles. The apparatus includes a reaction chamber having four cooling jackets respectively mounted on a first side wall adjacent to a wafer transfer chamber, a second side wall opposite to the first side wall, an upper wall and a bottom wall. A gate valve is disposed between the reaction chamber and the wafer transfer chamber and has a fifth cooling jacket. While fabricating a polysilicon film using the above apparatus, a pressure of a cassette chamber is controlled to be less than about 0.05 mtorr. Alternatively, a pressure of a cooling chamber and the wafer transfer are both controlled to be less than about 1.0 .mu.torr.
摘要翻译：一种用于制造具有用于防止气体渗透到反应室中的冷却夹套的半导体器件的装置，从而使污染颗粒的产生最小化。该装置包括具有分别安装在与晶片传送室相邻的第一侧壁上的四个冷却夹套的反应室，与第一侧壁相对的第二侧壁，上壁和底壁。闸阀设置在反应室和晶片传送室之间，并具有第五冷却套。在使用上述装置制造多晶硅膜的同时，将盒室的压力控制在小于约0.05毫托。或者，冷却室和晶片转移的压力都被控制为小于约1.0乇。

18. 发明授权

US5960281A Methods of fabricating microelectronic electrode structures using hemispherical grained (HSG) silicon 失效
标题翻译：使用半球晶粒（HSG）硅制造微电子电极结构的方法
公开(公告)号：US5960281A
公开(公告)日：1999-09-28
申请号：US861607
申请日：1997-05-22
申请人： Seung-hee Nam , Young-sun Kim , Young-wook Park
发明人： Seung-hee Nam , Young-sun Kim , Young-wook Park
IPC分类号： H01L29/41 , H01L21/02 , H01L21/8242 , H01L27/108
CPC分类号： H01L27/1085 , H01L28/84 , Y10S438/964
摘要： An electrode structure is fabricated on a microelectronic substrate by forming an amorphous silicon electrode on the microelectronic substrate and cleaning the surface of the amorphous silicon electrode to remove contaminants and surface oxides therefrom. A thin amorphous silicon layer is formed on the clean surface of the amorphous silicon electrode. Silicon crystal nuclei are then formed and grown on the thin amorphous silicon layer. The electrode structure may be used as a bottom electrode for an integrated circuit capacitor, such as the storage capacitor for an integrated circuit DRAM.
摘要翻译：通过在微电子衬底上形成非晶硅电极并清洁非晶硅电极的表面以除去其中的污染物和表面氧化物，在微电子衬底上制造电极结构。在非晶硅电极的清洁表面上形成薄的非晶硅层。然后在薄的非晶硅层上形成并生长硅晶核。电极结构可以用作集成电路电容器的底部电极，例如用于集成电路DRAM的存储电容器。

19. 发明授权

US08344439B2 Integrated circuit capacitors having composite dielectric layers therein containing crystallization inhibiting regions and methods of forming same 有权
标题翻译：集成电路电容器，其中包含结晶抑制区域的复合电介质层及其形成方法
公开(公告)号：US08344439B2
公开(公告)日：2013-01-01
申请号：US13171163
申请日：2011-06-28
申请人： Jae-hyoung Choi , Jung-hee Chung , Cha-young Yoo , Young-sun Kim , Se-hoon Oh
发明人： Jae-hyoung Choi , Jung-hee Chung , Cha-young Yoo , Young-sun Kim , Se-hoon Oh
IPC分类号： H01L29/94
CPC分类号： H01L29/92 , H01L27/10852 , H01L28/40
摘要： Integrated circuit capacitors have composite dielectric layers therein. These composite dielectric layers include crystallization inhibiting regions that operate to increase the overall crystallization temperature of the composite dielectric layer. An integrated circuit capacitor includes first and second capacitor electrodes and a capacitor dielectric layer extending between the first and second capacitor electrodes. The capacitor dielectric layer includes a composite of a first dielectric layer extending adjacent the first capacitor electrode, a second dielectric layer extending adjacent the second capacitor electrode and an electrically insulating crystallization inhibiting layer extending between the first and second dielectric layers. The electrically insulating crystallization inhibiting layer is formed of a material having a higher crystallization temperature characteristic relative to the first and second dielectric layers.
摘要翻译：集成电路电容器在其中具有复合电介质层。这些复合电介质层包括用于增加复合介电层的整体结晶温度的结晶抑制区。集成电路电容器包括第一和第二电容器电极和在第一和第二电容器电极之间延伸的电容器介电层。电容器介电层包括邻近第一电容器电极延伸的第一电介质层，邻近第二电容器电极延伸的第二电介质层和在第一和第二电介质层之间延伸的电绝缘的结晶抑制层的复合材料。电绝缘结晶抑制层由相对于第一和第二介电层具有较高结晶温度特性的材料形成。

20. 发明申请

US20110278698A1 Integrated Circuit Capacitors Having Composite Dielectric Layers Therein Containing Crystallization Inhibiting Regions and Methods of Forming Same 有权
标题翻译：具有复合介质层的集成电路电容器，其中包含结晶抑制区域和形成方法
公开(公告)号：US20110278698A1
公开(公告)日：2011-11-17
申请号：US13171163
申请日：2011-06-28
申请人： Jay-hyoung Choi , Jung-hee Chung , Cha-young Yoo , Young-sun Kim , So-hoon Oh
发明人： Jay-hyoung Choi , Jung-hee Chung , Cha-young Yoo , Young-sun Kim , So-hoon Oh
IPC分类号： H01L29/92
CPC分类号： H01L29/92 , H01L27/10852 , H01L28/40
摘要： Integrated circuit capacitors have composite dielectric layers therein. These composite dielectric layers include crystallization inhibiting regions that operate to increase the overall crystallization temperature of the composite dielectric layer. An integrated circuit capacitor includes first and second capacitor electrodes and a capacitor dielectric layer extending between the first and second capacitor electrodes. The capacitor dielectric layer includes a composite of a first dielectric layer extending adjacent the first capacitor electrode, a second dielectric layer extending adjacent the second capacitor electrode and an electrically insulating crystallization inhibiting layer extending between the first and second dielectric layers. The electrically insulating crystallization inhibiting layer is formed of a material having a higher crystallization temperature characteristic relative to the first and second dielectric layers.
摘要翻译：集成电路电容器在其中具有复合电介质层。这些复合电介质层包括用于增加复合介电层的整体结晶温度的结晶抑制区。集成电路电容器包括第一和第二电容器电极和在第一和第二电容器电极之间延伸的电容器介电层。电容器介电层包括邻近第一电容器电极延伸的第一电介质层，邻近第二电容器电极延伸的第二电介质层和在第一和第二电介质层之间延伸的电绝缘的结晶抑制层的复合材料。电绝缘结晶抑制层由相对于第一和第二介电层具有较高结晶温度特性的材料形成。

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