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11. 发明授权

US08772746B2 Semiconductor memory device 有权
标题翻译：半导体存储器件
公开(公告)号：US08772746B2
公开(公告)日：2014-07-08
申请号：US13349653
申请日：2012-01-13
申请人： Masaharu Kinoshita , Yoshitaka Sasago , Takashi Kobayashi
发明人： Masaharu Kinoshita , Yoshitaka Sasago , Takashi Kobayashi
IPC分类号： H01L47/00
CPC分类号： H01L45/06 , H01L27/2454 , H01L27/2472 , H01L45/144 , H01L45/1675
摘要： A semiconductor memory device in which the cell area can be decreased and the minimum feature size is not restricted by the thickness of the material forming the memory cell. In a semiconductor memory device, a gate insulating film, a channel extending in a direction X, and a resistance change element extending in the direction X are formed successively above multiple word lines extending in a direction Y, and a portion of the channel and a portion of the resistance change element are disposed above each of the plurality of the word lines. Such configuration can decrease the cell area and ensure the degree of design freedom.
摘要翻译：可以减小单元面积并且最小特征尺寸不受形成存储单元的材料的厚度的半导体存储器件。在半导体存储器件中，连续地沿着Y方向延伸的多个字线形成栅极绝缘膜，沿X方向延伸的沟道和沿X方向延伸的电阻变化元件，并且沟道的一部分和电阻变化元件的一部分设置在多条字线的上方。这样的配置可以减小单元面积并确保设计自由度。

12. 发明授权

US08758253B2 Ultrasonic probe and ultrasonic diagnostic apparatus using the same 有权
标题翻译：超声波探头和超声波诊断仪使用相同
公开(公告)号：US08758253B2
公开(公告)日：2014-06-24
申请号：US12513858
申请日：2007-11-06
申请人： Shuzo Sano , Akifumi Sako , Takashi Kobayashi , Mikio Izumi
发明人： Shuzo Sano , Akifumi Sako , Takashi Kobayashi , Mikio Izumi
IPC分类号： A61B8/14 , A61B8/00
CPC分类号： A61B8/4281 , A61B8/4455 , A61B8/4483 , B06B1/0292 , H04R19/005
摘要： An ultrasonic probe is disclosed which includes a cMUT chip having a plurality of vibration elements whose electromechanical coupling coefficient or sensitivity is changed according to a bias voltage and transmitting and receiving ultrasonic waves, an acoustic lens arranged above the cMUT chip, and a backing layer arranged below the cMUT chip. An electric leakage preventing unit is provided at the ultrasonic wave transmission/reception surface side of the acoustic lens or between the acoustic lens and the cMUT chip. The electric leakage preventing unit can be, for example, an insulating layer such as a ground layer. Such a structure makes it is possible to provide an ultrasonic probe capable of preventing electric leakage from the ultrasonic probe to an object to be examined so as to improve the electric safety and an ultrasonic diagnostic apparatus using the probe.
摘要翻译：公开了一种超声波探头，其包括具有多个振动元件的cMUT芯片，其中机电耦合系数或灵敏度根据偏置电压而变化，并且发送和接收超声波，布置在cMUT芯片上方的声透镜，以及布置在在cMUT芯片之下。在声透镜的超声波发送/接收表面侧或声透镜和cMUT芯片之间设置漏电防止单元。防漏电单元可以是例如绝缘层，例如接地层。通过这样的结构，能够提供能够防止从超声波探头向被检体的漏电以提高电气安全性的超声波探头以及使用该探针的超声波诊断装置。

13. 发明授权

US08642988B2 Non-volatile memory device 有权
标题翻译：非易失性存储器件
公开(公告)号：US08642988B2
公开(公告)日：2014-02-04
申请号：US13588112
申请日：2012-08-17
申请人： Masaharu Kinoshita , Yoshitaka Sasago , Takashi Kobayashi , Hiroyuki Minemura
发明人： Masaharu Kinoshita , Yoshitaka Sasago , Takashi Kobayashi , Hiroyuki Minemura
IPC分类号： H01L29/02
CPC分类号： H01L45/144 , G11C13/0004 , G11C2213/71 , G11C2213/74 , G11C2213/75 , G11C2213/78 , H01L27/2409 , H01L27/2481 , H01L45/06
摘要： A non-volatile memory device includes: a first line extending along a main surface of a substrate; a stack provided above the first line; a second line formed above the stack; a select element provided where the first and second lines intersect, the select element adapted to pass current in a direction perpendicular to the main surface; a second insulator film provided along a side surface of the stack; a channel layer provided along the second insulator film; an adhesion layer provided along the channel layer; and a variable resistance material layer provided along the adhesion layer, wherein the first and second lines are electrically connected via the select element and channel layer, a contact resistance via the adhesion layer between the channel layer and variable resistance material layer is low, and a resistance of the adhesion layer is high with respect to an extending direction of the channel layer.
摘要翻译：非易失性存储器件包括：沿衬底的主表面延伸的第一线; 提供在第一行之上的堆栈; 在堆叠之上形成第二线; 设置在所述第一和第二线相交的选择元件，所述选择元件适于在垂直于所述主表面的方向上传递电流; 沿着所述堆叠的侧表面设置的第二绝缘膜; 沿所述第二绝缘膜设置的沟道层; 沿着沟道层提供的粘合层; 以及沿着粘合层设置的可变电阻材料层，其中第一和第二线经由选择元件和沟道层电连接，通过沟道层和可变电阻材料层之间的粘合层的接触电阻低，并且粘合层的电阻相对于沟道层的延伸方向高。

14. 发明授权

US08558628B2 Piezoelectric vibrating piece, piezoelectric vibrator, oscillator, electronic apparatus, and radio timepiece 有权
标题翻译：压电振动片，压电振动器，振荡器，电子仪器和无线电钟表
公开(公告)号：US08558628B2
公开(公告)日：2013-10-15
申请号：US13369635
申请日：2012-02-09
申请人： Takashi Kobayashi
发明人： Takashi Kobayashi
IPC分类号： H01L41/053 , H03B5/32
CPC分类号： H03H3/02 , G04R20/10 , H03H9/21 , H03H2003/026
摘要： A piezoelectric vibrating piece includes a pair of vibration arm portions that is placed in a row in a width direction; a base portion to which proximal end sides in the pair of vibration arm portions in an extending direction are connected; and weight metal films that are formed on outer surfaces of the vibration arm portions, wherein the weight metal films are formed in positions that avoid regions of tip portions in the vibration arm portions in a longitudinal direction.
摘要翻译：压电振动片包括沿宽度方向排列成一排的一对振动臂部，所述一对振动臂部中的基端部朝向延伸方向连接的基部; 以及形成在所述振动臂部的外表面上的重量金属膜，其中所述重量金属膜形成为在纵向方向上避免所述振动臂部分中的尖端部分的区域的位置。

15. 发明授权

US08299805B2 Evaluation device and evaluation system evaluating whether a required output is made from the device to be evaluated 有权
标题翻译：评估装置和评估系统评估是否从要评估的装置进行所需的输出
公开(公告)号：US08299805B2
公开(公告)日：2012-10-30
申请号：US12018664
申请日：2008-01-23
申请人： Tomihiro Mugitani , Takashi Kobayashi , Tatsuhiko Nakajima
发明人： Tomihiro Mugitani , Takashi Kobayashi , Tatsuhiko Nakajima
IPC分类号： G01R27/02
CPC分类号： H04M1/24
摘要： An evaluation device 20 comprises a circuit element comprising respective pairs of inputs and outputs including several capacitances 25a-25c and resistances 26a-26d, one end of each being connected to both ends of the capacitances 25a-25c, wherein a resistance value of a signal input side is generally equal to that of a signal output side. The evaluation device 20 is further provided with a connecting terminal with an output device 10 for outputting signals to a device to be evaluated 30 on the signal input side, and is provided with a connecting terminal with the device to be evaluated 30 on the signal output side.
摘要翻译：评估装置20包括电路元件，其包括相应的输入和输出对，该对输入和输出包括若干电容25a-25c和电阻26a-26d，其一端连接到电容25a-25c的两端，其中信号的电阻值输入侧通常等于信号输出侧的输入侧。评估装置20还具有连接端子，其具有用于在信号输入侧向待评估装置30输出信号的输出装置10，并且在信号输出端上设置有待评估装置30的连接端子侧。

16. 发明授权

US08278700B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08278700B2
公开(公告)日：2012-10-02
申请号：US13072211
申请日：2011-03-25
申请人： Taro Osabe , Tomoyuki Ishii , Kazuo Yano , Takashi Kobayashi
发明人： Taro Osabe , Tomoyuki Ishii , Kazuo Yano , Takashi Kobayashi
IPC分类号： H01L29/792
CPC分类号： H01L27/11521 , B82Y10/00 , G11C16/0433 , G11C16/0458 , G11C16/0483 , G11C16/0491 , G11C16/10 , G11C16/26 , G11C2216/06 , H01L27/115 , H01L29/42332 , H01L29/42348 , H01L29/7887
摘要： For providing a cheap semiconductor memory device with improving reliability by level of a cell, in the place of escaping from defects on memory cells electrically, through such as ECC, and further for providing a cell structure enabling scaling-down in the vertical direction with maintaining the reliability, in a semiconductor memory device, upon which high-speeded read-out operation is required, a charge storage region is constructed with particles made from a large number of semiconductor charge storage small regions, each being independent, thereby increasing the reliability by the cell level.
摘要翻译：为了通过电池级提供具有提高可靠性的便宜的半导体存储器件，以代替通过诸如ECC的电存储器单元中的缺陷脱离，并且还用于提供能够在垂直方向上按比例缩小的单元结构，同时保持在需要高速读出操作的半导体存储器件中的可靠性，电荷存储区域由大量半导体电荷存储小区域制成的粒子构成，各自独立，从而通过细胞水平。

17. 发明授权

US08214982B2 Method of fabricating piezoelectric vibrating pieces 失效
标题翻译：制造压电振动片的方法
公开(公告)号：US08214982B2
公开(公告)日：2012-07-10
申请号：US12360435
申请日：2009-01-27
申请人： Takashi Kobayashi
发明人： Takashi Kobayashi
IPC分类号： H04R17/10 , H01L41/047
CPC分类号： H03H9/1021 , H03H3/02 , H03H9/0547 , H03H9/21 , Y10T29/42 , Y10T29/49147 , Y10T29/49155 , Y10T29/49574
摘要： To carry out frequency adjustment easily, accurately and efficiently without being influenced by a size of a piezoelectric vibrating piece and achieve low cost formation and promotion of maintenance performance, there is provided a method of fabricating a piezoelectric vibrating piece which is a method of fabricating a piezoelectric vibrating piece having a piezoelectric vibrating plate 11, a pair of exciting electrodes 12, 13, and a pair of mount electrodes 15, 16 by utilizing a wafer S, the method including an outer shape forming step of forming a frame portion S1 at a wafer and forming a plurality of piezoelectric plates at the frame portion to be connected thereto by way of a connecting portion 11a, an electrode forming step of forming pairs of exciting electrodes and pairs of mount electrodes respectively at the plurality of piezoelectric plates and forming a common electrode S2 respectively electrically connected to a plurality of the pairs of mount electrodes 15 on one side by way of the connecting portion, a frequency adjusting step of adjusting a frequency of the piezoelectric plate by applying a drive voltage between the common electrode and the mount electrode 16 on other side, and a cutting step of fragmenting the plurality of piezoelectric plates.
摘要翻译：为了容易地，准确而有效地进行频率调整而不受压电振动片的尺寸的影响，并且实现低成本形成和提高维护性能，提供了一种制造压电振动片的方法，该方法是制造具有压电振动板11的压电振动片，利用晶片S的一对激励电极12,13和一对安装电极15,16，该方法包括：外形形成步骤，以在晶片，并通过连接部分11a在框架部分形成多个压电板，电极形成步骤分别在多个压电板上形成一对激励电极和一对安装电极，并形成共同的电极S2分别电连接到一对侧的多对安装电极15上连接部分的ay;频率调节步骤，通过在公共电极和另一侧的安装电极16之间施加驱动电压来调节压电板的频率，以及分割多个压电板的切割步骤。

18. 发明授权

US08174229B2 Sample stage apparatus and method of controlling the same 有权
标题翻译：样品台装置及其控制方法
公开(公告)号：US08174229B2
公开(公告)日：2012-05-08
申请号：US12420358
申请日：2009-04-08
申请人： Masashi Fujita , Shuichi Nakagawa , Takashi Kobayashi
发明人： Masashi Fujita , Shuichi Nakagawa , Takashi Kobayashi
IPC分类号： B64C17/06
CPC分类号： H01J37/20 , H01J2237/20228 , H01J2237/20285 , H01J2237/20292
摘要： The present invention provides a stage apparatus capable of reducing a positioning time without increasing a positional deviation. A positioning control method of a sample stage apparatus includes: a high-speed movement step of moving a table to a high-speed movement target position at a first movement speed; a positional deviation correcting step of moving the table to a low-speed positioning step start position at a second movement speed that is lower than the first movement speed; a low-speed positioning step of moving the table to a target position at a third movement speed that is lower than the second movement speed. After the low-speed positioning step is completed, a rod connected to a motor returns to its original position to separate a pin of the rod side from a concave portion of the table side.
摘要翻译：本发明提供一种能够在不增加位置偏差的情况下减少定位时间的舞台装置。采样台装置的定位控制方法包括：以第一移动速度将桌子移动到高速移动目标位置的高速移动步骤; 位置偏差校正步骤，以低于第一移动速度的第二移动速度将桌子移动到低速定位步骤开始位置; 低速定位步骤，以低于第二移动速度的第三移动速度将桌子移动到目标位置。在低速定位步骤完成之后，连接到电动机的杆返回到其原始位置，以将杆侧的销与台侧的凹部分开。

19. 发明授权

US08173932B2 Perforation method and perforation apparatus 有权
标题翻译：穿孔法和穿孔装置
公开(公告)号：US08173932B2
公开(公告)日：2012-05-08
申请号：US12178263
申请日：2008-07-23
申请人： Takashi Kobayashi , Akihiro Nemoto , Hiroaki Yamagishi , Katsuyuki Nakajima
发明人： Takashi Kobayashi , Akihiro Nemoto , Hiroaki Yamagishi , Katsuyuki Nakajima
IPC分类号： B23K26/38
CPC分类号： B23K26/18 , B23K26/389
摘要： A perforation method and an perforation apparatus in which a hollow member of a fuel injection nozzle is filled with a filler such as a zirconia ball, and a laser light is applied to the hollow member to form an injection hole while vibrating the zirconia ball using an ultrasonic vibrator. After the injection hole is formed, the laser light is introduced through the injection hole to the inside of the fuel injection nozzle, and thereby is applied to the vibrated zirconia ball.
摘要翻译：一种穿孔方法和穿孔装置，其中燃料喷嘴的中空构件填充有诸如氧化锆球的填料，并且激光被施加到中空构件以形成喷射孔，同时使用超声波振动器。在形成注射孔之后，将激光通过注射孔引入燃料喷嘴的内部，由此施加到振动的氧化锆球上。

20. 发明授权

US08106395B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08106395B2
公开(公告)日：2012-01-31
申请号：US12113923
申请日：2008-05-01
申请人： Shuntaro Machida , Takashi Kobayashi
发明人： Shuntaro Machida , Takashi Kobayashi
IPC分类号： H01L21/66 , H01L23/58
CPC分类号： H01L22/32 , B81C99/0045 , G01R31/2884 , H01L21/78 , H01L2224/05554
摘要： A technique of manufacturing a semiconductor device capable of performing a probe test by a common test apparatus as normal LSI chips even for large-area chips is provided. A chip comprising a device formed on a device area by a semiconductor process and including a plurality of test areas sectioned by chip areas is prepared. Next, pads to be electrically connected to the device are formed at corresponding positions on the respective plurality of test areas. Subsequently, the respective test areas are tested by a same probe card via the plurality of pads.
摘要翻译：提供了即使对于大面积芯片也能够通过普通的测试装置进行探针测试的半导体器件的制造技术。制备包括通过半导体工艺在器件区域上形成并包括由芯片区域划分的多个测试区域的器件的芯片。接下来，在相应的多个测试区域上的相应位置处形成要与该器件电连接的焊盘。随后，通过多个焊盘通过相同的探针卡测试各个测试区域。

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