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    • 15. 发明专利
    • COMPOUND SEMICONDUCTOR DEVICE
    • JPH05226582A
    • 1993-09-03
    • JP2502892
    • 1992-02-12
    • HITACHI LTDHITACHI TOBU SEMICONDUCTOR LTD
    • YASUDA TAKESHI
    • H01L27/04H01L21/338H01L21/822H01L29/812
    • PURPOSE:To reduce a capacity area to 1/4 of that of conventional structures by a method wherein a vertical-type two-stage MIM (metal-insulator-metal- insulator-metal) structure is constituted as a parallel circuit. CONSTITUTION:Si ions are implanted partly into the main face of a GaAs substrate 1 at two states; an n-type channel layer 3 and ohmic layers 2, 4 are formed. Then, AuGe, W, Ni and Au are vapor-deposited on the main face of the wafer in this order; a drain electrode 7, a source electrode 8, a first-layer electrode 9 and a gate electrode 6 are formed. Then, an insulating film 11 is formed on the main face of the substrate; a metal film is sputtered onto it; it is patterned; electrodes 13, 14 are former. Then, an MIM capacity C1 is formed between the electrodes 9, 14. Then, an insulating layer is formed. In succession, a through hole is formed. In addition, a metal layer is sputtered; it is patterned; an electrode 15 is formed. Then, an MIM capacity C2 is formed between the metal electrodes 14, 15. Consequently, the capacities C1, C2 are connected in parallel; an element whose capacity is the same in 1/4 of a capacity area can be formed as compared with that in conventional structures constituted of an MIMIM structure.
    • 17. 发明专利
    • SEMICONDUCTOR ELEMENT
    • JPH01135075A
    • 1989-05-26
    • JP29212387
    • 1987-11-20
    • HITACHI LTDHITACHI TOBU SEMICONDUCTOR LTD
    • YASUDA TAKESHISAKAMOTO KAZUMICHI
    • H01L29/812H01L21/338H01L29/80
    • PURPOSE:To enhance an impurity concentration of an N-type layer and to increase a capacity by providing a leakage current blocking electrode of a Schottky barrier junction structure between a drain electrode and an ohmic electrode for forming a capacity. CONSTITUTION:An FET section 2 is formed of source region 4, drain region 5 made of n type layers, a channel region 6 made of an n-type layer extending between the regions, a source electrode 7 and a drain electrode 8, and a gate electrode 9. The electrodes 7, 8 are respectively ohmically contacted with the regions 4, 5, and the electrode 9 is formed with a Schottky barrier junction with the region 6. On the other hand, a capacity section is formed of a Schottky electrode 11 for a capacity formed on an n-type layer 10 for forming a capacity, and a drain current blocking electrode 14 for forming a surface leakage current blocking region provided between the electrode 11 and the electrode 8. A leakage current between the electrode 8 and an electrode 14 for blocking a leakage current is blocked by a depleted layer 15, not generated, and its breakdown strength is not deteriorated.
    • 18. 发明专利
    • SEMICONDUCTOR ELEMENT
    • JPS6451669A
    • 1989-02-27
    • JP20813887
    • 1987-08-24
    • HITACHI LTDHITACHI TOBU SEMICONDUCTOR LTD
    • YASUDA TAKESHISAKAMOTO KAZUMICHI
    • H01L29/80
    • PURPOSE:To improve cross-modulation characteristics and high frequency characteristics, by making the impurity concentration of an active layer immediately under a first gate lower than that of an active layer immediately under a second gate, and making the thickness of the active layer just under the first gate thinner than that of the active layer just under the second gate. CONSTITUTION:At the bottom of an active layer 6 just under a first gate electrode 7 of a dual gate GaAs.MES.FET chip 10, a P-type buried layer 11 is formed. As the result, the thickness d1 of an active layer 6 part just under a first gate electrode 7 becomes thinner than the thickness d2 of an active layer 6 part just under a second gate electrode 8. As to concentration, too, since a p-type buried layer 11 is previously formed, the impurity concentration n1 of the active layer just under the first gate electrode 7 becomes smaller than the impurity concentration n2 of the active layer 6 just under the second electrode 8. As the result, the pinch-off voltage in the first gate becomes shallow as compared with the second gate, so that the low voltage operation is enabled, and the mutual conductance is increased. Further, since the pinch-off voltage in the second gate becomes deeper than the first gate, the slow cut-off is enabled, so that cross modulation distortion is improved.