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11. 发明专利

JPH1116973A MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURED THERETHROUGH 失效
公开(公告)号：JPH1116973A
公开(公告)日：1999-01-22
申请号：JP16991497
申请日：1997-06-26
申请人： HITACHI LTD
发明人： FUKUDA KENICHIRO , OSHIMA YOSHIMASA , NISHIYAMA HIDETOSHI , NOGUCHI MINORU
IPC分类号： H01L21/66
摘要： PROBLEM TO BE SOLVED: To quickly find out processes where lots of defectives occur by a method wherein the process conditions of the processes where lots of defectives occur are controlled. SOLUTION: The type, process name, and lot number of a wafer to be monitored by each inspection equipment are initially set. The wafer is introduced, a foreign objects attached to the wafer are detected by an inspection equipment A after the wafer is subjected to a process N81, and the wafer is subjected to a simplified probe check with an inspection equipment C without delay. Then, after the wafer is subjected to a process M82, the external defects of the wafer are detected, and the wafer is subjected to a simplified probe check with the inspection equipment C at once. With the progress of processes, the calculation of correlations among the check devices is automatically carried out at a regular interval, and when the calculated correlations exceeds the previously set thresholds, the process conditions of the processes are regulated again so as to keep the wafer high in yield. The check of each chip of the wafer by the bit as an object of check is carried out the same as above, and the correlations are compared with each other by the bit, so that data are increased in volume, and the checks are improved in reliability.

12. 发明专利

JPH1030988A AUTOMATIC FOCUS CORRECTING METHOD AND APPARATUS THEREFOR 失效
公开(公告)号：JPH1030988A
公开(公告)日：1998-02-03
申请号：JP18440296
申请日：1996-07-15
申请人： HITACHI LTD , HITACHI ELECTR ENG
发明人： FUKUDA KENICHIRO , NOGUCHI MINORU , MORIOKA HIROSHI , SAKAI SHIGETOSHI , NISHIYAMA HIDETOSHI
IPC分类号： G01N21/88 , G01N21/94 , G01N21/956 , G02B7/28 , G03B13/36 , G03F9/00 , H01L21/027 , H01L21/66
摘要： PROBLEM TO BE SOLVED: To easily adjust the extent of focusing range corresponding to the positioning precision of a semiconductor substrate supporting mechanism of respective process apparatuses and at the same time, to improve the function of detecting foreign matters and improve the production yield by making the numerical apertures for illuminating light for detecting focal point changeable. SOLUTION: Light rays from a lighting source 101 such as a semiconductor laser pass through a lens 102a and reach an object work (a wafer) 4 whose focal point to be measured, and thus an image of the lighting source 101 is formed. Moreover, the image of the lighting source 101 focused on the work 4 is formed on a detector 105 by a lens 102b. The number of apertures of the lens 102a can be adjusted through an aperture diaphragm 103 by properly selecting lens stops with different sizes. That is, the size of the spot diameter of the work 4 can be adjusted by selecting the diameter of an aperture diaphragm 103. Consequently, the size of the spot diameter oon the detector 5 can be adjusted, so that the extent of the focusing range can be adjusted corresponding to the positioning precision of the z-axial stage 108.

13. 发明专利

JPH08146589A MANUFACTURE OF MASK 失效
公开(公告)号：JPH08146589A
公开(公告)日：1996-06-07
申请号：JP28068494
申请日：1994-11-15
申请人： HITACHI LTD
发明人： OSHIDA YOSHITADA , FUKUDA KENICHIRO
IPC分类号： G03F1/32 , G03F1/68 , H01L21/027 , G03F1/08
摘要： PURPOSE: To accurately manufacture a mask having fine patterns by milling a substrate face formed with resist patterns by the ion milling method, and forming mask patterns. CONSTITUTION: A mask pattern forming thin film 2 is applied on a substrate 1 made of quartz glass. A charged particle sensitive film 3 such as a resist sensitive to electron beams or other charged particles is formed on the face applied with the mask pattern forming thin film 2 by the film forming method such as spin coating, for example. Desired patterns are drawn on the charged particle sensitive film 3 by electron beams or another charged particle drawing device, and the developing process is applied to form resist patterns 30 made of the charged particle sensitive film 3. The board 1 thus obtained is fitted to an ion milling device, the resist patterns 30 are masked, the substrate 1 face is milled by the ion milling method to form mask patterns, and the remaining resist patterns 30b are removed from the substrate 1.

14. 发明专利

JPH02144863A INPUT/OUTPUT TERMINAL 失效
公开(公告)号：JPH02144863A
公开(公告)日：1990-06-04
申请号：JP29808288
申请日：1988-11-28
申请人： HITACHI LTD
发明人： FUKUDA KENICHIRO , MATSUMOTO TOMOZO
IPC分类号： H01R4/64 , H01R9/05
摘要： PURPOSE:To prevent the breakdown of a chip capacitor of a circuit by forming acute projections at the tip of a contact piece and generating sparks between the projections and a metal case when the surge voltage is applied. CONSTITUTION:An input/output terminal 1 has a structure to absorb a surge current, and projections 1b are provided on an inner metal 1a constituting the input/output terminal 1 for the structure to absorb the surge current. This inner metal 1a is inserted into an insulator 1e. When the surge voltage of 10-20KV is applied to the input/output terminal 1, the electric field is concentrated at tips of the projections 1b, and the surge current flows toward a case 1c serving as the ground. No surge current flows to a terminal 1d by this action. No surge current flows to a chip capacitor 4 connected to the terminal 1d, and the breakdown of the chip capacitor 4 is prevented.

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