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11. 发明申请

US20050044519A1 Sub-resolution alignment of images 有权
公开(公告)号：US20050044519A1
公开(公告)日：2005-02-24
申请号：US10946667
申请日：2004-09-21
申请人： Madhumita Sengupta , Mamta Slnha , Theodore Lundquist , William Thompson
发明人： Madhumita Sengupta , Mamta Slnha , Theodore Lundquist , William Thompson
IPC分类号： G06F9/455 , G06F17/50 , G06T7/00
CPC分类号： G06K9/32 , G06T7/001 , G06T7/32 , G06T2207/30148
摘要： A plurality of images, including a first image and a second image having a higher resolution than the first image, are aligned by generating an oversampled cross correlation image that corresponds to relative displacements of the first and second images, and, based on the oversampled cross correlation image, determining an offset value that corresponds to a misalignment of the first and second images. The first and second images are aligned to a precision greater than the resolution of the first image, based on the determined offset value. Enhanced results are achieved by performing another iteration of generating an oversampled cross correlation image and determining an offset value for the first and second images. Generating the oversampled cross correlation image may involve generating a cross correlation image that corresponds to relative displacements of the first and second images, and oversampling the cross correlation image to generate the oversampled cross correlation image.

12. 发明申请

US20080028345A1 APPARATUS AND METHOD FOR INTEGRATED CIRCUIT DESIGN FOR CIRCUIT EDIT 审中-公开
标题翻译：用于电路编辑的集成电路设计的装置和方法
公开(公告)号：US20080028345A1
公开(公告)日：2008-01-31
申请号：US11869336
申请日：2007-10-09
申请人： Hitesh Suri , Tahir Malik , Theodore Lundquist
发明人： Hitesh Suri , Tahir Malik , Theodore Lundquist
IPC分类号： G06F17/50 , H01L29/00
CPC分类号： G06F17/5045
摘要： A method and apparatus for optimizing an integrated circuit design for post-fabrication circuit editing and diagnostics. The method and apparatus is specifically directed to adding designed-for-edit modifications and designed-for-diagnostics structures to an integrated circuit design for post-fabrication circuit editing with a charged-particle beam tool. An integrated circuit design may be modified to create efficient and reliable access to specified nodes and structures, such as spare gates, by the charged-particle beam tool during subsequent testing and debugging of the fabricated device. Additionally, structures such as spare gates, spare transistors, spare metal wires, and debug circuitry may be added to an integrated circuit design to provide for easier editing of portions of the design that may fail.
摘要翻译：一种用于优化后制造电路编辑和诊断的集成电路设计的方法和装置。该方法和装置特别涉及将设计的编辑修改和设计的诊断结构添加到用于利用带电粒子束工具的后制造电路编辑的集成电路设计。可以修改集成电路设计，以便在随后的制造的器件的测试和调试期间通过带电粒子束工具高效且可靠地访问指定的节点和结构，例如备用栅极。此外，诸如备用栅极，备用晶体管，备用金属线和调试电路的结构可以被添加到集成电路设计中，以便更容易地编辑可能失败的部分设计。

13. 发明申请

US20050109956A1 Precise, in-situ endpoint detection for charged particle beam processing 审中-公开
标题翻译：用于带电粒子束处理的精确的原位端点检测
公开(公告)号：US20050109956A1
公开(公告)日：2005-05-26
申请号：US10984096
申请日：2004-11-09
申请人： Theodore Lundquist , Kenneth Wilsher
发明人： Theodore Lundquist , Kenneth Wilsher
IPC分类号： H01J37/304 , H01J37/305 , H01J27/00
CPC分类号： H01J37/304 , H01J37/3056
摘要： A system and method for determining precisely in-situ the endpoint of halogen-assisted charged particle beam milling of a hole or trench in the backside of the substrate of a flipchip packaged IC. The backside of the IC is mechanically thinned. Optionally, a coarse trench is then milled in the thinned backside of the IC using either laser chemical etching or halogen-assisted charged particle beam milling. A further small trench is milled using a halogen-assisted charged-particle beam (electron or ion beam). The endpoint for milling this small trench is determined precisely by monitoring the power supply leakage current of the IC induced by electron-hole pairs created by the milling process. A precise in-situ endpoint detection signal is generated by modulating the beam at a reference frequency and then amplifying that frequency component in the power supply leakage current with an amplifier, narrow-band amplifier or lock-in amplifier. The precise, in-situ, endpoint signal is processed and displayed for manual or automatic precise in-situ endpoint detection. This approach avoids or minimizes unintentional damage or perturbation of the active diffusion regions in the IC. A range of further operations on the IC can then be performed.
摘要翻译：用于准确地确定倒装芯片封装IC的衬底的背面中的空穴或沟槽的卤素辅助带电粒子束铣削的终点的系统和方法。 IC的背面机械变薄。可选地，使用激光化学蚀刻或卤素辅助带电粒子束研磨，在IC的薄化背面中研磨粗沟槽。使用卤素辅助带电粒子束（电子或离子束）研磨另外的小沟槽。通过监测由铣削过程产生的电子 - 空穴对引起的IC的电源漏电流，精确地确定了用于铣削该小沟槽的端点。通过以参考频率调制光束然后用放大器，窄带放大器或锁定放大器放大该电源漏电流中的该频率分量来产生精确的原位端点检测信号。精确的原位端点信号被处理和显示用于手动或自动精确的原位端点检测。该方法避免或最小化IC中的有源扩散区域的无意的损坏或扰动。然后可以执行IC上的一系列进一步的操作。

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