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11. 发明申请

US20070186055A1 Technique for using memory attributes 有权
标题翻译：使用内存属性的技术
公开(公告)号：US20070186055A1
公开(公告)日：2007-08-09
申请号：US11349661
申请日：2006-02-07
申请人： Quinn Jacobson , Anne Bracy , Hong Wang , John Shen , Per Hammarlund , Matthew Merten , Suresh Srinivas , Kshitij Doshi , Gautham Chinya , Bratin Saha , Ali-Reza Adl-Tabatabai , Gad Sheaffer
发明人： Quinn Jacobson , Anne Bracy , Hong Wang , John Shen , Per Hammarlund , Matthew Merten , Suresh Srinivas , Kshitij Doshi , Gautham Chinya , Bratin Saha , Ali-Reza Adl-Tabatabai , Gad Sheaffer
IPC分类号： G06F13/28
CPC分类号： G06F12/0815 , G06F11/3471 , G06F11/3648 , G06F12/0804 , G06F12/0817 , G06F12/0831 , G06F12/0842 , G06F12/145 , G06F2201/865
摘要： A technique for using memory attributes to relay information to a program or other agent. More particularly, embodiments of the invention relate to using memory attribute bits to check various memory properties in an efficient manner.
摘要翻译：使用存储器属性将信息中继到程序或其他代理的技术。更具体地，本发明的实施例涉及使用存储器属性位以有效的方式检查各种存储器特性。

12. 发明申请

US20060294347A1 Programmable event driven yield mechanism which may activate service threads 有权
标题翻译：可编程事件驱动的产生机制，可以激活服务线程
公开(公告)号：US20060294347A1
公开(公告)日：2006-12-28
申请号：US11134687
申请日：2005-05-19
申请人： Xiang Zou , Hong Wang , Scott Rodgers , Darrell Boggs , Bryant Bigbee , Shivanandan Kaushik , Anil Aggarwal , Ittai Anati , Doron Orenstein , Per Hammarlund , John Shen , Larry Smith , James Crossland , Chris Newburn
发明人： Xiang Zou , Hong Wang , Scott Rodgers , Darrell Boggs , Bryant Bigbee , Shivanandan Kaushik , Anil Aggarwal , Ittai Anati , Doron Orenstein , Per Hammarlund , John Shen , Larry Smith , James Crossland , Chris Newburn
IPC分类号： G06F9/44
CPC分类号： G06F9/3851 , G06F9/30087 , G06F9/3009 , G06F9/4843 , G06F11/3409 , G06F11/348 , G06F2201/86 , G06F2201/88 , G06F2201/885
摘要： Method, apparatus, and system for a programmable event driven yield mechanism that may activate other threads. The yield mechanism may allow triggering of a service thread that may execute currently with a main thread upon occurrence of an architecturally-defined condition. The service thread may be activated, in response to the condition, with limited intervention of an operating system. In one embodiment, an apparatus includes execution resources to execute a plurality of instructions and a monitor to detect an architecturally-defined condition. The apparatus may include an event handler to handle a yield event generated when the architecturally-defined condition has been detected. An architectural mechanism, including processor instructions and channel registers, may be utilized to allow user-level code to enable the yield event mechanism. Other embodiments are also described and claimed.
摘要翻译：用于可激活其他线程的可编程事件驱动产量机制的方法，装置和系统。收益机制可以允许在出现体系结构定义的条件时触发可以执行当前与主线程的服务线程。响应于条件，可以在操作系统的有限干预下激活服务线程。在一个实施例中，装置包括执行多个指令的执行资源和监视器以检测体系结构定义的条件。该装置可以包括事件处理程序，用于处理当检测到体系结构定义的条件时产生的产出事件。可以使用包括处理器指令和通道寄存器在内的架构机制来允许用户级代码来实现产出事件机制。还描述和要求保护其他实施例。

13. 发明授权

US07849465B2 Programmable event driven yield mechanism which may activate service threads 有权
标题翻译：可编程事件驱动的产生机制，可以激活服务线程
公开(公告)号：US07849465B2
公开(公告)日：2010-12-07
申请号：US11134687
申请日：2005-05-19
申请人： Xiang Zou , Hong Wang , Scott Dion Rodgers , Darrell D. Boggs , Bryant Bigbee , Shivanandan Kaushik , Anil Aggarwal , Ittai Anati , Doron Orenstein , Per Hammarlund , John Shen , Larry O. Smith , James B. Crossland , Chris J. Newburn
发明人： Xiang Zou , Hong Wang , Scott Dion Rodgers , Darrell D. Boggs , Bryant Bigbee , Shivanandan Kaushik , Anil Aggarwal , Ittai Anati , Doron Orenstein , Per Hammarlund , John Shen , Larry O. Smith , James B. Crossland , Chris J. Newburn
IPC分类号： G06F9/46 , G06F13/24 , G06F7/38
CPC分类号： G06F9/3851 , G06F9/30087 , G06F9/3009 , G06F9/4843 , G06F11/3409 , G06F11/348 , G06F2201/86 , G06F2201/88 , G06F2201/885
摘要： Method, apparatus, and system for a programmable event driven yield mechanism that may activate other threads. The yield mechanism may allow triggering of a service thread that may execute currently with a main thread upon occurrence of an architecturally-defined condition. The service thread may be activated, in response to the condition, with limited intervention of an operating system. In one embodiment, an apparatus includes execution resources to execute a plurality of instructions and a monitor to detect an architecturally-defined condition. The apparatus may include an event handler to handle a yield event generated when the architecturally-defined condition has been detected. An architectural mechanism, including processor instructions and channel registers, may be utilized to allow user-level code to enable the yield event mechanism. Other embodiments are also described and claimed.
摘要翻译：用于可激活其他线程的可编程事件驱动产量机制的方法，装置和系统。收益机制可以允许在出现体系结构定义的条件时触发可以执行当前与主线程的服务线程。响应于条件，可以在操作系统的有限干预下激活服务线程。在一个实施例中，装置包括执行多个指令的执行资源和监视器以检测体系结构定义的条件。该装置可以包括事件处理程序，用于处理当检测到体系结构定义的条件时产生的产出事件。可以使用包括处理器指令和通道寄存器在内的架构机制来允许用户级代码来实现产出事件机制。还描述和要求保护其他实施例。

14. 发明申请

US20050027941A1 Method and apparatus for affinity-guided speculative helper threads in chip multiprocessors 有权
标题翻译：芯片多处理器中亲和力引导的投机辅助线程的方法和装置
公开(公告)号：US20050027941A1
公开(公告)日：2005-02-03
申请号：US10632431
申请日：2003-07-31
申请人： Hong Wang , Perry Wang , Jeffery Brown , Per Hammarlund , George Chrysos , Doron Orenstein , Steve Liao , John Shen
发明人： Hong Wang , Perry Wang , Jeffery Brown , Per Hammarlund , George Chrysos , Doron Orenstein , Steve Liao , John Shen
IPC分类号： G06F9/38 , G06F12/08 , G06F12/00
CPC分类号： G06F9/3842 , G06F9/383 , G06F9/3851 , G06F12/0862
摘要： Apparatus, system and methods are provided for performing speculative data prefetching in a chip multiprocessor (CMP). Data is prefetched by a helper thread that runs on one core of the CMP while a main program runs concurrently on another core of the CMP. Data prefetched by the helper thread is provided to the helper core. For one embodiment, the data prefetched by the helper thread is pushed to the main core. It may or may not be provided to the helper core as well. A push of prefetched data to the main core may occur during a broadcast of the data to all cores of an affinity group. For at least one other embodiment, the data prefetched by a helper thread is provided, upon request from the main core, to the main core from the helper core's local cache.
摘要翻译：提供了用于在芯片多处理器（CMP）中执行推测性数据预取的装置，系统和方法。数据由在CMP的一个核心上运行的辅助线程预取，而主程序在CMP的另一个核心上同时运行。由辅助线程预取的数据被提供给辅助核心。对于一个实施例，由辅助线程预取的数据被推送到主核心。它也可以也可以不被提供给辅助核心。在将数据广播到亲和组的所有核心的过程中，可能会将预取数据推送到主核心。对于至少另一个实施例，根据主核心的请求，从辅助核心的本地高速缓存提供由辅助线程预取的数据到主核心。

15. 发明授权

US06938126B2 Cache-line reuse-buffer 失效
标题翻译：缓存行重用缓冲区
公开(公告)号：US06938126B2
公开(公告)日：2005-08-30
申请号：US10121524
申请日：2002-04-12
申请人： Alejandro Ramirez , Edward Grochowski , Hong Wang , John Shen
发明人： Alejandro Ramirez , Edward Grochowski , Hong Wang , John Shen
IPC分类号： G06F9/38 , G06F12/08 , G06F12/00
CPC分类号： G06F9/3814 , G06F9/3802 , G06F12/0882 , G06F12/0886 , Y02D10/13
摘要： A method, apparatus, and system that compares a current fetch request having a first start address and length associated with the current fetch request to a second start address of the next fetch request, determines whether the content already loaded in a buffer will be used to at least partially fulfill the next fetch request based upon the comparison, and inhibits access to an instruction cache based upon the comparison.
摘要翻译：将具有第一起始地址和与当前取出请求相关联的长度的当前提取请求与下一个提取请求的第二起始地址进行比较的方法，装置和系统确定已经加载在缓冲器中的内容是否将被用于至少部分地基于比较来完成下一个提取请求，并且基于比较来禁止对指令高速缓存的访问。

16. 发明申请

US20050223199A1 Method and system to provide user-level multithreading 有权
标题翻译：方法和系统提供用户级多线程
公开(公告)号：US20050223199A1
公开(公告)日：2005-10-06
申请号：US10816103
申请日：2004-03-31
申请人： Edward Grochowski , Hong Wang , John Shen , Perry Wang , Jamison Collins , James Held , Partha Kundu , Raya Leviathan , Tin-Fook Ngai
发明人： Edward Grochowski , Hong Wang , John Shen , Perry Wang , Jamison Collins , James Held , Partha Kundu , Raya Leviathan , Tin-Fook Ngai
IPC分类号： G06F9/30 , G06F9/38 , G06F9/48 , G06F9/44
CPC分类号： G06F9/30003 , G06F9/30087 , G06F9/3009 , G06F9/30101 , G06F9/3013 , G06F9/384 , G06F9/3851
摘要： A method and system to provide user-level multithreading are disclosed. The method according to the present techniques comprises receiving programming instructions to execute one or more shared resource threads (shreds) via an instruction set architecture (ISA). One or more instruction pointers are configured via the ISA; and the one or more shreds are executed simultaneously with a microprocessor, wherein the microprocessor includes multiple instruction sequencers.
摘要翻译：公开了提供用户级多线程的方法和系统。根据本技术的方法包括接收经由指令集架构（ISA）执行一个或多个共享资源线程（碎片）的编程指令。一个或多个指令指针通过ISA配置; 并且一个或多个碎片与微处理器同时执行，其中微处理器包括多个指令定序器。

17. 发明申请

US20130219399A1 MECHANISM FOR INSTRUCTION SET BASED THREAD EXECUTION OF A PLURALITY OF INSTRUCTION SEQUENCERS 审中-公开
标题翻译：基于指令集的多个指令序列的执行机制
公开(公告)号：US20130219399A1
公开(公告)日：2013-08-22
申请号：US13843164
申请日：2013-03-15
申请人： Hong Wang , John Shen , Edward Grochowski , Richard Hankins , Gautham Chinya , Bryant Bigbee , Shivnandan Kaushik , Xiang Chris Zou , Per Hammarlund , Scott Dion Rodgers , Xinmin Tian , Anil Aggawal , Prashant Sethi , Baiju Patel , James Held
发明人： Hong Wang , John Shen , Edward Grochowski , Richard Hankins , Gautham Chinya , Bryant Bigbee , Shivnandan Kaushik , Xiang Chris Zou , Per Hammarlund , Scott Dion Rodgers , Xinmin Tian , Anil Aggawal , Prashant Sethi , Baiju Patel , James Held
IPC分类号： G06F9/48
CPC分类号： G06F9/3867 , G06F9/30003 , G06F9/30043 , G06F9/3005 , G06F9/3009 , G06F9/30145 , G06F9/3017 , G06F9/30174 , G06F9/3851 , G06F9/4843 , G06F9/4881
摘要： In an embodiment, a method is provided. The method includes managing user-level threads on a first instruction sequencer in response to executing user-level instructions on a second instruction sequencer that is under control of an application level program. A first user-level thread is run on the second instruction sequencer and contains one or more user level instructions. A first user level instruction has at least 1) a field that makes reference to one or more instruction sequencers or 2) implicitly references with a pointer to code that specifically addresses one or more instruction sequencers when the code is executed.
摘要翻译：在一个实施例中，提供了一种方法。该方法包括响应于在应用级程序的控制下对第二指令定序器执行用户级指令来管理第一指令定序器上的用户级线程。在第二指令定序器上运行第一用户级线程并且包含一个或多个用户级指令。第一用户级指令至少具有1）引用一个或多个指令定序器的字段，或者2）使用指向代码执行代码时特定寻址一个或多个指令定序器的代码的指针进行隐式引用。

18. 发明申请

US20070124736A1 Acceleration threads on idle OS-visible thread execution units 有权
标题翻译：空闲OS可见线程执行单元上的加速线程
公开(公告)号：US20070124736A1
公开(公告)日：2007-05-31
申请号：US11288823
申请日：2005-11-28
申请人： Ron Gabor , Gad Sheaffer , Avi Mendelson , Uri Weiser , Hong Wang
发明人： Ron Gabor , Gad Sheaffer , Avi Mendelson , Uri Weiser , Hong Wang
IPC分类号： G06F9/46
CPC分类号： G06F9/4843 , G06F9/461 , G06F9/5027 , G06F2209/5018
摘要： Disclosed are embodiments of a system, methods and mechanism for using idle thread units to perform acceleration threads that are transparent to the operating system. When the operating system scheduler has no work to schedule on the idle thread units, the operating system may issue a halt or monitor/mwait or other instruction to place the thread unit into an idle state. While the thread unit is idle, from the operating system perspective, the thread unit may be utilized to perform speculative acceleration threads in order to accelerate threads running on non- idle thread units. The context of the idle thread unit is saved prior to execution of the acceleration thread and is restored when the operating system requires use of the thread unit. The acceleration threads are transparent to the operating system. Other embodiments are also described and claimed.
摘要翻译：公开了使用空闲螺纹单元执行对操作系统透明的加速度线程的系统，方法和机构的实施例。当操作系统调度器没有在空闲线程单元上进行调度时，操作系统可以发出停止或监视/等待或其他指令来将线程单元置于空闲状态。当螺纹单元处于空闲状态时，从操作系统的角度来看，螺纹单元可用于执行推测加速螺纹，以加速在非空转螺纹单元上运行的螺纹。在执行加速线程之前保存空闲线程单元的上下文，并且当操作系统需要使用线程单元时被恢复。加速线程对操作系统是透明的。还描述和要求保护其他实施例。

19. 发明申请

US20140025901A1 TECHNIQUE FOR USING MEMORY ATTRIBUTES 有权
标题翻译：使用存储器属性的技术
公开(公告)号：US20140025901A1
公开(公告)日：2014-01-23
申请号：US14033463
申请日：2013-09-21
申请人： Quinn A. Jacobson , Anne C. Bracy , Hong Wang , John P. Shen , Per Hammarlund , Matthew C. Merten , Suresh Srinivas , Kshitij A. Doshi , Gautham Chinya , Bratin Saha , Ali-Reza Adi-Tabatabai , Gad Sheaffer
发明人： Quinn A. Jacobson , Anne C. Bracy , Hong Wang , John P. Shen , Per Hammarlund , Matthew C. Merten , Suresh Srinivas , Kshitij A. Doshi , Gautham Chinya , Bratin Saha , Ali-Reza Adi-Tabatabai , Gad Sheaffer
IPC分类号： G06F12/08
CPC分类号： G06F12/0815 , G06F11/3471 , G06F11/3648 , G06F12/0804 , G06F12/0817 , G06F12/0831 , G06F12/0842 , G06F12/145 , G06F2201/865
摘要： A technique for using memory attributes to relay information to a program or other agent. More particularly, embodiments of the invention relate to using memory attribute bits to check various memory properties in an efficient manner.
摘要翻译：使用存储器属性将信息中继到程序或其他代理的技术。更具体地，本发明的实施例涉及使用存储器属性位以有效的方式检查各种存储器特性。

20. 发明授权

US09003421B2 Acceleration threads on idle OS-visible thread execution units 有权
标题翻译：空闲OS可见线程执行单元上的加速线程
公开(公告)号：US09003421B2
公开(公告)日：2015-04-07
申请号：US11288823
申请日：2005-11-28
申请人： Ron Gabor , Gad Sheaffer , Avi Mendelson , Uri C. Weiser , Hong Wang
发明人： Ron Gabor , Gad Sheaffer , Avi Mendelson , Uri C. Weiser , Hong Wang
IPC分类号： G06F9/46 , G06F9/30 , G06F9/48 , G06F9/50
CPC分类号： G06F9/4843 , G06F9/461 , G06F9/5027 , G06F2209/5018
摘要： Disclosed are embodiments of a system, methods and mechanism for using idle thread units to perform acceleration threads that are transparent to the operating system. When the operating system scheduler has no work to schedule on the idle thread units, the operating system may issue a halt or monitor/mwait or other instruction to place the thread unit into an idle state. While the thread unit is idle, from the operating system perspective, the thread unit may be utilized to perform speculative acceleration threads in order to accelerate threads running on non-idle thread units. The context of the idle thread unit is saved prior to execution of the acceleration thread and is restored when the operating system requires use of the thread unit. The acceleration threads are transparent to the operating system. Other embodiments are also described and claimed.
摘要翻译：公开了使用空闲螺纹单元执行对操作系统透明的加速度线程的系统，方法和机构的实施例。当操作系统调度器没有在空闲线程单元上进行调度时，操作系统可以发出停止或监视/等待或其他指令来将线程单元置于空闲状态。当线程单元处于空闲状态时，从操作系统的角度来看，线程单元可用于执行推测加速线程，以加速在非空闲线程单元上运行的线程。空闲线程单元的上下文在执行加速线程之前被保存，并且当操作系统需要使用线程单元时被恢复。加速线程对操作系统是透明的。还描述和要求保护其他实施例。

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