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    • 14. 发明授权
    • Switching device with reduced intermodulation distortion
    • 开关器件具有减少的互调失真
    • US07817966B2
    • 2010-10-19
    • US11827847
    • 2007-07-13
    • Dima PrikhodkoSergey NabokinOleksey KlimashovSteven C. SprinkleGene A. TkachenkoRichard A. Carter
    • Dima PrikhodkoSergey NabokinOleksey KlimashovSteven C. SprinkleGene A. TkachenkoRichard A. Carter
    • H04B1/44
    • H01P1/15
    • According to one exemplary embodiment, a switching device with phase selection terminals to select between at least two phase shifting modes to reduce intermodulation distortion in the switching device includes a first phase selection terminal to select a first phase shifting mode of the switching device by enabling a first phase shifter in a first phase shifting switching branch coupled to an input of the switching device. The switching device further includes a second phase selection terminal to select a second phase shifting mode of the switching device by enabling a second phase shifting switching branch coupled to the switching device input. The intermodulation distortion in the switching device is reduced by selecting one of the first and second phase shifting modes. The switching device may further include a number of FETs coupled in series between an output of the switching device and the first and second phase shifting switching branches.
    • 根据一个示例性实施例,具有相位选择端子的开关装置在至少两个相移模式之间进行选择以减少开关装置中的互调失真包括:第一相位选择端子,用于通过使能开关装置来选择开关装置的第一相移模式 耦合到开关装置的输入端的第一移相开关支路中的第一移相器。 开关装置还包括第二相选择端子,用于通过使能耦合到开关装置输入端的第二移相开关支路来选择开关装置的第二相移模式。 通过选择第一和第二相移模式之一来减小开关装置中的互调失真。 开关器件还可以包括串联耦合在开关器件的输出端与第一和第二相移开关支路之间的多个FET。
    • 18. 发明申请
    • Switching device with reduced intermodulation distortion
    • 开关器件具有减少的互调失真
    • US20090015508A1
    • 2009-01-15
    • US11827847
    • 2007-07-13
    • Dima PrikhodkoSergey NabokinOleksey KlimashovSteven C. SpinkleGene A. TkachenkoRichard A. Carter
    • Dima PrikhodkoSergey NabokinOleksey KlimashovSteven C. SpinkleGene A. TkachenkoRichard A. Carter
    • H01Q3/24H01P1/10
    • H01P1/15
    • According to one exemplary embodiment, a switching device with phase selection terminals to select between at least two phase shifting modes to reduce intermodulation distortion in the switching device includes a first phase selection terminal to select a first phase shifting mode of the switching device by enabling a first phase shifter in a first phase shifting switching branch coupled to an input of the switching device. The switching device further includes a second phase selection terminal to select a second phase shifting mode of the switching device by enabling a second phase shifting switching branch coupled to the switching device input. The intermodulation distortion in the switching device is reduced by selecting one of the first and second phase shifting modes. The switching device may further include a number of FETs coupled in series between an output of the switching device and the first and second phase shifting switching branches.
    • 根据一个示例性实施例,具有相位选择端子的开关装置在至少两个相移模式之间进行选择以减少开关装置中的互调失真包括:第一相位选择端子,用于通过使能开关装置来选择开关装置的第一相移模式 耦合到开关装置的输入端的第一移相开关支路中的第一移相器。 开关装置还包括第二相选择端子,用于通过使能耦合到开关装置输入端的第二移相开关支路来选择开关装置的第二相移模式。 通过选择第一和第二相移模式之一来减小开关装置中的互调失真。 开关器件还可以包括串联耦合在开关器件的输出端与第一和第二相移开关支路之间的多个FET。
    • 19. 发明授权
    • Tailored field in multigate FETS
    • 多场FET中的定制领域
    • US6037830A
    • 2000-03-14
    • US074770
    • 1998-05-08
    • Samson Mil'shteinSergey NabokinShixian Sui
    • Samson Mil'shteinSergey NabokinShixian Sui
    • H03K17/0412H03K17/687H03K17/785
    • H03K17/687H03K17/04123
    • A uniform tailored electrical field in a multigate field effect D-mode transistor is automatically provided by a feedback circuit which couples drain bias voltages to the gates of a multigate transistor to bias the gates incrementally such that the highest voltage is applied to the gate nearest the drain while the lowest voltage is applied to the gate nearest the source. E-mode multigate FET's carry higher gate voltage on the gate close to the source compared to a gate voltage on a last gate, located close to the drain. The proper distribution of gate voltages improves the transconductance G.sub.m of the transistor and decreases gate capacitance C.sub.gs, which increases the speed of operation of a multigate FETs.
    • 多重场效应D模式晶体管中的均匀定制的电场由反馈电路自动提供,反馈电路将漏极偏置电压耦合到多晶硅晶体管的栅极,以逐渐偏置栅极,使得最高电压施加到最接近 漏极,而最低电压施加到最靠近源极的栅极。 与靠近漏极的最后一个栅极上的栅极电压相比,E模式多栅极FET在靠近源极的栅极上承载更高的栅极电压。 栅极电压的适当分布提高了晶体管的跨导Gm并降低了栅极电容Cgs,这增加了多栅FET的工作速度。