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11. 发明申请

US20060166392A1 Semiconductor light emitting device and manufacturing method thereof 有权
标题翻译：半导体发光器件及其制造方法
公开(公告)号：US20060166392A1
公开(公告)日：2006-07-27
申请号：US11326509
申请日：2006-01-06
申请人： Nobuyuki Tomita , Masayoshi Takemi , Akihito Ohno
发明人： Nobuyuki Tomita , Masayoshi Takemi , Akihito Ohno
IPC分类号： H01L21/00
CPC分类号： H01S5/34333 , B82Y20/00 , H01L33/06 , H01L33/32 , H01S5/2009 , H01S5/22 , H01S5/3213 , H01S2304/04
摘要： The present invention provides a semiconductor light emitting device where a spatial change in an In composition ratio is small within a plane of an active layer and device properties such as efficiency of light emission are excellent, and a manufacturing method thereof. An active layer having an InGaN quantum well structure is formed in such a manner that a ratio of a photoluminescence light emission intensity at 300 K to a photoluminescence light emission intensity at 5 K becomes 0.1 or less. The ratio of the photoluminescence light emission intensity reflects the degree of the spatial change in an In composition ratio in a quantum confined structure. In addition, a smaller value indicates a higher spatial uniformity in the In composition ratio. Therefore, there is greater spatial uniformity in the In composition ratio in the active layer, increasing the probability of radiative recombination of carriers occurring, by making the ratio of photoluminescence light emission intensity 0.1 or less; thus, it becomes possible to obtain a semiconductor light emitting device having high efficiency in light emission.
摘要翻译：本发明提供一种半导体发光器件，其中In组成比的空间变化在有源层的平面内较小，并且诸如发光效率的器件性能优异，及其制造方法。形成具有InGaN量子阱结构的有源层，使得在300K下的光致发光发光强度与5K的光致发光发光强度的比例为0.1以下。光致发光强度的比率反映了量子限制结构中In组成比的空间变化程度。另外，较小的值表示In组成比中较高的空间均匀性。因此，有源层的In组成比有更大的空间均匀性，通过使光致发光发光强度的比例为0.1以下，增加载体发生辐射复合的可能性; 因此，可以获得具有高发光效率的半导体发光器件。

12. 发明申请

US20050230706A1 Avalanche photodiode 有权
标题翻译：雪崩光电二极管
公开(公告)号：US20050230706A1
公开(公告)日：2005-10-20
申请号：US11098558
申请日：2005-04-05
申请人： Eiji Yagyu , Nobuyuki Tomita , Eitaro Ishimura , Masaharu Nakaji
发明人： Eiji Yagyu , Nobuyuki Tomita , Eitaro Ishimura , Masaharu Nakaji
IPC分类号： H01L31/107 , H01L31/072
CPC分类号： H01L31/107
摘要： An objective is to provide an avalanche photodiode that is excellent in device characteristics such as reliability. An avalanche photodiode is provided, which includes a substrate 1 formed with a light receiving region 3 on a multiplication layer 119, and formed with layers of differing semiconductor type with the multiplication layer 119 intervening, a ring-shaped groove 7 formed on the end face of the substrate 1 on its light-receiving-region side, in such a way that the groove surrounds the light receiving region 3, and one or more steps 5 provided on a side wall of the ring-shaped groove 7, in a range of from ¼ to ¾ of the depth of the groove. In the avalanche photodiode described above, because one or more steps provided on the side wall of the ring-shaped groove in the range of from ¼ to ¾ of the depth of the groove, discontinuity at the edge of the ring-shaped groove can be effectively prevented from occurring; consequently, an avalanche photodiode excellent in device characteristics such as reliability can be obtained.
摘要翻译：目的是提供一种在可靠性等装置特性方面优异的雪崩光电二极管。提供了一种雪崩光电二极管，其包括：在乘法层119上形成有受光区域3的基板1，并且形成有具有不同半导体类型的层和乘法层119，形成在端面上的环形槽7 基板1在其受光区域侧，使得沟槽围绕光接收区域3，以及设置在环形槽7的侧壁上的一个或多个台阶5在一定范围内从凹槽的深度的1/4到¾。在上述雪崩光电二极管中，由于在槽的深度的1/4至3/4的范围内设置在环状槽的侧壁上的一个或多个台阶，所以环形槽的边缘处的不连续性可以是有效防止发生; 因此，可以获得诸如可靠性的器件特性优异的雪崩光电二极管。

13. 发明授权

US5235786A Hourglass worm gear 失效
标题翻译：沙漏蜗轮
公开(公告)号：US5235786A
公开(公告)日：1993-08-17
申请号：US933206
申请日：1992-08-21
申请人： Tohru Kobayashi , Nobuyuki Tomita , Tsunetoshi Sonohara , Hiroshi Kawada , Shigeyuki Shimachi , Hiroshi Gunbara
发明人： Tohru Kobayashi , Nobuyuki Tomita , Tsunetoshi Sonohara , Hiroshi Kawada , Shigeyuki Shimachi , Hiroshi Gunbara
IPC分类号： B23F13/08 , F16H55/22
CPC分类号： B23F13/08 , F16H55/22
摘要： The improved hourglass worm gear which has been produced by grinding a blank for the worm gear by rotating a grinding wheel about a grinding wheel shaft A while turning the grinding wheel shaft A about a tool shaft A3 which extends in parallel with a wheel shaft A2 perpendicular to a worm shaft A1 is characterized in that a cross-sectional shape of the grinding wheel taken in a plane inclusive of the grinding wheel shaft A exhibits a circular arc.Since the cross-sectional shape of the grinding wheel for successively grinding a series of gear tooth surfaces on the hourglass worm gear is contoured in the form of a circular arc, the hourglass worm gear assures that a radius r of the circular arc has an increased degree of freedom and an ideal contact pattern can be obtained by properly adjusting the radius r.A contour of each gear tooth shape having few variation of gear tooth engagement is determined by correctly adjusting the radius r of the circular arc as well as various conditions associated with correct generation of a series of gear tooth surfaces on the worm gear in order to assure the ideal contact pattern regardless of displacement of shafts as well as displacement of each gear tooth under a large magnitude of load.
摘要翻译：改进的沙漏蜗轮通过在研磨轮轴A周围旋转研磨轮，同时使研磨轮轴A围绕与轴A2垂直延伸的工具轴A3旋转而研磨用于蜗轮的坯料而制造的蜗杆轴A1的特征在于，在包括砂轮轴A的平面中的砂轮的横截面形状呈圆弧状。由于用于连续磨削沙漏蜗轮上的一系列齿轮齿面的砂轮的横截面形状是圆弧形的轮廓，所以沙漏蜗轮确保圆弧的半径r增加通过适当调整半径r可以获得自由度和理想接触图形。通过正确调整圆弧的半径r以及与蜗轮上的一系列齿轮齿面正确生成相关的各种条件来确定齿轮齿啮合变化较小的每个齿轮齿轮的轮廓，以确保理想的接触图形，无论轴的位移以及在大载荷下各齿轮的位移。

14. 发明申请

US20130126906A1 SILICON CARBIDE EPITAXIAL WAFER AND MANUFACTURING METHOD THEREFOR, SILICON CARBIDE BULK SUBSTRATE FOR EPITAXIAL GROWTH AND MANUFACTURING METHOD THEREFOR AND HEAT TREATMENT APPARATUS 有权
标题翻译：硅碳化硅外延晶片及其制造方法，用于外延生长的硅碳化硅基板及其制造方法及热处理设备
公开(公告)号：US20130126906A1
公开(公告)日：2013-05-23
申请号：US13696943
申请日：2011-03-18
申请人： Nobuyuki Tomita , Kenichi Hamano , Masayoshi Tarutani , Yoichiro Mitani , Takeharu Kuroiwa , Masayuki Imaizumi , Hiroaki Sumitani , Kenichi Ohtsuka , Tomoaki Furusho , Takao Sawada , Yuji Abe
发明人： Nobuyuki Tomita , Kenichi Hamano , Masayoshi Tarutani , Yoichiro Mitani , Takeharu Kuroiwa , Masayuki Imaizumi , Hiroaki Sumitani , Kenichi Ohtsuka , Tomoaki Furusho , Takao Sawada , Yuji Abe
IPC分类号： H01L21/02 , H01L29/16
CPC分类号： H01L21/02529 , C30B25/02 , C30B25/186 , C30B29/36 , H01L21/02378 , H01L21/02433 , H01L21/02587 , H01L21/0262 , H01L21/02661 , H01L21/6719 , H01L21/68771 , H01L29/1608
摘要： A method is provided in order to manufacture a silicon carbide epitaxial wafer whose surface flatness is very good and has a very low density of carrot defects and triangular defects arising after epitaxial growth. The silicon carbide epitaxial wafer is manufactured by a first step of annealing a silicon carbide bulk substrate that is tilted less than 5 degrees from face, in a reducing gas atmosphere at a first temperature T1 for a treatment time t, a second step of reducing the temperature of the substrate in the reducing gas atmosphere, and a third step of performing epitaxial growth at a second temperature T2 below the annealing temperature T1 in the first step, while supplying at least a gas including silicon atoms and a gas including carbon atoms.
摘要翻译：提供了一种方法来制造其表面平坦度非常好并且具有非常低的胡萝卜缺陷密度和外延生长后产生的三角形缺陷的碳化硅外延晶片。碳化硅外延晶片是通过第一步骤，在还原气体气氛中，在第一温度T1处理处理时间t，退火碳化硅本体衬底，其从<0001>面倾斜小于5度;第二步骤在第一步骤中，在低于退火温度T1的第二温度T2下进行外延生长的第三步骤，同时至少提供包含硅原子的气体和包括碳的气体原子

15. 发明授权

US07038251B2 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US07038251B2
公开(公告)日：2006-05-02
申请号：US11038254
申请日：2005-01-21
申请人： Eitaro Ishimura , Masaharu Nakaji , Eiji Yagyu , Nobuyuki Tomita
发明人： Eitaro Ishimura , Masaharu Nakaji , Eiji Yagyu , Nobuyuki Tomita
IPC分类号： H01L29/732
CPC分类号： H01L31/107
摘要： A semiconductor device has a structure reducing resistances to a high frequency current. The semiconductor device includes a semi-insulating substrate, a first n-type layer made of a compound semiconductor, and a first p-type layer made of a compound semiconductor in which a signal current flows in a lateral direction, parallel to the semi-insulating substrate. The first p-type layer is sandwiched between the semi-insulating substrate and the first n-type layer. A second n type layer made of a compound semiconductor is between the semi-insulating substrate and the first p type layer. An alternating current component of the signal current flows through the second n type layer.
摘要翻译：半导体器件具有降低对高频电流的电阻的结构。半导体器件包括半绝缘衬底，由化合物半导体制成的第一n型层和由化合物半导体制成的第一p型层，其中信号电流在横向上流动，平行于半导体层，绝缘基板。第一p型层被夹在半绝缘衬底和第一n型层之间。由半导体制成的第二n型层位于半绝缘基板和第一p型层之间。信号电流的交流分量流过第二n型层。

16. 发明申请

US20050224839A1 Avalanche photodiode 有权
标题翻译：雪崩光电二极管
公开(公告)号：US20050224839A1
公开(公告)日：2005-10-13
申请号：US11088770
申请日：2005-03-25
申请人： Eiji Yagyu , Nobuyuki Tomita , Eitaro Ishimura , Masaharu Nakaji
发明人： Eiji Yagyu , Nobuyuki Tomita , Eitaro Ishimura , Masaharu Nakaji
IPC分类号： H01L31/107 , H01L31/0224 , H01L31/072
CPC分类号： H01L31/1075 , H01L31/022416
摘要： An avalanche photodiode according to this invention include a light receiving region 101 surrounded by a ring-shaped trench 13, a first electrode 11 formed on the light receiving region 101, a second electrode 12 formed on the periphery of the ring-shaped trench 13 surrounding the light receiving region, a first semiconductor layer lying just under the first electrode 11, and a second semiconductor layer lying just under the second electrode 12. Conductivity types of the first semiconductor and the second semiconductor are identical.
摘要翻译：根据本发明的雪崩光电二极管包括被环形沟槽13包围的光接收区域101，形成在光接收区域101上的第一电极11，形成在环形沟槽13周围的第二电极12 光接收区域，位于第一电极11正下方的第一半导体层，以及位于第二电极12正下方的第二半导体层。第一半导体和第二半导体的电导率相同。

17. 发明授权

US08569106B2 Method for manufacturing silicon carbide semiconductor device 有权
标题翻译：制造碳化硅半导体器件的方法
公开(公告)号：US08569106B2
公开(公告)日：2013-10-29
申请号：US13148537
申请日：2010-02-15
申请人： Kenichi Hamano , Kenichi Ohtsuka , Nobuyuki Tomita , Masayoshi Tarutani
发明人： Kenichi Hamano , Kenichi Ohtsuka , Nobuyuki Tomita , Masayoshi Tarutani
IPC分类号： H01L21/00
CPC分类号： H01L29/7802 , C30B25/02 , C30B29/36 , H01L21/02378 , H01L21/02433 , H01L21/02447 , H01L21/02529 , H01L21/0262 , H01L29/045 , H01L29/0878 , H01L29/1608 , H01L29/6606 , H01L29/66068 , H01L29/7395 , H01L29/7828 , H01L29/872
摘要： A film of an epitaxial layer that allows the reduction in both the height of a bunching step and crystal defects caused by a failure in migration of reactive species on a terrace is formed on a SiC semiconductor substrate having an off angle of 5 degrees or less. A film of a first-layer epitaxial layer is formed on and in contact with a surface of the SiC semiconductor substrate having an off angle of 5 degrees or less. Subsequently, the temperature in a reactor is lowered. A second-layer epitaxial layer is caused to epitaxially grow on and in contact with a surface of the first-layer epitaxial layer. In the above-described manner, the epitaxial layer is structured with two layers, and the growth temperature for the second epitaxial layer is set lower than the growth temperature for the first epitaxial layer.
摘要翻译：在偏离角度为5度以下的SiC半导体基板上，形成外延层的薄膜，该外延层能够降低聚束步骤的高度，并且由于活性物质在平台上的迁移失败而导致的晶体缺陷。第一层外延层的膜形成在具有5度或更小的偏离角的SiC半导体衬底的表面上并与之接触。随后，反应器中的温度降低。使第二层外延层在第一层外延层的表面上外延生长并与其接触。以上述方式，外延层由两层构成，第二外延层的生长温度被设定为低于第一外延层的生长温度。

18. 发明申请

US20130099253A1 EPITAXIAL WAFER AND SEMICONDUCTOR DEVICE 有权
标题翻译：外延波形和半导体器件
公开(公告)号：US20130099253A1
公开(公告)日：2013-04-25
申请号：US13808382
申请日：2011-07-14
申请人： Kenichi Ohtsuka , Nobuyuki Tomita , Tomoaki Furusho
发明人： Kenichi Ohtsuka , Nobuyuki Tomita , Tomoaki Furusho
IPC分类号： H01L29/16
CPC分类号： H01L29/1608 , H01L21/02447 , H01L21/02507 , H01L21/02529 , H01L21/02573 , H01L21/0262 , H01L29/6606 , H01L29/66068
摘要： A semiconductor device that can suppress deterioration in crystal quality caused by a lattice mismatch between a substrate and an epitaxial layer and that also can ensure a voltage sustaining performance, and a wafer for forming the semiconductor device. An epitaxial wafer of silicon carbide (SiC), which is used for manufacturing a semiconductor device, includes a low resistance substrate and an epitaxial layer provided thereon. The epitaxial layer is doped with the same dopant as a dopant doped into the substrate, and has a laminated structure including a low concentration layer and an ultrathin high concentration layer. A doping concentration in the low concentration layer is lower than that in the silicon carbide substrate. A doping concentration in the ultrathin high concentration layer is equal to that in the silicon carbide substrate.
摘要翻译：能够抑制由基板与外延层之间的晶格失配引起的晶体质量下降的半导体器件，并且还可以确保电压维持性能，以及用于形成半导体器件的晶片。用于制造半导体器件的碳化硅（SiC）的外延晶片包括低电阻基板和设置在其上的外延层。外延层掺杂有与掺杂到衬底中的掺杂剂相同的掺杂剂，并且具有包括低浓度层和超薄高浓度层的层压结构。低浓度层中的掺杂浓度低于碳化硅衬底中的掺杂浓度。超薄高浓度层中的掺杂浓度等于碳化硅衬底中的掺杂浓度。

19. 发明申请

US20110312161A1 METHOD FOR MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE 有权
标题翻译：制造碳化硅半导体器件的方法
公开(公告)号：US20110312161A1
公开(公告)日：2011-12-22
申请号：US13148537
申请日：2010-02-15
申请人： Kenichi Hamano , Kenichi Ohtsuka , Nobuyuki Tomita , Masayoshi Tarutani
发明人： Kenichi Hamano , Kenichi Ohtsuka , Nobuyuki Tomita , Masayoshi Tarutani
IPC分类号： H01L21/20
CPC分类号： H01L29/7802 , C30B25/02 , C30B29/36 , H01L21/02378 , H01L21/02433 , H01L21/02447 , H01L21/02529 , H01L21/0262 , H01L29/045 , H01L29/0878 , H01L29/1608 , H01L29/6606 , H01L29/66068 , H01L29/7395 , H01L29/7828 , H01L29/872
摘要： A film of an epitaxial layer that allows the reduction in both the height of a bunching step and crystal defects caused by a failure in migration of reactive species on a terrace is formed on a SiC semiconductor substrate having an off angle of 5 degrees or less. A film of a first-layer epitaxial layer is formed on and in contact with a surface of the SiC semiconductor substrate having an off angle of 5 degrees or less. Subsequently, the temperature in a reactor is lowered. A second-layer epitaxial layer is caused to epitaxially grow on and in contact with a surface of the first-layer epitaxial layer. In the above-described manner, the epitaxial layer is structured with two layers, and the growth temperature for the second epitaxial layer is set lower than the growth temperature for the first epitaxial layer.
摘要翻译：在偏离角度为5度以下的SiC半导体基板上，形成外延层的薄膜，该外延层能够降低聚束步骤的高度，并且由于活性物质在平台上的迁移失败而导致的晶体缺陷。第一层外延层的膜形成在具有5度或更小的偏离角的SiC半导体衬底的表面上并与之接触。随后，反应器中的温度降低。使第二层外延层在第一层外延层的表面上外延生长并与其接触。以上述方式，外延层由两层构成，第二外延层的生长温度被设定为低于第一外延层的生长温度。

20. 发明授权

US07187013B2 Avalanche photodiode 有权
标题翻译：雪崩光电二极管
公开(公告)号：US07187013B2
公开(公告)日：2007-03-06
申请号：US11136466
申请日：2005-05-25
申请人： Masaharu Nakaji , Eitaro Ishimura , Eiji Yagyu , Nobuyuki Tomita
发明人： Masaharu Nakaji , Eitaro Ishimura , Eiji Yagyu , Nobuyuki Tomita
IPC分类号： H01L31/072 , H01L31/109 , H01L31/0328 , H01L31/0336
CPC分类号： H01L31/03046 , H01L31/107 , H01L31/1075 , Y02E10/544
摘要： An avalanche photodiode has improved low-noise characteristics, high-speed response characteristics, and sensitivity. The avalanche photodiode includes a first conductivity type semiconductor layer, a second conductivity type semiconductor layer, a semiconductor multiplication layer interposed between the first conductivity type semiconductor layer and the second conductivity type semiconductor layer, and a semiconductor light-absorbing layer interposed between the semiconductor multiplication layer and the second conductivity type semiconductor layer. The avalanche photodiode further comprises a multiplication suppressing layer which suppresses multiplication of charge carriers in the semiconductor light-absorbing layer, has a thickness of 0.6 μm or less, and is located between the semiconductor light-absorbing layer and the second conductivity type semiconductor layer. The thickness of the semiconductor light-absorbing layer is 0.5 μm or more.
摘要翻译：雪崩光电二极管具有改进的低噪声特性，高速响应特性和灵敏度。雪崩光电二极管包括第一导电类型半导体层，第二导电类型半导体层，介于第一导电类型半导体层和第二导电类型半导体层之间的半导体倍增层，以及插入在半导体乘法层和第二导电类型半导体层。雪崩光电二极管还包括抑制半导体光吸收层中的电荷载流子的倍增的增殖抑制层，其厚度为0.6μm以下，位于半导体光吸收层与第二导电型半导体层之间。半导体光吸收层的厚度为0.5μm以上。

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