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11. 发明授权

US07236118B2 Multiple input analog-to-digital conversion apparatus and radio receiver using the same 有权
公开(公告)号：US07236118B2
公开(公告)日：2007-06-26
申请号：US11409569
申请日：2006-04-24
申请人： Daisuke Kurose , Takafumi Yamaji , Tetsuro Itakura
发明人： Daisuke Kurose , Takafumi Yamaji , Tetsuro Itakura
IPC分类号： H03M1/38
CPC分类号： H03M1/123 , H03M1/0695 , H03M1/1205 , H03M1/44
摘要： A multiple input AD conversion apparatus includes a first unit AD converter including a plurality of first conversion stages connected in cascade to convert a first analog input signal to a first digital output signal, a second unit AD converter including a plurality of second conversion stages connected in cascade to convert a second analog input signal to a second digital output signal, and an operational amplifier shared between the first conversion stage and the second conversion stage in a time sharing.

12. 发明申请

US20100112971A1 FREQUENCY CONVERTING CIRCUIT AND RECEIVER 审中-公开
标题翻译：频率转换电路和接收器
公开(公告)号：US20100112971A1
公开(公告)日：2010-05-06
申请号：US12503199
申请日：2009-07-15
申请人： Junya Matsuno , Takafumi Yamaji , Tetsuro Itakura
发明人： Junya Matsuno , Takafumi Yamaji , Tetsuro Itakura
IPC分类号： H04B1/16 , H04B15/00
CPC分类号： H04B1/30
摘要： A receiver includes a multiphase mixer that multiplies a received radio signal by multiphase local signals the number of which is the same as an integer having a first prime factor and a second prime factor different from the first prime factor, and generates first multiphase baseband signals the number of which is the same as the integer, a first processing circuit that suppresses common modes for first multiphase signal groups formed by dividing the first multiphase baseband signals into groups of signals the number of which is the same as the first prime factor, and generates second multiphase baseband signals, and a second processing circuit that suppresses common modes for second multiphase signal groups formed by dividing the second multiphase baseband signals into groups of signals the number of which is the same as the second prime factor, and generates third multiphase baseband signals.
摘要翻译：接收机包括：多相混合器，其通过多个本地信号乘以接收的无线电信号，多相本地信号的数量与具有不同于第一素因子的第一素因子和第二素因子的整数相同，并且生成第一多相基带信号其数量与整数相同，第一处理电路抑制通过将第一多相基带信号划分成与第一素数相同数量的信号组而形成的第一多相信号组的共模，并产生第二多相基带信号，以及第二处理电路，其抑制通过将第二多相基带信号划分成与第二素因数相同的信号组而形成的第二多相信号组的共模，并且产生第三多相基带信号。

13. 发明申请

US20080274714A1 AMPLIFIER, FILTER USING THE SAME, AND RADIO COMMUNICATION DEVICE 审中-公开
公开(公告)号：US20080274714A1
公开(公告)日：2008-11-06
申请号：US12170989
申请日：2008-07-10
申请人： Takafumi Yamaji , Rui Ito , Tetsuro Itakura
发明人： Takafumi Yamaji , Rui Ito , Tetsuro Itakura
IPC分类号： H04B1/16 , H03F3/45 , H03B1/00
CPC分类号： H03F3/193 , H03F3/45085 , H03F3/45183 , H03F2203/45352
摘要： An amplifier includes an amplification unit which amplify a first difference between first and second input signals, a second difference between second and third input signals and a third difference between third and first input signals by a differential mode gain, and amplify an average of the first, second and third input signal by a common mode gain, for outputting a first output signal corresponding to a sum of the amplified first difference and the amplified average, a second output signal corresponding to a sum of the amplified second difference and the amplified average, and a third output signal corresponding to a sum of the amplified third difference and amplified average; first, second; and a reduction circuit which reduces the common mode gain less than the differential mode gain.

14. 发明申请

US20050285672A1 OPERATIONAL AMPLIFIER CIRCUIT, SAMPLE/HOLD CIRCUIT AND FILTER CIRCUIT USING THE OPERATIONAL AMPLIFIER CIRCUIT 失效
公开(公告)号：US20050285672A1
公开(公告)日：2005-12-29
申请号：US11216097
申请日：2005-09-01
申请人： Tetsuro Itakura , Takafumi Yamaji
发明人： Tetsuro Itakura , Takafumi Yamaji
IPC分类号： G11C27/02 , H03F3/45 , H03F3/68
CPC分类号： H03F3/45475 , G11C27/024 , G11C27/026 , H03F3/45632 , H03F3/45928 , H03F3/45977 , H03F2203/45101 , H03F2203/45138 , H03F2203/45428 , H03F2203/45574 , H03H11/1243 , H03H11/32
摘要： An operational amplifier circuit is constituted by first and second inverted amplifier circuits (A1, A2) that receive first and second input signals, a third inverted amplifier circuit (A3) that receives an estimated common-mode output signal and an output signal from the first inverted amplifier circuit and outputs first and second output signals, a fourth inverted amplifier circuit (A4) that receives the estimated common-mode output signal and an output signal from the second inverted amplifier circuit and outputs third and fourth output signals, where the estimated common-mode output signal is generated by adding the second output signal and the fourth output signal, and first and second non-inverted amplifier circuits (A5, A6) that receive the estimated common-mode output signal and feed it back to the first and second inverted amplifier circuits.

15. 发明授权

US06437643B1 Variable gain amplifier 失效
标题翻译：可变增益放大器
公开(公告)号：US06437643B1
公开(公告)日：2002-08-20
申请号：US09970936
申请日：2001-10-05
申请人： Takashi Ueno , Tadashi Arai , Takafumi Yamaji , Hiroshi Yoshida , Tetsuro Itakura
发明人： Takashi Ueno , Tadashi Arai , Takafumi Yamaji , Hiroshi Yoshida , Tetsuro Itakura
IPC分类号： H03F136
CPC分类号： H03G3/3036 , H03F3/45973 , H03G3/3005
摘要： A variable gain amplifier comprises a main amplifier circuit whose gain is controllable and which amplifies a difference signal between an input signal and a feedback signal, a feedback amplifier circuit whose gain is controllable and which amplifies an output signal of the main amplifier circuit, and a gain control circuit which complementarily control the gain of the main amplifier circuit and the gain of the feedback amplifier circuit.
摘要翻译：可变增益放大器包括其增益是可控的并且放大输入信号和反馈信号之间的差分信号的主放大器电路，其增益是可控的并放大主放大器电路的输出信号的反馈放大器电路，增益控制电路，其互补地控制主放大器电路的增益和反馈放大器电路的增益。

16. 发明申请

US20080309436A1 MULTI-INPUT MULTI-OUTPUT AMPLIFIER, AN ACTIVE INDUCTOR, A FILTER AND A RADIO COMMUNICATION DEVICE 审中-公开
标题翻译：多输入多输出放大器，有源电感器，滤波器和无线电通信装置
公开(公告)号：US20080309436A1
公开(公告)日：2008-12-18
申请号：US12051098
申请日：2008-03-19
申请人： Takafumi Yamaji , Rui Ito , Tetsuro Itakura
发明人： Takafumi Yamaji , Rui Ito , Tetsuro Itakura
IPC分类号： H03H11/00 , H03F3/00 , H04L25/00
CPC分类号： H04L27/3854 , H03F3/19 , H03F3/211 , H03F2200/451 , H04B1/40 , H04L27/233
摘要： A non-inverting amplifier includes n external input terminals which receive n (n≧3) input voltage signals having a constant sum of voltages, respectively, n amplification units each including n−1 internal input terminals connected to n−1 terminals of the n external input terminals in a different combination for each of the amplification units, n−1 voltage-to-current converters which convert input voltage signals from the internal input terminals into current signals, and a load which converts an added current signal obtained by adding up the current signals into an output voltage signal, and n external output terminals which output n output voltage signals from the n amplification units.
摘要翻译：非反相放大器包括n个外部输入端子，其分别接收具有恒定电压和的n（n> = 3）个输入电压信号，n个放大单元，每个放大单元包括n-1个内部输入端子，其连接到 n个不同组合的外部输入端子用于每个放大单元，n-1个电压 - 电流转换器，其将来自内部输入端子的输入电压信号转换为电流信号;以及负载，其将通过添加获得的相加电流信号将电流信号提升为输出电压信号，以及从n个放大单元输出n个输出电压信号的n个外部输出端子。

17. 发明申请

US20060187100A1 Multiple input analog-to-digital conversion apparatus and radio receiver using the same 有权
公开(公告)号：US20060187100A1
公开(公告)日：2006-08-24
申请号：US11409603
申请日：2006-04-24
申请人： Daisuke Kurose , Takafumi Yamaji , Tetsuro Itakura
发明人： Daisuke Kurose , Takafumi Yamaji , Tetsuro Itakura
IPC分类号： H03M3/00
CPC分类号： H03M1/123 , H03M1/0695 , H03M1/1205 , H03M1/44
摘要： A multiple input AD conversion apparatus includes a first unit AD converter including a plurality of first conversion stages connected in cascade to convert a first analog input signal to a first digital output signal, a second unit AD converter including a plurality of second conversion stages connected in cascade to convert a second analog input signal to a second digital output signal, and an operational amplifier shared between the first conversion stage and the second conversion stage in a time sharing.

18. 发明授权

US07053703B2 Operational amplifier circuit, sample/hold circuit and filter circuit using the operational amplifier circuit 有权
公开(公告)号：US07053703B2
公开(公告)日：2006-05-30
申请号：US10811908
申请日：2004-03-30
申请人： Tetsuro Itakura , Takafumi Yamaji
发明人： Tetsuro Itakura , Takafumi Yamaji
IPC分类号： H03F3/45
CPC分类号： H03F3/45475 , G11C27/024 , G11C27/026 , H03F3/45632 , H03F3/45928 , H03F3/45977 , H03F2203/45101 , H03F2203/45138 , H03F2203/45428 , H03F2203/45574 , H03H11/1243 , H03H11/32
摘要： An operational amplifier circuit is constituted by first and second inverted amplifier circuits (A1, A2) that receive first and second input signals, a third inverted amplifier circuit (A3) that receives an estimated common-mode output signal and an output signal from the first inverted amplifier circuit and outputs first and second output signals, a fourth inverted amplifier circuit (A4) that receives the estimated common-mode output signal and an output signal from the second inverted amplifier circuit and outputs third and fourth output signals, where the estimated common-mode output signal is generated by adding the second output signal and the fourth output signal, and first and second non-inverted amplifier circuits (A5, A6) that receive the estimated common-mode output signal and feed it back to the first and second inverted amplifier circuits.

19. 发明授权

US07038537B2 Operational amplifier circuit, sample/hold circuit and filter circuit using the operational amplifier circuit 失效
公开(公告)号：US07038537B2
公开(公告)日：2006-05-02
申请号：US11216097
申请日：2005-09-01
申请人： Tetsuro Itakura , Takafumi Yamaji
发明人： Tetsuro Itakura , Takafumi Yamaji
IPC分类号： H03F3/45
CPC分类号： H03F3/45475 , G11C27/024 , G11C27/026 , H03F3/45632 , H03F3/45928 , H03F3/45977 , H03F2203/45101 , H03F2203/45138 , H03F2203/45428 , H03F2203/45574 , H03H11/1243 , H03H11/32
摘要： An operational amplifier circuit is constituted by first and second inverted amplifier circuits (A1, A2) that receive first and second input signals, a third inverted amplifier circuit (A3) that receives an estimated common-mode output signal and an output signal from the first inverted amplifier circuit and outputs first and second output signals, a fourth inverted amplifier circuit (A4) that receives the estimated common-mode output signal and an output signal from the second inverted amplifier circuit and outputs third and fourth output signals, where the estimated common-mode output signal is generated by adding the second output signal and the fourth output signal, and first and second non-inverted amplifier circuits (A5, A6) that receive the estimated common-mode output signal and feed it back to the first and second inverted amplifier circuits.

20. 发明授权

US07009448B2 Operational amplifier circuit, sample/hold circuit and filter circuit using the operational amplifier circuit 失效
标题翻译：运算放大器电路，采样/保持电路和使用运算放大器电路的滤波电路
公开(公告)号：US07009448B2
公开(公告)日：2006-03-07
申请号：US11216100
申请日：2005-09-01
申请人： Tetsuro Itakura , Takafumi Yamaji
发明人： Tetsuro Itakura , Takafumi Yamaji
IPC分类号： H03F3/45
CPC分类号： H03F3/45475 , G11C27/024 , G11C27/026 , H03F3/45632 , H03F3/45928 , H03F3/45977 , H03F2203/45101 , H03F2203/45138 , H03F2203/45428 , H03F2203/45574 , H03H11/1243 , H03H11/32
摘要： An operational amplifier circuit is constituted by first and second inverted amplifier circuits (A1, A2) that receive first and second input signals, a third inverted amplifier circuit (A3) that receives an estimated common-mode output signal and an output signal from the first inverted amplifier circuit and outputs first and second output signals, a fourth inverted amplifier circuit (A4) that receives the estimated common-mode output signal and an output signal from the second inverted amplifier circuit and outputs third and fourth output signals, where the estimated common-mode output signal is generated by adding the second output signal and the fourth output signal, and first and second non-inverted amplifier circuits (A5, A6) that receive the estimated common-mode output signal and feed it back to the first and second inverted amplifier circuits.
摘要翻译：运算放大器电路由接收第一和第二输入信号的第一和第二反相放大器电路（A 1，A 2）构成，第三反相放大器电路（A 3），其接收估计的共模输出信号和输出信号从第一反相放大器电路输出第一和第二输出信号;第四反相放大电路（A 4），其接收估计的共模输出信号和来自第二反相放大器电路的输出信号，并输出第三和第四输出信号; 其中通过将第二输出信号和第四输出信号相加来产生估计的共模输出信号，以及接收估计的共模输出信号并将其馈送的第一和第二非反相放大器电路（A 5，A 6）回到第一和第二反相放大器电路。

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