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11. 发明专利

JP2010062320A Semiconductor device and fabrication method for the same 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2010062320A
公开(公告)日：2010-03-18
申请号：JP2008226246
申请日：2008-09-03
申请人： Toshiba Corp , 株式会社東芝
发明人： MATSUSHITA KEIICHI
IPC分类号： H01L21/338 , H01L29/417 , H01L29/423 , H01L29/778 , H01L29/812
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device which is highly reliable, and has high performance and high power, and to provide a fabrication method for the semiconductor device.
SOLUTION: The semiconductor device includes a substrate 10, a nitride based compound semiconductor layer 12 placed on the substrate 10; an active area AA which is placed on the nitride based compound semiconductor layer 12, and is composed of an aluminum gallium nitride layer (Al
x Ga
1-x N where 0.1≤x≤1) 14; an element isolation region 34 which performs isolation of the active area AA mutually; a gate electrode 24, a source electrode 20, and a drain electrode 22 which have been placed on the active area AA surrounded by the isolation region 34; a gate terminal electrode 240, a source terminal electrode 200, and a drain terminal electrode 220 disposed on the element isolation region 34 and connected to the gate electrode 24, source electrode 20, and drain electrode 22; and a groove portion 28 formed between the gate electrode 24 and drain terminal electrode 220.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供高可靠性，高性能和高功率的半导体器件，并提供半导体器件的制造方法。解决方案：半导体器件包括衬底10，放置在衬底10上的基于氮化物的化合物半导体层12; 放置在氮化物基化合物半导体层12上的有源区AA，由氮化镓铝层（Al x Ga 1-x N组成，其中0.1≤ x≤1）14; 元件隔离区域34，其相互地执行有源区域AA的隔离; 已经被放置在由隔离区域34包围的有源区域AA上的栅电极24，源电极20和漏电极22; 栅极端子电极240，源极端子电极200和漏极端子电极220，其设置在元件隔离区域34上并连接到栅电极24，源电极20和漏电极22; 以及形成在栅极电极24和漏极端子电极220之间的槽部分28.权利要求：（C）2010，JPO＆INPIT

12. 发明专利

JP2008112793A High frequency semiconductor device 有权
标题翻译：高频半导体器件
公开(公告)号：JP2008112793A
公开(公告)日：2008-05-15
申请号：JP2006293813
申请日：2006-10-30
申请人： Toshiba Corp , 株式会社東芝
发明人： MATSUSHITA KEIICHI
IPC分类号： H01L23/36 , H01L21/338 , H01L27/095 , H01L29/812
摘要： PROBLEM TO BE SOLVED: To provide a high frequency semiconductor device that can suppress faults such as the deterioration of output characteristics due to heat generation or the like and exhibit excellent characteristics also in high frequency.
SOLUTION: The high frequency semiconductor device includes an operation area 2 formed in a compound semiconductor substrate 1, a gate electrode 3 formed on the operation area 2, a source electrode 4 and a drain electrode 5 that are alternatively formed on the operation area 2 with the gate electrode 3 in between, a heat discharging part 13 provided outside the operation area 2 of the compound semiconductor substrate 1, a heat dissipation area 11 that is formed on the compound semiconductor substrate 1 between the gate electrode 3 and the source electrode 4 or between the gate electrode 3 and the drain electrode 5 while an insulation protective film 10 is being interposed, and a heat dissipation line 12 that connects the heat dissipation area 11 and the heat discharging part 13 and is electrically insulated from the gate electrode 3, the source electrode 4 and the drain electrode 5.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：解决的问题：提供一种能够抑制诸如由于发热等导致的输出特性劣化的故障的高频半导体器件，并且在高频下也表现出优异的特性。解决方案：高频半导体器件包括形成在化合物半导体衬底1中的操作区域2，形成在操作区域2上的栅电极3，源电极4和漏电极5，其在操作上交替形成位于其间的栅电极3的区域2，设置在化合物半导体基板1的操作区域2的外侧的放热部13，形成在栅极电极3和源极之间的化合物半导体基板1上的散热区域11 电极4，或者在插入绝缘保护膜10的同时，在栅极电极3和漏极电极5之间，以及连接散热区域11和放热部分13并与栅电极电绝缘的散热线路12 3，源电极4和漏极5。版权所有（C）2008，JPO＆INPIT

13. 发明专利

JP2007123781A Semiconductor substrate with alignment mark and method for manufacturing alignment mark 有权
标题翻译：具有对准标记的半导体基板和用于制造对准标记的方法
公开(公告)号：JP2007123781A
公开(公告)日：2007-05-17
申请号：JP2005317619
申请日：2005-10-31
申请人： Toshiba Corp , 株式会社東芝
发明人： MATSUSHITA KEIICHI , SAKURAI HIROYUKI
IPC分类号： H01L21/027 , H01L21/3065
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor substrate with alignment marks by which proper position information is detected even for a transparent substrate when the semiconductor substrate is positioned during its process, and also to provide a method for manufacturing the alignment marks.
SOLUTION: The engraved alignment marks 4 and 5 are composed of engraved parts 6. Each of the engraved parts 6 is formed of two stairsteps by engraving the first stairstep, and further forming engraved part 62 in the bottom 61 of the first stairstep. In this way, the engraved parts easily reflect light emitted from an alignment light source or the like by scattering and sufficient, and stable reflected light is obtained even from the transparent semiconductor substrate.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：为半导体衬底提供对准标记，当半导体衬底在其工艺期间定位时，即使对于透明衬底也可检测适当的位置信息，并且还提供用于制造对准标记的方法。
解决方案：雕刻对准标记4和5由雕刻部分6组成。每个雕刻部分6通过雕刻第一步态由两个步态形成，并且在第一步骤的底部61中进一步形成雕刻部分62 。以这种方式，通过散射和足够的方式，雕刻部件容易地反射从对准光源等发射的光，并且甚至从透明半导体衬底获得稳定的反射光。版权所有（C）2007，JPO＆INPIT

14. 发明专利

JP2005019676A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2005019676A
公开(公告)日：2005-01-20
申请号：JP2003182370
申请日：2003-06-26
申请人： Toshiba Corp , 株式会社東芝
发明人： MATSUSHITA KEIICHI
IPC分类号： H01L29/812 , H01L21/338
摘要： PROBLEM TO BE SOLVED: To provide the semiconductor device of a high reliability which prevents the characteristic deterioration of an electric element or the like formed on a semiconductor substrate.
SOLUTION: The semiconductor device comprises a GaAs substrate 11 and a protection layer formed on this GaAs substrate 11. The protection layer has at least two layers of a first layer 16 coming into contact with the surface of the GaAs substrate 11 and a second layer 17 positioned on this first layer 16. The first layer 16 is formed with a SiN film of which an N/Si ratio is greater than 0.5.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种高可靠性的半导体器件，其防止形成在半导体衬底上的电气元件等的特性劣化。解决方案：半导体器件包括GaAs衬底11和形成在该GaAs衬底11上的保护层。保护层具有至少两层与GaAs衬底11的表面接触的第一层16和第二层17位于第一层16上。第一层16由N / Si比大于0.5的SiN膜形成。版权所有（C）2005，JPO＆NCIPI

15. 发明专利

JPH0964402A HYBRID INFRARED DETECTOR 失效
公开(公告)号：JPH0964402A
公开(公告)日：1997-03-07
申请号：JP21708595
申请日：1995-08-25
申请人： TOSHIBA CORP
发明人： MATSUSHITA KEIICHI , SHIGENAKA KEITARO , FUKUDA KATSUYOSHI
IPC分类号： H01L27/14 , H01L27/146 , H01L31/10
摘要： PROBLEM TO BE SOLVED: To improve reliability and sensitivity of a hybrid infrared detector formed on a silicon substrate. SOLUTION: The hybrid infrared detector comprises liner protrusions 2 provided on a main surface brought into opposite contact with II to IV compound semiconductor of a silicon orientation index (n11) surface substrate 1 of a photodetector formed with a photodiode, and cracks 9 extended to the II to IV compound semiconductor from the protrusions.

16. 发明专利

JPH09246576A SEMICONDUCTOR PHOTOELECTRIC CONVERSION ELEMENT AND ITS MANUFACTURE 失效
公开(公告)号：JPH09246576A
公开(公告)日：1997-09-19
申请号：JP5319296
申请日：1996-03-11
申请人： TOSHIBA CORP
发明人： SHIGENAKA KEITARO , MATSUSHITA KEIICHI , KAMATA ATSUSHI
IPC分类号： H01L27/14 , H01L21/205 , H01L31/0264
摘要： PROBLEM TO BE SOLVED: To obtain a semiconductor photoelectric conversion element whose resistance-area-value product is increased and whose detection sensitivity is enhanced by a method wherein the band gap of a compound semiconductor light-receiving layer is increased gradually toward the surface from an interface with substrate and an impurity concentration is decreased gradually toward the surface from the interface with the substrate. SOLUTION: In an infrared photodetector, a low-carrier-density p-type HgCdTe light absorption layer 12 is formed on a CdZnTe substrate 11 by an epitaxial growth operation. A high-carrier-density n-type layer 13 is formed selectively on the surface of the p-type HgCdTe light absorption layer 12. An Al electrode 15 is formed on the n-type layer 13, and an Au electrode 16 is formed on an electrode formation region. At this time, in the p-type HgCdTe light absorption layer, a Cd mixed-crystal composition ratio with reference to a band gap is increased gradually toward the surface from an interface with the CdZnTe substrate 11, and an As concentration is decreased gradually toward the surface from the interface with the CdZnTe substrate 11.

17. 发明专利

JPH0888338A SEMICONDUCTOR PHOTOELECTRIC TRANSDUCER AND IMAGE SENSOR USING SEMICONDUCTOR PHOTOELECTRIC TRANSDUCER 失效
公开(公告)号：JPH0888338A
公开(公告)日：1996-04-02
申请号：JP22144294
申请日：1994-09-16
申请人： TOSHIBA CORP
发明人： SHIGENAKA KEITARO , MATSUSHITA KEIICHI , FUKUDA KATSUYOSHI
IPC分类号： H01L27/14 , H01L27/148 , H01L31/032
摘要： PURPOSE: To use a semiconductor photoelectric transducer at room temperature or a temperature capable of being cooled by an electronic cooler utilizing a Peltier effect by introducing charges generated by a piezoelectric effect using distortion resulting in heat generated by the incidence of light on a light- receiving region into a charge transfer region. CONSTITUTION: Light-receiving regions are formed in the surface of a silicon substrate 10 by filling recessed sections partitioned by silicon walls 12 with (111) surfaces with a piezoelectric material. Charge transfer regions 13 are formed on the bottom of the recessed sections except the light-receiving regions 11. The light-receiving regions 11 and the charge transfer regions 13 are connected electrically by gold wirings 14. Charges generated by a piezoelectric effect utilizing distortion generated when the light-receiving regions 11 are heated and expanded by heat generated by the absorption of incident light into the light-receiving regions 11 are introduced into the charge transfer regions 13. Accordingly, a semiconductor optoelectric transducer can be used at room temperature or a temperature capable of cooled by an electronic cooler utilizing a Peltier effect, thus increasing the speed of response, then improving sensitivity.

18. 发明专利

JPH10163117A METHOD AND APPARATUS FOR MANUFACTURING COMPD. SEMICONDUCTOR 失效
公开(公告)号：JPH10163117A
公开(公告)日：1998-06-19
申请号：JP32394996
申请日：1996-12-04
申请人： TOSHIBA CORP
发明人： SHIGENAKA KEITARO , MATSUSHITA KEIICHI
IPC分类号： C30B25/12 , H01L21/205 , H01L21/365 , H01L31/10
摘要： PROBLEM TO BE SOLVED: To reduce the dispersion of the in-plane distribution of the mixed crystal compsn. ratio in a grown layer, by mounting a substrate on a substrate mount having a deeper recess than the thickness of the substrate to deposit the grown layer. SOLUTION: In a rectangular reaction tube 5 a circular columnar substrate mount 1 is inserted so that the top and bottom faces of the substrate mount are parallel to the axis of the tube 5. The mount 1 has a circular recess 7 at the top surface center of the mount and a substrate 2 is settled parallel to the top face of the mount 1 in the recess 7. The recess 7 is deeper by 0.5-5mm than the thickness of the substrate 2. A rotary shaft 4 is mounted on the bottom center of the mount 1 to rotate the mount 1 at a rotation speed 20rpm or more. This reduces the dispersion of the in-plane distribution of the mixed crystal compsn. ratio of an epitaxially grown layer, and hence equalizes the mixed crystal compsn. ratios.

19. 发明专利

JPH08250757A INFRARED DETECTOR 失效
公开(公告)号：JPH08250757A
公开(公告)日：1996-09-27
申请号：JP5437695
申请日：1995-03-14
申请人： TOSHIBA CORP
发明人： MATSUSHITA KEIICHI , SHIGENAKA KEITARO , FUKUDA KATSUYOSHI
IPC分类号： H01L31/10
摘要： PURPOSE: To increase carrier concentration in a semiconductor substrate to prevent infrared transmittance from being reduced by a method wherein a semiconductor layer of a prescribed thickness is provided between the substrate and a compound semiconductor layer constituting a photodetecting part in a prescribed carrier concentration. CONSTITUTION: A p-type semiconductor layer 2 of a carrier concentration of 10 cm or higher is formed on a group IV substrate 1 500 angstrom thick or shorter as a first conductivity type semiconductor layer. Then, a p-type compound is epitaxially grown on the layer 2 and a p-type compound semiconductor layer 3 is formed. Then, an n-type compound semiconductor layer 4 is formed on the upper part of the layer 3. The layers 4 and 3 are insularly divided in an element size and a plurality of p-n junction single elements are formed. These compound semiconductor layers are respectively one kind of the compound semiconductor layer selected from a group, which consists of a III-V compound semiconductor layer, a II-VI compound semiconductor layer and a IV-VI compound semiconductor layer.

20. 发明专利

JPH11330505A SEMICONDUCTOR PHOTOELECTRIC CONVERTER AND ITS MANUFACTURE 失效
公开(公告)号：JPH11330505A
公开(公告)日：1999-11-30
申请号：JP13844798
申请日：1998-05-20
申请人： TOSHIBA CORP
发明人： SHIGENAKA KEITARO , MATSUSHITA KEIICHI
IPC分类号： H01L27/14 , H01L21/365 , H01L21/469 , H01L31/0264 , H01L31/10
摘要： PROBLEM TO BE SOLVED: To form a high quality semiconductor photoelectric converter which is low in a ratio resistance value of a protection layer and low in a resistance area value product of a diode characteristic. SOLUTION: A light receiving layer 12 composed of HgCdTe is formed on a substrate 11 composed of monocrystal CdZnTe by a chemical vapor growing method. A protection layer 13 composed of CdTe is formed continuously to this light receiving layer 12. An indium electrode 15 is connected to a conductive region 14 in the light receiving layer 12. Carbon is added to the protection layer 13 at concentration of 2×10 cm , for example, so that ratio resistance is high. Accordingly, a resistance area value product of a diode characteristic can be increased, and a high quality semiconductor photoelectric converter can be formed.

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