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11. 发明授权

US07529134B2 Flash memory devices configured to be programmed using variable initial program loops and related devices 有权
标题翻译：配置为使用可变初始程序循环和相关设备编程的闪存设备
公开(公告)号：US07529134B2
公开(公告)日：2009-05-05
申请号：US11439797
申请日：2006-05-24
申请人： Wook-Ghee Hahn , Young-Ho Lim , Dae-Seok Byeon
发明人： Wook-Ghee Hahn , Young-Ho Lim , Dae-Seok Byeon
IPC分类号： G11C16/04
CPC分类号： G11C16/30 , G11C5/145 , G11C8/08 , G11C16/04 , G11C16/08 , G11C16/12 , G11C29/02 , G11C29/021 , G11C29/028 , G11C2029/1202
摘要： A method of programming a nonvolatile memory device including a plurality of memory cells includes providing a plurality of program loops having a corresponding plurality of program voltages associated therewith. A first one of the plurality of program loops is activated to generate a first program voltage to program a first one of the plurality of memory cells. A second one of the plurality of program loops is activated to generate a second program voltage to program a second one of the plurality of memory cells.
摘要翻译：包括多个存储器单元的非易失性存储器件的编程方法包括提供具有与其相关联的相应多个编程电压的多个程序循环。多个程序循环中的第一个被激活以产生第一编程电压以编程多个存储器单元中的第一个。多个程序循环中的第二个程序循环被激活以产生第二编程电压以编程多个存储器单元中的第二个。

12. 发明授权

US07405978B2 Nonvolatile semiconductor memory device having bitlines extending from cell array in single direction 有权
标题翻译：非易失性半导体存储器件具有从单元阵列沿单向延伸的位线
公开(公告)号：US07405978B2
公开(公告)日：2008-07-29
申请号：US11513157
申请日：2006-08-31
申请人： Wook-Ghee Hahn , Dae Seok Byeon
发明人： Wook-Ghee Hahn , Dae Seok Byeon
IPC分类号： G11C16/24
CPC分类号： G11C5/063 , G11C16/24
摘要： A semiconductor memory device comprises a cell array including a plurality of memory cells. The semiconductor memory device further comprises a plurality of bitlines formed in a bit layer and connected to the plurality of memory cells, wherein the bitlines extend from the cell array along a single direction. A common source line is formed in a common source layer and adapted to provide a predetermined source voltage to the plurality of memory cells. A voltage control block comprising a plurality of voltage control circuits adapted to control the voltage levels of the plurality of bitlines through voltage supply lines formed in a voltage-line metal layer is formed on one side of the cell array.
摘要翻译：半导体存储器件包括包括多个存储单元的单元阵列。半导体存储器件还包括形成在位层中并连接到多个存储器单元的多个位线，其中位线沿着单个方向从单元阵列延伸。公共源极线形成在公共源层中并且适于向多个存储器单元提供预定的源极电压。电压控制块包括多个电压控制电路，其适于通过形成在电压线金属层中的电压供给线来控制多个位线的电压电平，该电压控制电路形成在电池阵列的一侧。

13. 发明申请

US20050088220A1 Charge pump circuit having high charge transfer efficiency 审中-公开
标题翻译：电荷泵电路具有高电荷转移效率
公开(公告)号：US20050088220A1
公开(公告)日：2005-04-28
申请号：US10925781
申请日：2004-08-24
申请人： Wook-ghee Hahn , Dae-Seok Byeon
发明人： Wook-ghee Hahn , Dae-Seok Byeon
IPC分类号： G11C16/06 , G05F3/02 , G11C16/30 , H02M3/07 , H03K17/06 , H03K17/687
CPC分类号： H02M3/073 , H02M2003/078 , H03K2217/0018
摘要： A charge pump circuit alleviates the body effect of a charge transfer transistor, thereby improving the charge transfer efficiency of the charge transfer transistor and thus pumping efficiency. The charge pump circuit includes a plurality of boosting stages that have input nodes and boosting nodes that are connected in series. Each of the boosting stages includes a charge transfer transistor and a first switch transistor, their respective gates being connected together. A first terminal of the charge transfer transistor is connected to one of the input nodes, and a second terminal of the charge transfer transistor is connected to one of the boosting nodes. The first switch transistor makes the voltage level at the bulk of the charge transfer transistors equal to the voltage level at the first terminal of the charge transfer transistor while charges are being transferred through the charge transfer transistor.
摘要翻译：电荷泵电路减轻电荷转移晶体管的体效应，从而提高电荷转移晶体管的电荷转移效率，从而提高泵送效率。电荷泵电路包括具有串联连接的输入节点和升压节点的多个升压级。每个升压级包括电荷转移晶体管和第一开关晶体管，它们各自的栅极连接在一起。电荷转移晶体管的第一端子连接到一个输入节点，并且电荷转移晶体管的第二端子连接到一个升压节点。第一开关晶体管使得电荷转移晶体管的大部分处的电压电平等于电荷转移晶体管的第一端处的电压电平，同时电荷通过电荷转移晶体管传输。

14. 发明授权

US07505350B2 Voltage reset circuits for a semiconductor memory device using option fuse circuit 失效
标题翻译：使用选项保险丝电路的半导体存储器件的电压复位电路
公开(公告)号：US07505350B2
公开(公告)日：2009-03-17
申请号：US11642105
申请日：2006-12-20
申请人： Hee-Won Lee , Dae-Seok Byeon , Wook-Ghee Hahn
发明人： Hee-Won Lee , Dae-Seok Byeon , Wook-Ghee Hahn
IPC分类号： G11C17/18
CPC分类号： G11C16/30 , G11C5/147 , G11C16/04 , G11C17/18 , G11C29/02 , G11C29/021 , G11C29/028
摘要： Control circuits for a voltage regulator of a semiconductor memory device include an option fuse circuit and a fusing control circuit. The option fuse circuit includes a plurality of fuses and a selection circuit that selects one of the plurality of fuses responsive to a control signal. An output voltage associated with the voltage reset circuit is adjusted responsive to a state of the selected one of the plurality of fuses. A fusing control circuit generates the control signal to allow multiple adjustments of the output voltage by the voltage reset circuit. The option fuse circuit may be a plurality of option fuse circuits and the output voltage may be adjusted responsive to the states of the respective selected ones of the plurality of fuses of the option fuse circuits.
摘要翻译：用于半导体存储器件的电压调节器的控制电路包括选件熔丝电路和定影控制电路。选项熔丝电路包括多个保险丝和选择电路，其根据控制信号选择多个保险丝之一。响应于所选择的多个保险丝的状态来调整与电压复位电路相关联的输出电压。熔断控制电路产生控制信号以允许电压复位电路对输出电压进行多次调节。选项保险丝电路可以是多个选项保险丝电路，并且可以响应于选项保险丝电路的多个保险丝中的相应选择的保险丝的状态来调整输出电压。

15. 发明授权

US07110292B2 Programming circuits and methods for multimode non-volatile memory devices 有权
公开(公告)号：US07110292B2
公开(公告)日：2006-09-19
申请号：US11020517
申请日：2004-12-22
申请人： Wook-Ghee Hahn , Sung-Soo Lee , Dae-Seok Byeon
发明人： Wook-Ghee Hahn , Sung-Soo Lee , Dae-Seok Byeon
IPC分类号： G11C11/34 , G11C16/04
CPC分类号： G11C8/08 , G11C11/5628 , G11C16/0483 , G11C16/10 , G11C16/30 , G11C2211/5641
摘要： A non-volatile memory device includes non-volatile memory cells, a respective one of which is configured to store a single bit in a single bit mode, and to store more than one bit in a multi-bit mode. A single voltage divider is configured to generate at a least a first program voltage for the non-volatile memory cells in the single bit mode, and to generate at least a second program voltage that is different from the first program voltage, for the non-volatile memory cells in the multi-bit mode.

16. 发明申请

US20170110185A1 PROGRAMMING METHOD OF NON VOLATILE MEMORY DEVICE 有权
公开(公告)号：US20170110185A1
公开(公告)日：2017-04-20
申请号：US15294995
申请日：2016-10-17
申请人： Wook-ghee HAHN , Chang-yeon YU , Joo-kwang LEE
发明人： Wook-ghee HAHN , Chang-yeon YU , Joo-kwang LEE
IPC分类号： G11C11/56 , G11C16/04 , G11C16/08 , G11C16/34
CPC分类号： G11C11/5628 , G11C11/5642 , G11C16/0466 , G11C16/0483 , G11C16/08 , G11C16/10 , G11C16/3459
摘要： Provided is a programming method of a nonvolatile memory device including a plurality of memory cells. The programming method of the nonvolatile memory device includes: programming a first set of memory cells of the plurality of memory cells to a target state based on a primary program voltage such that a threshold voltage distribution of the first set of memory cells is formed; grouping the first set of memory cells into a plurality of cell groups at least one cell group having a different threshold voltage distribution width from others, based on program speeds of the first set of memory cells; and reprogramming remaining cell groups other than a first cell group that is programmed to the target state among the plurality of cell groups, to the target state based on a plurality of secondary program voltages determined based on threshold voltage distribution widths of the plurality of cell groups.

17. 发明授权

US08441856B2 Method of providing an operating voltage in a memory device and a memory controller for the memory device 有权
公开(公告)号：US08441856B2
公开(公告)日：2013-05-14
申请号：US13289282
申请日：2011-11-04
申请人： Moo Sung Kim , Wook Ghee Hahn
发明人： Moo Sung Kim , Wook Ghee Hahn
IPC分类号： G11C16/04
CPC分类号： G11C16/26 , G11C11/5642 , G11C16/0483 , G11C16/10
摘要： A method of providing an operating voltage in a memory device includes applying a read voltage to a selected word line while applying a first pass voltage to at least one unselected word line among word lines adjacent to the selected word line; and while applying a second pass voltage to the remaining unselected word lines (other than the at least one unselected word line to which the first pass voltage is applied). The level of the first pass voltage is higher than the level of the second pass voltage. The level of the first pass voltage may be set based on the level of the read voltage.

18. 发明授权

US08050093B2 Non-volatile memory device and bad block remapping method 有权
标题翻译：非易失性存储器件和坏块重映射方法
公开(公告)号：US08050093B2
公开(公告)日：2011-11-01
申请号：US12458999
申请日：2009-07-29
申请人： Wook-ghee Hahn , Jai-ick Son , Youn-yeol Lee
发明人： Wook-ghee Hahn , Jai-ick Son , Youn-yeol Lee
IPC分类号： G11C11/34
CPC分类号： G11C29/76 , G11C16/0483 , G11C2029/4402
摘要： A non-volatile memory device and a bad block remapping method use some of main blocks as remapping blocks to replace a bad block in a main cell block and selects remapping blocks using existing block address signals. Thus, separate bussing of remapping block address signals is not needed. The bad block remapping includes comparing an external block address input from an external source to a stored bad block address, generating a bad block flag signal when the external block address is identical to the stored bad block address, generating a remapping block address selecting the remapping blocks in response to a remapping address corresponding to the bad block address, selecting one of the external block address and the remapping block address in response to the bad block flag signal to create a selected address, and outputting a row address signal in accordance with the selected address.
摘要翻译：非易失性存储器件和坏块重映射方法使用一些主块作为重新映射块来替换主单元块中的坏块并且使用现有块地址信号来选择重映射块。因此，不需要单独的重映射块地址信号的总线。坏块重映射包括将外部源的外部块地址输入与存储的坏块地址进行比较，当外部块地址与存储的坏块地址相同时产生坏块标志信号，生成选择重映射的重映射块地址响应于与坏块地址对应的重映射地址，响应于坏块标志信号选择外部块地址和重映射块地址中的一个以创建所选择的地址，并且根据该块地址信号输出行地址信号选定的地址。

19. 发明授权

US07215181B2 High voltage generator circuit with ripple stabilization function 有权
标题翻译：具有纹波稳定功能的高压发生器电路
公开(公告)号：US07215181B2
公开(公告)日：2007-05-08
申请号：US11025765
申请日：2004-12-28
申请人： Wook-Ghee Hahn , Dae-Seok Byeon
发明人： Wook-Ghee Hahn , Dae-Seok Byeon
IPC分类号： G05F1/10 , H03L7/00
CPC分类号： H02M3/07 , H02M1/14
摘要： The present invention disclosed herein is a high voltage generator circuit. The high voltage generator circuit includes a charge pump and a pump clock signal generator. The pump clock signal is gated to the charge pump when the high voltage is below a target voltage. After the high voltage reaches the target voltage, the high voltage cyclically falls below the target voltage. After the high voltage reaches the target voltage, a pump clock generator block circuit limits the transmission of the pump clock signal so that only N clock signals are gate to the charge pump each cycle, where N is the number one or greater.
摘要翻译：本文公开的本发明是高压发生器电路。高压发生器电路包括电荷泵和泵时钟信号发生器。当高电压低于目标电压时，泵时钟信号被选通到电荷泵。高电压达到目标电压后，高压周期性下降到目标电压以下。在高电压达到目标电压之后，泵时钟发生器电路限制泵时钟信号的传输，从而每个周期只有N个时钟信号被选通到电荷泵，其中N是一个或更多个。

20. 发明申请

US20070074194A1 Methods for programming flash memory devices using variable initial program loops and related devices 有权
标题翻译：使用可变初始程序循环和相关设备编程闪存设备的方法
公开(公告)号：US20070074194A1
公开(公告)日：2007-03-29
申请号：US11439797
申请日：2006-05-24
申请人： Wook-Ghee Hahn , Young-Ho Lim , Dae-Seok Byeon
发明人： Wook-Ghee Hahn , Young-Ho Lim , Dae-Seok Byeon
IPC分类号： G06F9/45
CPC分类号： G11C16/30 , G11C5/145 , G11C8/08 , G11C16/04 , G11C16/08 , G11C16/12 , G11C29/02 , G11C29/021 , G11C29/028 , G11C2029/1202
摘要： A method of programming a nonvolatile memory device including a plurality of memory cells includes providing a plurality of program loops having a corresponding plurality of program voltages associated therewith. A first one of the plurality of program loops is activated to generate a first program voltage to program a first one of the plurality of memory cells. A second one of the plurality of program loops is activated to generate a second program voltage to program a second one of the plurality of memory cells. Related devices are also discussed.
摘要翻译：包括多个存储器单元的非易失性存储器件的编程方法包括提供具有与其相关联的相应多个编程电压的多个程序循环。多个程序循环中的第一个被激活以产生第一编程电压以编程多个存储器单元中的第一个。多个程序循环中的第二个程序循环被激活以产生第二编程电压以编程多个存储器单元中的第二个。还讨论了相关设备。

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