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11. 发明授权

US5400963A Method and apparatus for controlling vehicle air conditioner 失效
标题翻译：车辆空调控制方法及装置
公开(公告)号：US5400963A
公开(公告)日：1995-03-28
申请号：US135621
申请日：1993-10-14
申请人： Toshikazu Ishikawa , Shigetoshi Doi , Shinshi Kajimoto , Eiji Ukita , Yoshiaki Nagayama , Hiroshi Asou , Yasuhiro Enno , Takashi Tsuchida
发明人： Toshikazu Ishikawa , Shigetoshi Doi , Shinshi Kajimoto , Eiji Ukita , Yoshiaki Nagayama , Hiroshi Asou , Yasuhiro Enno , Takashi Tsuchida
IPC分类号： B60H1/00
CPC分类号： B60H1/00892 , B60H1/00735 , B60H1/00814 , B60H1/00864
摘要： This invention has as its object to provide a method and apparatus for controlling a vehicle air conditioner, which can obtain a combination of an outlet air flow rate V.sub.a and an outlet air temperature T.sub.o, which is desirable for comfort of a passenger, under a condition of air-conditioning control based on a heat balance equation. In order to achieve this object, this invention provides a method of controlling a vehicle air conditioner including the first step of obtaining, from a heat balance equation, a plurality of combinations of the outlet air flow rates V.sub.a and the outlet air temperatures T.sub.o necessary for maintaining the passenger room temperature to be a predetermined target temperature, the second step of calculating comfort indices each representing the comfort level of a passenger on the basis of state amounts of factors which influence comfort felt by the passenger in the passenger room, and the plurality of combinations of the outlet air flow rates V.sub.a and the outlet air temperatures T.sub.o obtained in the first step, and the third step of searching a combination of the outlet air flow rate and the outlet air temperature, which can provide a comfort index closest to an optimal value of the comfort indices calculated in the second step.
摘要翻译：本发明的目的是提供一种用于控制车辆空调的方法和装置，其可以在条件下获得出口空气流量Va和出口空气温度To的组合，这对于乘客的舒适是理想的基于热平衡方程的空调控制。为了实现该目的，本发明提供了一种控制车辆空调的方法，该方法包括：第一步骤，从热平衡方程式获得出口空气流量Va和出口空气温度的多个组合，将乘员室温度保持为预定的目标温度，第二步骤，基于影响乘客在乘客室感觉到的舒适感的因素的状态量，计算各乘员的舒适度指标，并且多个出口空气流量Va和出口空气温度To的组合的第一步骤，以及第三步骤，搜索出口空气流量和出口空气温度的组合，其可以提供最接近于在第二步计算的舒适指标的最佳值。

12. 发明授权

US08698299B2 Semiconductor device with wiring substrate including lower conductive pads and testing conductive pads 有权
标题翻译：具有布线基板的半导体器件包括下导电焊盘和测试导电焊盘
公开(公告)号：US08698299B2
公开(公告)日：2014-04-15
申请号：US13409865
申请日：2012-03-01
申请人： Toshikazu Ishikawa , Mikako Okada
发明人： Toshikazu Ishikawa , Mikako Okada
IPC分类号： H01L23/02
CPC分类号： H01L21/50 , H01L22/32 , H01L23/498 , H01L24/73 , H01L25/105 , H01L25/18 , H01L2224/16225 , H01L2224/16238 , H01L2224/32145 , H01L2224/32225 , H01L2224/45144 , H01L2224/48225 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2225/0651 , H01L2225/06575 , H01L2225/1023 , H01L2225/1058 , H01L2924/15311 , H01L2924/15331 , H01L2924/3511 , H01L2924/00 , H01L2924/00012
摘要： Miniaturization and high-performance of a semiconductor device are promoted, which has a package on package (POP) structure in which a plurality of semiconductor packages is stacked in a multistage manner. A testing conductive pad for determining the quality of a conduction state of a microcomputer chip and a memory chip is arranged outside a conductive pad for external input/output and thereby the route of a wire that couples the microcomputer chip and the memory chip to the testing conductive pad is reduced in length. Further, the wire that couples the microcomputer chip and the memory chip to the testing conductive pad is coupled to a pad in the outer row among conductive pads in two rows to be coupled to the microcomputer chip.
摘要翻译：促进半导体器件的小型化和高性能，其具有封装（POP）封装，其中多个半导体封装以多级堆叠。用于确定微型计算机芯片和存储芯片的导通状态的质量的测试导电焊盘被布置在用于外部输入/输出的导电焊盘外部，从而将将微计算机芯片和存储器芯片耦合到测试的导线的路线导电垫的长度减小。此外，将微型计算机芯片和存储芯片耦合到测试导电焊盘的导线被耦合到两行的导电焊盘中的外排中的焊盘，以耦合到微计算机芯片。

13. 发明授权

US08389339B2 Method of manufacturing semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US08389339B2
公开(公告)日：2013-03-05
申请号：US13235247
申请日：2011-09-16
申请人： Yusuke Tanuma , Toshikazu Ishikawa
发明人： Yusuke Tanuma , Toshikazu Ishikawa
IPC分类号： H01L21/58
CPC分类号： H01L24/97 , H01L21/4846 , H01L21/563 , H01L23/49822 , H01L23/49838 , H01L23/50 , H01L24/04 , H01L24/06 , H01L24/16 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/92 , H01L25/105 , H01L25/50 , H01L2224/0401 , H01L2224/04042 , H01L2224/05553 , H01L2224/06153 , H01L2224/06155 , H01L2224/131 , H01L2224/16225 , H01L2224/16227 , H01L2224/16237 , H01L2224/26175 , H01L2224/27013 , H01L2224/2919 , H01L2224/32225 , H01L2224/45144 , H01L2224/48095 , H01L2224/48227 , H01L2224/48228 , H01L2224/49175 , H01L2224/73204 , H01L2224/73265 , H01L2224/81097 , H01L2224/81193 , H01L2224/81194 , H01L2224/83051 , H01L2224/831 , H01L2224/83102 , H01L2224/92125 , H01L2224/97 , H01L2225/1023 , H01L2225/1058 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01029 , H01L2924/01033 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/0665 , H01L2924/078 , H01L2924/15174 , H01L2924/15192 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/351 , H01L2224/81 , H01L2924/00014 , H01L2924/00 , H01L2924/00012 , H01L2924/3512
摘要： It is aimed at improving the reliability of a semiconductor device.In a POP having an upper package stacked on a lower package, an opening of a first solder resist film in a first region between a first group of lands arranged at the periphery of an front surface of a wiring substrate of the lower package and a second group of lands arranged in a central part is filled with a second solder resist film, and thereby the formation of a starting point of cracks in the opening becomes unlikely to suppress occurrence of cracks and improve the reliability of the POP.
摘要翻译：旨在提高半导体器件的可靠性。在具有堆叠在下封装上的上封装的POP中，在布置在下封装的布线基板的正面的周边的第一组焊盘之间的第一区域中的第一阻焊膜的开口和第二焊盘设置在中心部分的一组焊盘填充有第二阻焊膜，从而在开口中形成裂纹的起点不太可能抑制裂纹的发生并提高POP的可靠性。

14. 发明申请

US20120153282A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20120153282A1
公开(公告)日：2012-06-21
申请号：US13409865
申请日：2012-03-01
申请人： Toshikazu ISHIKAWA , Mikako OKADA
发明人： Toshikazu ISHIKAWA , Mikako OKADA
IPC分类号： H01L23/498
CPC分类号： H01L21/50 , H01L22/32 , H01L23/498 , H01L24/73 , H01L25/105 , H01L25/18 , H01L2224/16225 , H01L2224/16238 , H01L2224/32145 , H01L2224/32225 , H01L2224/45144 , H01L2224/48225 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2225/0651 , H01L2225/06575 , H01L2225/1023 , H01L2225/1058 , H01L2924/15311 , H01L2924/15331 , H01L2924/3511 , H01L2924/00 , H01L2924/00012
摘要： Miniaturization and high-performance of a semiconductor device are promoted, which has a package on package (POP) structure in which a plurality of semiconductor packages is stacked in a multistage manner. A testing conductive pad for determining the quality of a conduction state of a microcomputer chip and a memory chip is arranged outside a conductive pad for external input/output and thereby the route of a wire that couples the microcomputer chip and the memory chip to the testing conductive pad is reduced in length. Further, the wire that couples the microcomputer chip and the memory chip to the testing conductive pad is coupled to a pad in the outer row among conductive pads in two rows to be coupled to the microcomputer chip.
摘要翻译：促进半导体器件的小型化和高性能，其具有封装（POP）封装，其中多个半导体封装以多级堆叠。用于确定微型计算机芯片和存储芯片的导通状态的质量的测试导电焊盘被布置在用于外部输入/输出的导电焊盘外部，从而将将微计算机芯片和存储器芯片耦合到测试的导线的路线导电垫的长度减小。此外，将微型计算机芯片和存储芯片耦合到测试导电焊盘的导线被耦合到两行的导电焊盘中的外排中的焊盘，以耦合到微计算机芯片。

15. 发明申请

US20110300672A1 SEMICONDUCTOR DEVICE, AND MANUFACTURING METHOD THEREFOR 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110300672A1
公开(公告)日：2011-12-08
申请号：US13212311
申请日：2011-08-18
申请人： Yusuke OTA , Michiaki SUGIYAMA , Toshikazu ISHIKAWA , Mikako OKADA
发明人： Yusuke OTA , Michiaki SUGIYAMA , Toshikazu ISHIKAWA , Mikako OKADA
IPC分类号： H01L21/56
CPC分类号： H01L23/49838 , H01L21/563 , H01L23/3128 , H01L23/49816 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/97 , H01L25/03 , H01L25/0657 , H01L25/105 , H01L2224/05001 , H01L2224/05026 , H01L2224/05568 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48095 , H01L2224/48227 , H01L2224/73203 , H01L2224/73204 , H01L2224/73265 , H01L2224/81191 , H01L2224/814 , H01L2224/97 , H01L2225/0651 , H01L2225/06517 , H01L2225/1023 , H01L2225/1058 , H01L2924/00014 , H01L2924/01019 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/00 , H01L2924/014 , H01L2924/00012 , H01L2224/85 , H01L2224/83 , H01L2224/81 , H01L2224/05599 , H01L2224/05099
摘要： To provide a semiconductor device with improved reliability. The semiconductor device includes a wiring board, a microcomputer chip flip-chip bonded over the wiring board via gold bumps, a first memory chip laminated over the microcomputer chip, wires for coupling the first memory chip to the wiring board, an underfill material with which a flip-chip coupling portion of the microcomputer chip is filled, and a sealing member for sealing the microcomputer chip and the first memory chip with resin. Further, the corner of a second opening portion of a solder resist film of the wiring board corresponding to the corner of the chip on the air vent side in charging the underfill material is made close to the microcomputer chip, which can improve the wettability and spread of the underfill material at the second opening portion, thus reducing the exposure of leads to the second opening portion, thereby improving the reliability of the semiconductor device.
摘要翻译：提供具有改善的可靠性的半导体器件。半导体器件包括布线板，通过金凸块接合在布线板上的微计算机芯片倒装芯片，叠置在微计算机芯片上的第一存储芯片，用于将第一存储器芯片耦合到布线板的导线，用于将第一存储器芯片耦合到布线板的底部填充材料，填充微型计算机芯片的倒装芯片连接部分，以及用树脂密封微型计算机芯片和第一存储器芯片的密封构件。此外，在对底部填充材料充电时，对应于排气侧的芯片的角部的布线板的阻焊膜的第二开口部分的角部靠近微型计算机芯片，这可以提高润湿性和扩展的第二开口部分的底部填充材料，从而减少了引线到第二开口部分的暴露，从而提高了半导体器件的可靠性。

16. 发明申请

US20110140105A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110140105A1
公开(公告)日：2011-06-16
申请号：US12946131
申请日：2010-11-15
申请人： Kazuya MARUYAMA , Toshikazu ISHIKAWA , Jun MATSUHASHI , Takashi KIKUCHI
发明人： Kazuya MARUYAMA , Toshikazu ISHIKAWA , Jun MATSUHASHI , Takashi KIKUCHI
IPC分类号： H01L23/495 , H01L21/66
CPC分类号： H01L23/49838 , H01L22/32 , H01L23/3121 , H01L23/49816 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/0657 , H01L25/105 , H01L2224/05554 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45144 , H01L2224/48227 , H01L2224/48228 , H01L2224/48229 , H01L2224/49175 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2225/06562 , H01L2225/1023 , H01L2225/1058 , H01L2924/00014 , H01L2924/01013 , H01L2924/01014 , H01L2924/01028 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/078 , H01L2924/10161 , H01L2924/10162 , H01L2924/14 , H01L2924/15192 , H01L2924/15311 , H01L2924/15331 , H01L2924/3011 , H01L2924/3511 , H01L2924/00 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
摘要： A surface mount type semiconductor device is disclosed. The semiconductor device has testing lands on a lower surface of a wiring substrate with a semiconductor chip mounted thereon. Lower surface-side lands with solder balls coupled thereto respectively and testing lands with solder balls not coupled thereto are formed on a lower surface of a wiring substrate. To suppress the occurrence of contact imperfection between the testing lands and land contacting contact pins provided in a probe socket, the diameter of each testing land is set larger than the diameter of each lower surface-side land. Even when the wiring substrate is reduced in size, electrical characteristic tests using the testing lands can be done with high accuracy.
摘要翻译：公开了一种表面贴装型半导体器件。半导体器件具有安装在其上的半导体芯片的布线基板的下表面上的测试焊盘。具有与其分别耦合的焊料球的下表面侧焊盘和在其没有耦合的焊球的测试焊盘形成在布线基板的下表面上。为了抑制测试台和设置在探针插座中的接地触针之间的接触不良的发生，每个测试台的直径被设定为大于每个下表面侧的直径。即使布线基板的尺寸减小，也可以高精度地进行使用测试台面的电特性测试。

17. 发明申请

US20100330742A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20100330742A1
公开(公告)日：2010-12-30
申请号：US12793923
申请日：2010-06-04
申请人： Michiaki Sugiyama , Takashi Miwa , Toshikazu Ishikawa , Tatsuya Hirai
发明人： Michiaki Sugiyama , Takashi Miwa , Toshikazu Ishikawa , Tatsuya Hirai
IPC分类号： H01L21/60
CPC分类号： H01L23/49833 , H01L24/16 , H01L24/48 , H01L24/97 , H01L25/0655 , H01L25/0657 , H01L25/105 , H01L25/16 , H01L25/18 , H01L2224/0554 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/32225 , H01L2224/48227 , H01L2224/73204 , H01L2224/97 , H01L2225/1035 , H01L2225/1058 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/15153 , H01L2924/1517 , H01L2924/15183 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2224/81 , H01L2924/00 , H01L2224/05599 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2224/0555 , H01L2224/0556
摘要： A first conductive member made of metal is provided over a first wiring substrate, which is a mounting substrate in the lower tier, a through hole is provided in a second wiring substrate, which is a mounting substrate in the upper tier, at a position corresponding to the first conductive member in a plan view, and a wiring is exposed at the sidewall of the through hole. The first conductive member is inserted into the through hole on the corresponding first wiring substrate side and the first wiring substrate and the second wiring substrate are electrically coupled by filling the through hole with a second conductive member. an electrode pad that is electrically coupled to the second conductive member and over which a semiconductor member in the upper tier is mounted is formed on the main surface side of the second wiring substrate.
摘要翻译：金属制的第一导电部件设置在第一布线基板上，第一布线基板是下层中的安装基板，通孔设置在第二布线基板中，第二布线基板是上层中的安装基板，在平面图中的第一导电构件，并且布线在通孔的侧壁处露出。将第一导电构件插入对应的第一布线基板侧的通孔中，并且通过用第二导电构件填充通孔来电耦合第一布线基板和第二布线基板。在第二布线基板的主表面侧形成有电耦合到第二导电构件并且在其上安装上层中的半导体构件的电极焊盘。

18. 发明授权

US07652368B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US07652368B2
公开(公告)日：2010-01-26
申请号：US11946581
申请日：2007-11-28
申请人： Yoshinari Hayashi , Toshikazu Ishikawa , Takayuki Hoshino
发明人： Yoshinari Hayashi , Toshikazu Ishikawa , Takayuki Hoshino
IPC分类号： H01L21/58
CPC分类号： H01L23/49816 , H01L22/32 , H01L23/49838 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/0657 , H01L25/18 , H01L2224/0401 , H01L2224/05553 , H01L2224/0603 , H01L2224/06179 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/49171 , H01L2224/49175 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2225/0651 , H01L2225/06517 , H01L2225/06582 , H01L2225/06596 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10161 , H01L2924/12041 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： A semiconductor device having a first semiconductor chip with an SDRAM and a second semiconductor chip with a an MPU controlling the SDRAM. The contour size of the semiconductor device is reduced to a smaller size without impairing the testability of the first semiconductor chip. The two semiconductor chips are stacked over the top surface of an interconnect substrate and sealed in a molding resin, thus forming an SiP (System-in-Package). First terminals electrically connected with the second chip are arranged as external terminals of the SiP on the outer periphery of the bottom surface of the interconnect substrate. Plural second electrodes electrically connected with interconnects, which electrically connect the two chips, are mounted as terminals for testing of the SDRAM. The second electrodes are located more inwardly than the innermost row of the first external electrodes on the bottom surface of the interconnect substrate.
摘要翻译：具有SDRAM的第一半导体芯片和具有控制SDRAM的MPU的第二半导体芯片的半导体器件。半导体器件的轮廓尺寸减小到更小的尺寸，而不损害第一半导体芯片的可测试性。将两个半导体芯片堆叠在互连基板的顶表面上并密封在模制树脂中，从而形成SiP（系统级封装）。与第二芯片电连接的第一端子被布置为在互连基板的底表面的外周上的SiP的外部端子。电连接两个芯片的互连电连接的多个第二电极被安装作为用于测试SDRAM的端子。第二电极比互连基板的底表面上的第一外部电极的最内排更向内定位。

19. 发明授权

US07323773B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US07323773B2
公开(公告)日：2008-01-29
申请号：US11221904
申请日：2005-09-09
申请人： Yoshinari Hayashi , Toshikazu Ishikawa , Takayuki Hoshino
发明人： Yoshinari Hayashi , Toshikazu Ishikawa , Takayuki Hoshino
IPC分类号： H01L21/58
CPC分类号： H01L23/49816 , H01L22/32 , H01L23/49838 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/0657 , H01L25/18 , H01L2224/0401 , H01L2224/05553 , H01L2224/0603 , H01L2224/06179 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/49171 , H01L2224/49175 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2225/0651 , H01L2225/06517 , H01L2225/06582 , H01L2225/06596 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10161 , H01L2924/12041 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： There is disclosed a semiconductor device having first and second semiconductor chips. The first semiconductor chip has a memory circuit. The second semiconductor chip has a circuit controlling the memory circuit. The contour size of the semiconductor device is reduced down to a smaller size required by a client without impairing the testability of the first semiconductor chip having the memory circuit. The circuit controlling the memory circuit consists of an MPU. The memory circuit consists of an SDRAM. The two semiconductor chips are stacked on top of each other over the top surface of an interconnect substrate. The chips are sealed in a molding resin, thus forming an SiP (System-in-Package). First terminals electrically connected with the second chip are arranged as external terminals of the SiP on the outer periphery of the bottom surface of the interconnect substrate. Plural second electrodes electrically connected with interconnects, which electrically connect the two chips, are mounted as terminals for testing of the SDRAM. The second electrodes are located more inwardly than the innermost row of the first external electrodes on the bottom surface of the interconnect substrate.
摘要翻译：公开了具有第一和第二半导体芯片的半导体器件。第一半导体芯片具有存储电路。第二半导体芯片具有控制存储电路的电路。半导体器件的轮廓尺寸减小到客户所需的较小尺寸，而不损害具有存储电路的第一半导体芯片的可测试性。控制存储电路的电路由MPU组成。存储电路由SDRAM组成。两个半导体芯片在互连衬底的顶表面上彼此堆叠。将芯片密封在模制树脂中，从而形成SiP（系统级封装）。与第二芯片电连接的第一端子被布置为在互连基板的底表面的外周上的SiP的外部端子。电连接两个芯片的互连电连接的多个第二电极被安装作为用于测试SDRAM的端子。第二电极比互连基板的底表面上的第一外部电极的最内排更向内定位。

20. 发明授权

US5603226A Method and apparatus for controlling vehicle air conditioner 失效
标题翻译：车辆空调控制方法及装置
公开(公告)号：US5603226A
公开(公告)日：1997-02-18
申请号：US365400
申请日：1994-12-28
申请人： Toshikazu Ishikawa , Shigetoshi Doi , Shinshi Kajimoto , Eiji Ukita , Yoshiaki Nagayama , Hiroshi Asou , Yasuhiro Enno , Takashi Tsuchida
发明人： Toshikazu Ishikawa , Shigetoshi Doi , Shinshi Kajimoto , Eiji Ukita , Yoshiaki Nagayama , Hiroshi Asou , Yasuhiro Enno , Takashi Tsuchida
IPC分类号： B60H1/00 , F25D17/08
CPC分类号： B60H1/00892 , B60H1/00735 , B60H1/00814 , B60H1/00864
摘要： This invention has as its object to provide a method and apparatus for controlling a vehicle air conditioner, which can obtain a combination of an outlet air flow rate V.sub.a and an outlet air temperature T.sub.o, which is desirable for comfort of a passenger, under a condition of air-conditioning control based on a heat balance equation. In order to achieve this object, this invention provides a method of controlling a vehicle air conditioner, including the first step of obtaining, from a heat balance equation, a plurality of combinations of the outlet air flow rates V.sub.a and the outlet air temperatures T.sub.o necessary for maintaining the passenger room temperature to be a predetermined target temperature, the second step of calculating comfort indices each representing the comfort level of a passenger on the basis of state amounts of factors which influence comfort felt by the passenger in the passenger room, and the plurality of combinations of the outlet air flow rates V.sub.a and the outlet air temperatures T.sub.o obtained in the first step, and the third step of searching a combination of the outlet air flow rate and the outlet air temperature, which can provide a comfort index closest to an optimal value of the comfort indices calculated in the second step.
摘要翻译：本发明的目的是提供一种用于控制车辆空调的方法和装置，其可以在条件下获得出口空气流量Va和出口空气温度To的组合，这对于乘客的舒适是理想的基于热平衡方程的空调控制。为了实现该目的，本发明提供了一种控制车辆空调的方法，其包括从热平衡方程式获得出口空气流量Va和出口空气温度的多种组合的第一步骤。用于将乘员室温度保持为预定目标温度，第二步骤基于影响乘客在乘客室感觉到舒适感的因素的状态量来计算每个代表乘客舒适度的舒适度指标，以及在第一步骤中获得的出口空气流量Va和出口空气温度To的多个组合，以及搜索出口空气流量和出口空气温度的组合的第三步骤，其可以提供最接近在第二步骤中计算的舒适度指标的最佳值。

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