专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

11. 发明授权

US08587035B2 Device 有权
标题翻译：设备
公开(公告)号：US08587035B2
公开(公告)日：2013-11-19
申请号：US13042108
申请日：2011-03-07
申请人： Shinichi Takayama , Yasutoshi Yamada
发明人： Shinichi Takayama , Yasutoshi Yamada
IPC分类号： H01L23/52
CPC分类号： H01L27/0207 , G11C11/4094 , G11C11/4096 , G11C11/4097 , H01L27/10811 , H01L27/10876 , H01L27/10885 , H01L27/10897
摘要： A device includes a semiconductor substrate, a first local bit line formed in the semiconductor substrate and elongated in a first direction, a first insulating layer on the semiconductor substrate, a first global bit line formed on the first insulating layer, a first path formed in the first insulating layer to couple a first end of the first local bit line with the first global bit line, and a second path formed in the first insulating layer to couple a second end of the first local bit line with the first global bit line.
摘要翻译：一种器件包括半导体衬底，形成在半导体衬底中并在第一方向上延伸的第一局部位线，在半导体衬底上的第一绝缘层，形成在第一绝缘层上的第一全局位线，形成在第一绝缘层上的第一通路所述第一绝缘层将所述第一局部位线的第一端与所述第一全局位线耦合，以及形成在所述第一绝缘层中以将所述第一局部位线的第二端与所述第一全局位线耦合的第二路径。

12. 发明授权

US08467217B2 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US08467217B2
公开(公告)日：2013-06-18
申请号：US12929896
申请日：2011-02-23
申请人： Shinichi Takayama , Kazuhiko Kajigaya , Akira Kotabe , Satoru Akiyama , Tomonori Sekiguchi
发明人： Shinichi Takayama , Kazuhiko Kajigaya , Akira Kotabe , Satoru Akiyama , Tomonori Sekiguchi
IPC分类号： G11C5/06 , G11C7/00 , G11C8/00
CPC分类号： G11C29/02 , G11C11/4091 , G11C11/4097 , G11C29/04 , G11C2207/002 , G11C2207/005
摘要： The semiconductor device comprises first and second memory cells, first and second bit lines connected to the first/second memory cells, first and second amplifiers connected to the second bit line, a local input/output line commonly connected to the first/second amplifiers, first and second local column switches connected between the first/second amplifiers and the local input/output line, a second local column switch connected between the second amplifier and the local input/output line, a column select line, a first global column switch connected between the column select line and the first local column switch and controlling a connection therebetween in response to a first select signal, and a second global column switch connected between the column select line and the second local column switch and controlling a connection therebetween in response to a first select signal.
摘要翻译：半导体器件包括第一和第二存储器单元，连接到第一/第二存储器单元的第一和第二位线，连接到第二位线的第一和第二放大器，共同连接到第一/第二放大器的本地输入/输出线，连接在第一/第二放大器和本地输入/输出线之间的第一和第二本地列开关，连接在第二放大器和本地输入/输出线之间的第二本地列开关，列选择线，连接的第一全局列开关在列选择线和第一本地列开关之间并响应于第一选择信号控制它们之间的连接;以及连接在列选择线和第二本地列开关之间的第二全局列开关，并且响应于第一选择信号。

13. 发明申请

US20130016820A1 ECHO CANCELLATION APPARATUS, CONFERENCING SYSTEM USING THE SAME, AND ECHO CANCELLATION METHOD 有权
标题翻译： ECHO取消设备，使用该设备的会议系统和ECHO取消方法
公开(公告)号：US20130016820A1
公开(公告)日：2013-01-17
申请号：US13544514
申请日：2012-07-09
申请人： Shinichi TAKAYAMA , Tsuyoki Nishikawa
发明人： Shinichi TAKAYAMA , Tsuyoki Nishikawa
IPC分类号： H04M3/42 , H04M9/08
CPC分类号： H04B3/23
摘要： An echo cancellation apparatus is connectable to a speaker configured to output speaker signals and a microphone configured to receive a sound from the speaker and including a plurality of microphone elements. The echo cancellation apparatus includes: a generating unit configured to generate a plurality of sensitivity signals having different sensitivity patterns which represent directionality of the microphone, based on a plurality of microphone signals obtained from the respective microphone signals; a delay estimating unit configured to determine a shortest delay time as an estimated delay time, the shortest delay time being a shortest one of delay times between the speaker signals and the microphone signals, the delay times being obtained from the respective sensitivity signals; and an echo suppressing unit configured to suppress echoes of the plurality of microphone signals using the estimated delay time.
摘要翻译：回声消除装置可连接到被配置为输出扬声器信号的扬声器和被配置为从扬声器接收声音并且包括多个麦克风元件的麦克风。回波消除装置包括：生成单元，被配置为基于从各个麦克风信号获得的多个麦克风信号，生成具有表示麦克风的方向性的不同灵敏度图案的多个灵敏度信号; 延迟估计单元，被配置为将最短延迟时间确定为估计延迟时间，所述最短延迟时间是所述扬声器信号和所述麦克风信号之间的延迟时间中最短的延迟时间，所述延迟时间是从各个灵敏度信号获得的; 以及回波抑制单元，被配置为使用所估计的延迟时间来抑制所述多个麦克风信号的回波。

14. 发明申请

US20110205820A1 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US20110205820A1
公开(公告)日：2011-08-25
申请号：US12929896
申请日：2011-02-23
申请人： Shinichi Takayama , Kazuhiko Kajigaya , Akira Kotabe , Satoru Akiyama , Tomonori Sekiguchi
发明人： Shinichi Takayama , Kazuhiko Kajigaya , Akira Kotabe , Satoru Akiyama , Tomonori Sekiguchi
IPC分类号： G11C29/04 , G11C7/06
CPC分类号： G11C29/02 , G11C11/4091 , G11C11/4097 , G11C29/04 , G11C2207/002 , G11C2207/005
摘要： The semiconductor device comprises first and second memory cells, first and second bit lines connected to the first/second memory cells, first and second amplifiers connected to the second bit line, a local input/output line commonly connected to the first/second amplifiers, first and second local column switches connected between the first/second amplifiers and the local input/output line, a second local column switch connected between the second amplifier and the local input/output line, a column select line, a first global column switch connected between the column select line and the first local column switch and controlling a connection therebetween in response to a first select signal, and a second global column switch connected between the column select line and the second local column switch and controlling a connection therebetween in response to a first select signal.
摘要翻译：半导体器件包括第一和第二存储器单元，连接到第一/第二存储器单元的第一和第二位线，连接到第二位线的第一和第二放大器，共同连接到第一/第二放大器的本地输入/输出线，连接在第一/第二放大器和本地输入/输出线之间的第一和第二本地列开关，连接在第二放大器和本地输入/输出线之间的第二本地列开关，列选择线，连接的第一全局列开关在列选择线和第一本地列开关之间并响应于第一选择信号控制它们之间的连接;以及连接在列选择线和第二本地列开关之间的第二全局列开关，并且响应于第一选择信号。

15. 发明授权

US6050499A Rotary spray head coater 有权
标题翻译：旋转喷涂机
公开(公告)号：US6050499A
公开(公告)日：2000-04-18
申请号：US117451
申请日：1998-08-03
申请人： Shinichi Takayama , Masatoshi Kon , Shogo Ikeda
发明人： Shinichi Takayama , Masatoshi Kon , Shogo Ikeda
IPC分类号： B05B3/10 , B05B7/08 , B05B15/02
CPC分类号： B05B5/04 , B05B15/025 , B05B3/1064 , B05B5/0422 , B05B5/0426 , B05B5/0407
摘要： A rotary atomizing head type coating machine which is capable of washing deposited paint from fore end portions of outer peripheral surface of a bell cup. Thinner passages are provided on the bell cup to communicate a paint reservoir with the outer peripheral surface of the bell cup. Thinner which flows out onto the outer peripheral surface of the bell cup through the thinner passages is guided toward the marginal releasing edge of the bell cup. To this end, assist air is spurted out through assist air outlet holes which are provided in the fore end face of a shaping air ring at positions radially on the inner side of shaping air outlet holes. Accordingly, at the time of a washing operation, the thinner which has come out onto the outer peripheral surface of the bell cup is forcibly pushed on the outer peripheral surface by the actions of assist air and shaping air as the thinner is guided toward the fore end of the bell cup to wash away deposited paint therefrom.
摘要翻译： PCT No.PCT / JP97 / 04405 Sec。 371日期1998年8月3日 102（e）1998年8月3日PCT 1997年12月2日PCT PCT。第WO98 / 24554号公报日期1998年6月11日一种旋转雾化头型涂布机，其能够从钟罩的外周面的前端部洗涤沉积的涂料。在钟形杯上提供较薄的通道，以将油漆储存器与钟罩的外周表面连通。通过较薄的通道流出到钟罩的外周表面的稀释剂被引导到钟罩的边缘释放边缘。为此，通过辅助空气出口孔将辅助空气喷出，该空气出口孔设置在成形用空气环的前端面的径向配置在排出孔内侧的位置处。因此，在洗涤操作时，由于辅助空气和成形空气的作用，已经出现在钟罩的外周面上的薄膜被强制地推向外周面，钟罩末端冲洗沉积的油漆。

16. 发明授权

US5641866A Bcl-2-associated proteins 失效
公开(公告)号：US5641866A
公开(公告)日：1997-06-24
申请号：US463089
申请日：1995-06-05
申请人： John C. Reed , Shinichi Takayama , Takaaki Sato
发明人： John C. Reed , Shinichi Takayama , Takaaki Sato
IPC分类号： G01N33/53 , A61K38/00 , C07K14/47 , C07K14/82 , C07K16/18 , C12N15/09 , C12P21/02 , C12P21/08 , C12Q1/02 , G01N33/566 , C07K16/00 , G01N33/574
CPC分类号： C07K16/18 , C07K14/47 , C07K14/82 , A61K38/00 , C07K2319/00 , C12N2799/026
摘要： The present invention provides nucleotide sequences encoding proteins and fragments thereof that bind to Bcl-2-related proteins. The invention also provides a Bcl-2-associated protein (BAP) such as Bcl-2-associated protein-1 (BAP-1), which binds to Bcl-2. The invention also provides antibodies that specifically bind to a BAP. The invention further provides methods for detecting agents such as drugs that alter the binding of a BAP such as BAP-1 or Raf-related protein with a Bcl-2-related protein and methods for detecting agents that induce dissociation of a bound complex formed by the association of a BAP and a Bcl-2-related protein. The invention further provides methods for modulating the activity of a Bcl-2-related protein in a cell by introducing into the cell a nucleic acid encoding a BAP or by introducing into the cell an antisense nucleotide sequence, which is complementary to a region of a gene encoding a BAP.

17. 发明授权

US08917567B2 Semiconductor device having hierarchical bit line structure and control method thereof 有权
标题翻译：具有分层位线结构的半导体器件及其控制方法
公开(公告)号：US08917567B2
公开(公告)日：2014-12-23
申请号：US13313731
申请日：2011-12-07
申请人： Shinichi Takayama , Kazuhiko Kajigaya
发明人： Shinichi Takayama , Kazuhiko Kajigaya
IPC分类号： G11C7/02 , G11C11/4074 , G11C11/4097 , G11C11/4094 , G11C7/12
CPC分类号： G11C11/4097 , G11C7/12 , G11C11/4074 , G11C11/4094
摘要： A semiconductor device includes a global bit line and a local bit line, and a switch coupled therebetween. Upon performing a precharge operation, a precharge voltage is supplied to the global bit line with turning the switch ON, so that the local bit line receives the precharge voltage through the global bit line and the switch, and after a lapse of a predetermined time, a precharge voltage is further supplied to the local bit line without an intervention of the global bit line and the switch.
摘要翻译：半导体器件包括全局位线和局部位线，以及耦合在其间的开关。在执行预充电操作时，通过使开关接通来向全局位线提供预充电电压，使得局部位线通过全局位线和开关接收预充电电压，并且在经过预定时间之后，在本地位线进一步提供预充电电压，而不需要全局位线和开关的干预。

18. 发明申请

US20120147686A1 SEMICONDUCTOR DEVICE HAVING HIERARCHICAL BIT LINE STRUCTURE AND CONTROL METHOD THEREOF 有权
标题翻译：具有分层线结构的半导体器件及其控制方法
公开(公告)号：US20120147686A1
公开(公告)日：2012-06-14
申请号：US13313731
申请日：2011-12-07
申请人： Shinichi TAKAYAMA , Kazuhiko Kajigaya
发明人： Shinichi TAKAYAMA , Kazuhiko Kajigaya
IPC分类号： G11C7/12
CPC分类号： G11C11/4097 , G11C7/12 , G11C11/4074 , G11C11/4094
摘要： Disclosed herein is a semiconductor device comprising a global bit line and a local bit line, and a switch coupled therebetween. Upon performing a precharge operation, a precharge voltage is supplied to the global bit line with turning the switch ON, so that the local bit line receives the precharge voltage through the global bit line and the switch, and after a lapse of a predetermined time, a precharge voltage is further supplied to the local bit line without an intervention of the global bit line and the switch.
摘要翻译：这里公开了包括全局位线和局部位线的半导体器件，以及耦合在其间的开关。在执行预充电操作时，通过使开关接通来向全局位线提供预充电电压，使得局部位线通过全局位线和开关接收预充电电压，并且在经过预定时间之后，在本地位线进一步提供预充电电压，而不需要全局位线和开关的干预。

19. 发明授权

US08170362B2 Edge-enhancement device and edge-enhancement method 有权
标题翻译：边缘增强设备和边缘增强方法
公开(公告)号：US08170362B2
公开(公告)日：2012-05-01
申请号：US12170626
申请日：2008-07-10
申请人： Shinichi Takayama
发明人： Shinichi Takayama
IPC分类号： G06K9/40
CPC分类号： H04N9/646 , G06T5/004 , G06T2207/10016 , G06T2207/10068 , G06T2207/20192 , G06T2207/30004 , H04N5/208
摘要： An edge-enhancement device for subjecting input image data to edge enhancement so as to generate output image data has an edge-component generator, a weighting processor, and an addition processor. The input image data is obtained from a frame image having a plurality of pixels, and the input image data contains luminance data. The edge-component generator generates an edge component of the input image data. The weighting processor applies a weight according to the value of the luminance data of each pixel to a calculated edge component of each pixel so as to generate a weighted edge component for each pixel. The addition processor adds the weighted edge component of each pixel to the input image data of the pixel so as to generate the output image data.
摘要翻译：用于对输入图像数据进行边缘增强以产生输出图像数据的边缘增强装置具有边缘分量生成器，加权处理器和加法处理器。从具有多个像素的帧图像获得输入图像数据，并且输入图像数据包含亮度数据。边缘分量生成器生成输入图像数据的边缘分量。加权处理器根据每个像素的亮度数据的值对每个像素的计算的边缘分量应用权重，以便为每个像素产生加权的边缘分量。加法处理器将每个像素的加权边缘分量与像素的输入图像数据相加，以产生输出图像数据。

20. 发明授权

US07982023B2 Bag proteins and nucleic acid molecules encoding them 失效
标题翻译：袋蛋白和编码它们的核酸分子
公开(公告)号：US07982023B2
公开(公告)日：2011-07-19
申请号：US12764058
申请日：2010-04-20
申请人： John C. Reed , Shinichi Takayama
发明人： John C. Reed , Shinichi Takayama
IPC分类号： C07H21/04
CPC分类号： C07K14/47 , A61K38/00 , A61K48/00
摘要： The present invention provides a family of BAG-1 related proteins from humans (BAG-1L, BAG-1, BAG-2, BAG-3, BAG-4 and BAG-5), the invertebrate C. elegans (BAG-1, BAG-2) and the fission yeast S. pombe (BAG-1A, BAG-1B) and the nucleic acid molecules that encode them.
摘要翻译：本发明提供了来自人的BAG-1相关蛋白家族（BAG-1L，BAG-1，BAG-2，BAG-3，BAG-4和BAG-5），无脊椎动物线虫（BAG-1， BAG-2）和裂殖酵母S.pombe（BAG-1A，BAG-1B）和编码它们的核酸分子。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式