会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 16. 发明申请
    • Non-Volatile Memory Device And Read Method Thereof
    • 非易失性存储器件及其读取方法
    • US20120137067A1
    • 2012-05-31
    • US13094192
    • 2011-04-26
    • Ji-Sang LeeKihwan Choi
    • Ji-Sang LeeKihwan Choi
    • G06F12/00G11C16/26
    • G11C16/26G11C11/5642G11C16/0483G11C16/3418
    • In one embodiment, the method includes receiving a request to read data stored in a first memory cell associated with a first word line, and performing a first read operation on at least one memory cell associated with a second word line in response to the request. The second word line follows the first word line in a word line programming order, and the first read operation is performed over a first time period. The method further includes performing a second read operation on the first memory cell based on output from the first read operation. The second read operation is performed for a second time period, and the first time period is shorter than the second time period if output from performing the first read operation indicates the first memory cell is not coupled.
    • 在一个实施例中,该方法包括接收读取存储在与第一字线相关联的第一存储器单元中的数据的请求,以及响应于该请求对与第二字线相关联的至少一个存储器单元执行第一读取操作。 第二字线在字线编程顺序中跟随第一字线,并且在第一时间段执行第一读取操作。 该方法还包括基于来自第一读取操作的输出对第一存储器单元执行第二读取操作。 如果从执行第一读取操作的输出指示第一存储器单元没有耦合,则第二次读取操作执行第二时间段,并且第一时间段比第二时间段短。
    • 17. 发明授权
    • Nonvolatile memory device and related method of programming
    • 非易失存储器件及相关的编程方法
    • US08164952B2
    • 2012-04-24
    • US12719184
    • 2010-03-08
    • Sung-Won YunKihwan Choi
    • Sung-Won YunKihwan Choi
    • G11C16/04
    • G11C11/5621G11C16/3436
    • A nonvolatile memory device comprises a memory cell array comprising a plurality of memory cells, a voltage generator configured to generate voltages to program the plurality of memory cells, and a control logic component configured to control the voltage generator to provide a plurality of program voltages to selected memory cells during successive iterations of a program loop. Wherein where memory cells corresponding to one logic state are judged to be program passed during a current iteration of the program loop, the control logic component controls the voltage generator such that a program voltage corresponding to the one logic state is skipped during subsequent iterations of the program loop.
    • 非易失性存储器件包括存储单元阵列,该存储单元阵列包括多个存储器单元,被配置为产生用于编程多个存储器单元的电压的电压发生器,以及控制逻辑元件,被配置为控制电压发生器以提供多个编程电压 在程序循环的连续迭代期间选择存储单元。 其中对应于一个逻辑状态的存储器单元在程序循环的当前迭代期间被判断为程序传递,控制逻辑部件控制电压发生器,使得在随后的迭代期间跳过对应于一个逻辑状态的编程电压 程序循环。