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11. 发明授权

US06192088B1 Carrier recovery system 失效
公开(公告)号：US06192088B1
公开(公告)日：2001-02-20
申请号：US09052455
申请日：1998-03-31
申请人： Ahmad K. Aman , Cecil William Farrow , Hong Jiang , Agesino Primatic, Jr. , Charles Albert Webb, III
发明人： Ahmad K. Aman , Cecil William Farrow , Hong Jiang , Agesino Primatic, Jr. , Charles Albert Webb, III
IPC分类号： H04L2714
CPC分类号： H04L27/066 , H04L2027/0053 , H04L2027/0081 , H04L2027/0087
摘要： A digital carrier recovery system includes at least two modes of operation, namely, an acquisition mode and a tracking mode. The bandwidth of the carrier recovery loop filter is different for the acquisition mode and the tracking mode. In the acquisition mode, the digital phase-locked loop seeks and locks to the long term frequency offset of the received carrier signal. In the tracking mode, the digital phase-locked loop tracks the instantaneous variations in the carrier phase. Switching between the acquisition mode and the tracking mode is realized digitally, and includes programmable hysteresis, resulting in optimal performance in the presence of signals having high levels of phase noise (jitter). More specifically, the carrier recovery loop filter “locks” to the pilot signal of an incoming signal, e.g., a vestigial side band (VSB) video signal, by employing a so-called digital vector tracking phase-locked loop that demodulates the VSB signal. The digital vector tracking phase-locked loop includes a complex filter, i.e., a so-called vector tracking filter, that very quickly locks to the pilot signal of the passband VSB signal and once locked to the pilot signal, switches to the tracking mode that provides significantly better tracking of phase noise. The demodulation is achieved by employing a complex multiplication of the incoming signal with a complex exponential sequence to obtain an in-phase (I-phase) component and a quadrature-phase (Q-phase) component. The complex exponential sequence is generated, in one embodiment, by employing a SIN/COS look up table that is driven by a phase difference signal generated by the digital vector tracking phase-locked loop. A residual direct current (dc) component in the I-phase component caused by the pilot signal is removed, resulting in a baseband I/Q signal. A technical advantage of this carrier recovery invention is that the bandwidth of the phase-locked loop filter can be different for the acquisition mode and the tracking mode. This allows for optimal performance in both the acquisition and tracking modes of operation.

12. 发明授权

US07940808B2 Communications system with symmetrical interfaces and associated methods 有权
标题翻译：具有对称接口和相关方法的通信系统
公开(公告)号：US07940808B2
公开(公告)日：2011-05-10
申请号：US12346296
申请日：2008-12-30
申请人： Michael S. Shaffer , Himanshu Mahendra Thaker , Charles Albert Webb, III , Lesley Jen-Yuan Wu
发明人： Michael S. Shaffer , Himanshu Mahendra Thaker , Charles Albert Webb, III , Lesley Jen-Yuan Wu
IPC分类号： H04J3/06
CPC分类号： H04Q11/0478 , H04L2012/5674
摘要： A communications system includes a physical layer device (PLD) and a logical link device (LLD), each having respective send and receive interfaces being substantially identical to define symmetrical interfaces for the system. Accordingly, design and manufacturing is simplified compared to conventional systems. In addition, advantages are also provided in terms of loopback capability and packaging options. The PLD comprises a PLD send interface including PLD parallel information outputs, and a PLD receive interface including PLD parallel information inputs. Similarly, the LLD comprises an LLD receive interface including LLD parallel information inputs, and an LLD send interface including LLD parallel information outputs. Parallel communications channels connect the PLD information outputs to respective LLD information inputs, and connect the LLD information outputs to respective PLD information inputs. The PLD send interface and the LLD send interface are substantially identical, and the PLD receive interface and the LLD receive interface are substantially identical to thereby define the symmetrical interfaces for the system. In view of the symmetrical interfaces, the PLD and the LLD may operate in a push-push configuration. Deskewing features are also provided.
摘要翻译：通信系统包括物理层设备（PLD）和逻辑链路设备（LLD），每个物理层设备（LLD）各自具有相同的发送和接收接口，以定义用于系统的对称接口。因此，与常规系统相比，设计和制造被简化。此外，还提供了环回能力和封装选项方面的优势。 PLD包括包括PLD并行信息输出的PLD发送接口和包括PLD并行信息输入的PLD接收接口。类似地，LLD包括包括LLD并行信息输入的LLD接收接口和包括LLD并行信息输出的LLD发送接口。并行通信通道将PLD信息输出连接到相应的LLD信息输入，并将LLD信息输出连接到相应的PLD信息输入。 PLD发送接口和LLD发送接口基本相同，PLD接收接口和LLD接收接口基本相同，从而定义了系统的对称接口。鉴于对称接口，PLD和LLD可以以推 - 推配置运行。还提供脱色功能。

13. 发明授权

US06909727B1 Communications system and associated methods with out-of-band control 失效
标题翻译：通信系统及带外控制的相关方法
公开(公告)号：US06909727B1
公开(公告)日：2005-06-21
申请号：US09459831
申请日：1999-12-13
申请人： Michael S. Shaffer , Himanshu Mahendra Thaker , Charles Albert Webb, III , Lesley Jen-Yuan Wu
发明人： Michael S. Shaffer , Himanshu Mahendra Thaker , Charles Albert Webb, III , Lesley Jen-Yuan Wu
IPC分类号： H04L25/02 , H04L7/00 , H04L25/14 , H04Q11/04 , H04J3/00
CPC分类号： H04L25/14
摘要： A communications system comprises a physical layer device (PLD) including a PLD send interface which, in turn, includes PLD parallel information outputs and at least one PLD control output. The system also includes a logical link device (LLD) which comprises an LLD receive interface which, in turn, includes LLD parallel information inputs and at least one LLD control input. First parallel communications channels connect the PLD information outputs to respective LLD information inputs, and at least one second communications channel connects the at least one PLD control output to the at least one LLD control input so that control signals are sent from the PLD to the LLD out-of-band from information signals. Accordingly, control speed is enhanced, and information throughput efficiency is not compromised. The PLD may further include a PLD receive interface including PLD parallel information inputs and at least one PLD control input, and the LLD may further comprise an LLD send interface including LLD parallel information outputs and at least one LLD control output. In accordance with this aspect of the invention, the PLD and LLD are operable in a push-push configuration. Another advantageous feature of the invention is that the interfaces may be symmetric.
摘要翻译：通信系统包括物理层设备（PLD），其包括PLD发送接口，PLD发送接口又包括PLD并行信息输出和至少一个PLD控制输出。该系统还包括逻辑链路设备（LLD），其包括LLD接收接口，LLD接收接口又包括LLD并行信息输入和至少一个LLD控制输入。第一并行通信信道将PLD信息输出连接到相应的LLD信息输入，并且至少一个第二通信信道将至少一个PLD控制输出连接到至少一个LLD控制输入，使得控制信号从PLD发送到LLD 信息信号带外。因此，控制速度提高，信息吞吐效率不受影响。 PLD还可以包括包括PLD并行信息输入和至少一个PLD控制输入的PLD接收接口，并且LLD还可以包括包括LLD并行信息输出和至少一个LLD控制输出的LLD发送接口。根据本发明的该方面，PLD和LLD可在推 - 推配置中操作。本发明的另一有利特征是接口可以是对称的。

14. 发明授权

US06675327B1 Communications system including lower rate parallel electronics with skew compensation and associated methods 有权
标题翻译：通信系统包括具有偏斜补偿的低速并行电路和相关方法
公开(公告)号：US06675327B1
公开(公告)日：2004-01-06
申请号：US09460165
申请日：1999-12-13
申请人： Mohammad S. Mobin , Michael S. Shaffer , Himanshu Mahendra Thaker , Charles Albert Webb, III , Lesley Jen-Yuan Wu
发明人： Mohammad S. Mobin , Michael S. Shaffer , Himanshu Mahendra Thaker , Charles Albert Webb, III , Lesley Jen-Yuan Wu
IPC分类号： G11B500
CPC分类号： H04L1/0061 , H04J3/0626 , H04L25/4904
摘要： A communications system includes a first device comprising a plurality of electrical-to-transmission medium converters, and a second device comprising a plurality of transmission medium-to-electrical converters to be connected to respective ones of the electrical-to-transmission medium converters via at least one transmission medium and defining parallel communications channels between the first and second devices, and wherein deskewing is provided. More particularly, the first device may include a string-based framing coder for determining and appending a string-based framing code to each information symbol string of information symbol strings to be transmitted in parallel over respective parallel communications channels. Each string-based framing code is based upon at least some of the information symbols in the respective information symbol string. The second device preferably comprises a deskewer for aligning received information symbol strings based upon the string-based framing codes. The symbols may be binary bits, and the string-based codes may be CRC codes.
摘要翻译：通信系统包括包括多个电传输介质转换器的第一设备和包括多个传输介质到电转换器的第二设备，所述多个传输介质到电转换器经由至少一个传输介质并且在第一和第二设备之间定义并行通信信道，并且其中提供了去歪斜。更具体地，第一设备可以包括基于串的成帧编码器，用于确定并将基于字符串的成帧代码附加到要在各个并行通信信道上并行发送的信息符号串的每个信息符号串。每个基于字符串的成帧代码基于相应信息符号串中的至少一些信息符号。第二装置优选地包括用于基于基于字符串的成帧代码来对准所接收的信息符号串的偏台。符号可以是二进制位，并且基于字符串的代码可以是CRC码。

15. 发明授权

US5881056A Method and apparatus of a multi-code code division multiple access receiver having shared accumulator circuits 失效
标题翻译：具有共享累加器电路的多码分多址接收机的方法和装置
公开(公告)号：US5881056A
公开(公告)日：1999-03-09
申请号：US700257
申请日：1996-08-20
申请人： Howard C. Huang , Chih-Lin I , Andrzej Partyka , Stephan ten Brink , Charles Albert Webb, III
发明人： Howard C. Huang , Chih-Lin I , Andrzej Partyka , Stephan ten Brink , Charles Albert Webb, III
IPC分类号： H04B1/707 , H04B1/709 , H04B1/7115 , H04J11/00 , H04J13/00 , H04B7/216 , H04J13/04
CPC分类号： H04B1/709 , H04B1/707 , H04B1/7115 , H04J13/0077 , H04B2201/70714
摘要： A Multi-Code (MC) Code Division Multiple Access (CDMA) receiver receives N (where N>1) encoded signal channels over multiple air signal paths. The MC-CDMA receiver receives and demodulates the N encoded signal channels into N signal samples and includes a common circuit for time-sharing an accumulator, for accumulating the N signal samples, among a plurality of second correlators. Each of the plurality of second correlator means utilizes the time-shared accumulator to accumulate samples from each of the N signals which are then decoded into an associated one of the N signal channels.
摘要翻译：多码（MC）码分多址（CDMA）接收机通过多个空中信号路径接收N（其中N≥1）个编码信号信道。 MC-CDMA接收机将N个编码信号信道接收并解调为N个信号样本，并且包括用于在多个第二相关器之间累积N个信号采样的累加器的时分共享电路。多个第二相关器装置中的每一个利用时间共享累加器来累积来自N个信号中的每一个的样本，然后将其解码为N个信号信道中的一个相关联的信号。

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