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    • 127. 发明授权
    • Fuel chamber for automotive vehicle
    • 汽车燃油箱
    • US6058911A
    • 2000-05-09
    • US55266
    • 1998-04-06
    • Takashi HashimotoMasami HonmaToshihide Kimisawa
    • Takashi HashimotoMasami HonmaToshihide Kimisawa
    • B60K15/077F02M37/04
    • B60K15/077B60K2015/03105B60K2015/03111B60K2015/03236
    • A fuel chamber provided in a fuel tank for an automotive vehicle in order to effectively prevent a temperature of a fuel within a fuel tank from ascending not so as to generate a vapor due to a fuel returned to the fuel chamber end from an engine is mainly disclosed. In a typical fuel chamber, a fuel chamber main body, a jet nozzle member having a front end portion inserted into a hole portion communicating an inner portion with an outer portion of the fuel chamber main body, a cover body forming a pressure reduction chamber decompressed in response to that the jet nozzle member injects a return fuel to the fuel chamber main body through the hole portion, and a tubular circulating member circulating a fuel within the fuel chamber main body are provided. The fuel stored within the fuel tank is introduced into the fuel chamber main body and the fuel within the fuel chamber main body is circulated in response to that the jet nozzle member injects the return fuel into the fuel chamber main body.
    • 燃料室设置在用于机动车辆的燃料箱中,以便有效地防止燃料箱内的燃料的温度升高而不是由于从发动机返回到燃料室端的燃料产生蒸汽,主要是 披露 在典型的燃料室中,具有燃料室主体,喷射喷嘴构件,其具有插入到内部与燃料室主体的外部连通的孔部中的前端部,形成减压室的盖体, 响应于喷射喷嘴构件通过孔部将返回燃料喷射到燃料室主体,并且设置使燃料室主体内的燃料循环的管状循环构件。 存储在燃料箱内的燃料被引入燃料室主体中,并且燃料室主体内的燃料响应于喷射喷嘴构件将返回燃料喷射到燃料室主体而循环。
    • 129. 发明授权
    • Semiconductor integrated circuit device
    • 半导体集成电路器件
    • US5700705A
    • 1997-12-23
    • US470452
    • 1995-06-06
    • Satoshi MeguroKiyofumi UchiboriNorio SuzukiMakoto MotoyoshiAtsuyoshi KoikeToshiaki YamanakaYoshio SakaiToru KagaNaotaka HashimotoTakashi HashimotoShigeru HonjouOsamu Minato
    • Satoshi MeguroKiyofumi UchiboriNorio SuzukiMakoto MotoyoshiAtsuyoshi KoikeToshiaki YamanakaYoshio SakaiToru KagaNaotaka HashimotoTakashi HashimotoShigeru HonjouOsamu Minato
    • H01L21/8244H01L27/11
    • H01L27/1104H01L27/11H01L27/1108Y10S257/903Y10S257/904
    • The manufacture of a memory cell of the type employing a pair of cross-coupled CMOS inverters of a SRAM is disclosed in which the load MISFETs are stacked above the semiconductor substrate and over the drive MISFETs. The manufacture of each load MISFET consists of forming source, drain and channel regions within the same polycrystalline silicon film, and a gate electrode consisting of a different layer conductive film, such as a polycrystalline film, than that of the drive MISFETs. The manufacture of the memory cell having such a stacked arrangement, facilitates the patterning of the source (drain) region and gate electrode of each load MISFET thereof to have an overlapping relationship with each other so as to increase the effective capacitance associated with each of the memory cell storage nodes. The gate electrodes of both the drive and load MISFETs are formed of n-type or of n-type and p-type polycrystalline silicon films, respectively, and electrical connections are formed between the drain regions of the first and second p-channel load MISFETs with that of the drain regions of the first and second n-channel drive MISFETs through separate polycrystalline silicon films, respectively. Also, there are formed electrical connections between the polycrystalline silicon gate electrodes of the first and second load MISFETs with that of drain regions of the second and first drive MISFETs, through the poly-Si gate electrodes of the first and second drive MISFETs, in each memory cell of the SRAM, respectively, furthermore.
    • 公开了采用SRAM的一对交叉耦合CMOS反相器的类型的存储单元的制造,其中负载MISFET堆叠在半导体衬底上方和驱动MISFET上方。 每个负载MISFET的制造包括在同一多晶硅膜内形成源极,漏极和沟道区域,以及由不同层导电膜(例如多晶膜)组成的栅电极,而不是驱动MISFET。 具有这种堆叠布置的存储单元的制造有助于其每个负载MISFET的源极(漏极)区域和栅极电极的图案化,以使得彼此之间具有重叠关系,从而增加与每个负载MISFET相关联的有效电容 存储单元存储节点。 驱动和负载MISFET的栅电极分别由n型或n型和p型多晶硅膜形成,并且在第一和第二p沟道负载MISFET的漏极区之间形成电连接 与第一和第二n沟道驱动MISFET的漏极区分别通过分离的多晶硅膜。 此外,通过第一和第二驱动MISFET的多晶硅栅电极,在第一和第二负载MISFET的多晶硅栅电极与第二和第一驱动MISFET的漏极区域之间形成电连接 此外,SRAM的存储单元分别。