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    • 121. 发明申请
    • Inkjet recording apparatus
    • 喷墨记录装置
    • US20060209121A1
    • 2006-09-21
    • US11370822
    • 2006-03-08
    • Takeshi Yamazaki
    • Takeshi Yamazaki
    • B41J2/165
    • B41J2/16508B41J2/16532
    • An inkjet recording apparatus, including: a printing head having a plurality of nozzle holes which emit ink; and a capping device to collect ink ejected from the nozzle hole by covering the nozzle hole of the printing head, wherein the capping device has an interconnected cell type porous elastic member to contact with the surface of nozzle member at a peripheral area of the nozzle hole, a recessed area not to block up the nozzle hole of the printing head, on a surface of porous elastic member which contacts with the surface of nozzle member, a base member to hose the porous elastic member, and a suction device communicated to the recessed area of the porous elastic member to suction ink form the nozzle hole of the printing head.
    • 一种喷墨记录装置,包括:具有多个排出墨水的喷嘴孔的打印头; 以及封盖装置,通过覆盖打印头的喷嘴孔来收集从喷嘴孔喷射的墨,其中封盖装置具有互连的电池型多孔弹性构件,以在喷嘴孔的周边区域与喷嘴构件的表面接触 在与喷嘴构件的表面接触的多孔弹性构件的表面上形成不堵塞打印头的喷嘴孔的凹陷区域,用于软管多孔弹性构件的基座构件和连通到凹部的抽吸装置 多孔弹性构件到吸墨的区域形成打印头的喷嘴孔。
    • 122. 发明授权
    • Method of resource arbitration
    • 资源仲裁方法
    • US07099975B2
    • 2006-08-29
    • US10730952
    • 2003-12-09
    • Jeffrey Douglas BrownScott Douglas ClarkCharles Ray JohnsTakeshi Yamazaki
    • Jeffrey Douglas BrownScott Douglas ClarkCharles Ray JohnsTakeshi Yamazaki
    • G06F12/00
    • G06F13/3625
    • An improved method and apparatus for resource arbitration. Four priority classes, managed high (MH), managed low (ML), opportunistic high (OH) and opportunistic low (OL), are defined. A priority class is assigned to each resource access request. An access request concentrator (ARC) is created for each resource, through which the resource is accessed. An access request is chosen at each ARC using the priority order MH, ML, OH, and OL, in decreasing order of priority. If OH priority class resource access requests are locked out, the priority order is temporarily changed to OH, OL, MH, and ML, in decreasing order of priority. If OL priority class resource access requests are locked out, the priority order is temporarily changed to MH, OL, OH, and ML, in decreasing order of priority.
    • 一种改进的资源仲裁方法和装置。 定义了四个优先级,管理高(MH),管理低(ML),机会高(OH)和机会主义低(OL)。 优先级分配给每个资源访问请求。 为每个资源创建访问请求集中器(ARC),通过该资源访问资源。 在优先级顺序为MH,ML,OH和OL的每个ARC中选择访问请求。 如果OH优先级资源访问请求被锁定,优先级顺序将按照优先级的降序暂时更改为OH,OL,MH和ML。 如果OL优先级资源访问请求被锁定,优先级顺序将按照优先级的降序临时更改为MH,OL,OH和ML。
    • 123. 发明申请
    • Methods and apparatus for address translation from an external device to a memory of a processor
    • 用于从外部设备到处理器的存储器的地址转换的方法和设备
    • US20060129786A1
    • 2006-06-15
    • US11011784
    • 2004-12-14
    • Takeshi Yamazaki
    • Takeshi Yamazaki
    • G06F12/10
    • G06F12/1036G06F12/10G06F12/1081G06F12/109G06F2212/651G06F2212/652
    • Methods and apparatus provide for using a first portion of an external address as a pointer to select one of a plurality of entries in a segment table, each entry of the segment table representing a different segment of a memory; using at least a portion of the selected entry of the segment table as a reference to one or more of a plurality of entries in a page table, each entry in the page table including at least a portion of a physical address in the memory and belonging to a group of entries representing a page in the selected segment of the memory; and using a second portion of the external address as a pointer to one of the entries in the page table to obtain an at least partially translated physical address into the memory for the external address.
    • 方法和装置提供使用外部地址的第一部分作为指针来选择段表中的多个条目中的一个,段表的每个条目表示存储器的不同段; 使用片段表的所选条目的至少一部分作为对页表中的多个条目中的一个或多个的引用,页表中的每个条目包括存储器中的物理地址的至少一部分并且属于 到表示存储器的所选段中的页面的一组条目; 以及使用外部地址的第二部分作为指向页表中的一个条目的指针,以获得用于外部地址的存储器中的至少部分转换的物理地址。
    • 126. 发明申请
    • Multi-scalar extension for SIMD instruction set processors
    • SIMD指令集处理器的多标量扩展
    • US20050251655A1
    • 2005-11-10
    • US11110307
    • 2005-04-20
    • Takeshi Yamazaki
    • Takeshi Yamazaki
    • G06F9/38G06F9/30G06F15/00G06F15/80
    • G06F9/30101G06F9/3851G06F9/3867G06F9/3885G06F9/3887
    • A method is provided for executing a plurality of parallel executable sequences of instructions on a processor having a plurality of execution units operated by a single instruction unit. The method includes a) detecting a plurality of sequences of instructions adapted for parallel execution from instructions being provided to the processor, wherein each sequence is adapted for execution by a subset of the plurality of execution units and b) storing information representing a stall status of the execution units. Then, a step c) is performed, wherein, for each unexecuted sequence of the plurality of sequences: i) all of the plurality of execution units other than the subset which corresponds to the unexecuted sequence are stalled, and ii) the sequence of instructions is executed by the corresponding subset. Thereafter, it is determined in a step d) whether a current stall status of the plurality of execution units matches the stall status represented by the stored information. When there is no match, the steps b) through d) are repeated until there is a match in which the current stall status represented by the stored information matches the stored information.
    • 提供了一种用于在具有由单个指令单元操作的多个执行单元的处理器上执行多个并行可执行指令序列的方法。 该方法包括:a)从提供给处理器的指令中检测适于并行执行的多个指令序列,其中每个序列适于由多个执行单元的子集执行,以及b)存储表示 执行单位。 然后,执行步骤c),其中对于多个序列中的每个未执行的序列:i)除了对应于未执行的序列的子集之外的所有多个执行单元都被停止,以及ii)指令序列 由相应的子集执行。 此后,在步骤d)中确定多个执行单元的当前失速状态是否与由所存储的信息表示的停顿状态相匹配。 当不匹配时,重复步骤b)至d),直到存在由所存储的信息表示的当前停顿状态与存储的信息匹配的匹配。
    • 128. 发明申请
    • System and method for data synchronization for a computer architecture for broadband networks
    • 宽带网络计算机架构的数据同步系统和方法
    • US20050078117A1
    • 2005-04-14
    • US10967363
    • 2004-10-18
    • Masakazu SuzuokiTakeshi Yamazaki
    • Masakazu SuzuokiTakeshi Yamazaki
    • G06F12/14G06F15/16G06F15/80G06F21/24H04L29/06
    • G06F12/1466H04L69/12
    • A computer architecture and programming model for high speed processing over broadband networks are provided. The architecture employs a consistent modular structure, a common computing module and uniform software cells. The common computing module includes a control processor, a plurality of processing units, a plurality of local memories from which the processing units process programs, a direct memory access controller and a shared main memory. A processing system for performing graphics processing is also provided. A first processor is of a first processor type and a number of second processors are of a second processor type. One of the second processors can perform graphics processing on a first set of graphics data to generate a second set of graphics data, and another of the second processors can perform graphics processing on the second set to generate a third set of graphics data.
    • 提供了一种用于宽带网络高速处理的计算机体系结构和编程模型。 该架构采用一致的模块化结构,通用的计算模块和统一的软件单元。 公共计算模块包括控制处理器,多个处理单元,处理单元处理程序的多个本地存储器,直接存储器存取控制器和共享主存储器。 还提供了一种用于执行图形处理的处理系统。 第一处理器是第一处理器类型,并且多个第二处理器是第二处理器类型。 第二处理器中的一个可以对第一组图形数据执行图形处理,以产生第二组图形数据,另一个第二处理器可以在第二组上执行图形处理,以生成第三组图形数据。
    • 130. 发明授权
    • Encoding apparatus and method
    • 编码装置及方法
    • US06567562B1
    • 2003-05-20
    • US09411839
    • 1999-10-04
    • Tadayoshi NakayamaTakeshi Yamazaki
    • Tadayoshi NakayamaTakeshi Yamazaki
    • G06K936
    • G06T9/005
    • Disclosed is an arrangement for easily and quickly performing variable length coding for a multi-valued image, while estimating coding efficiency. To achieve the above objective, an encoding apparatus, which encodes a plurality of sets of multi-valued image data to produce code having variable lengths based on the multi-valued image data and a parameter k, comprises a bit shift unit for performing bit shifts for each of the multi-valued image data sets a different number of times in accordance with the parameter k and for outputting P sets of data, P accumulation adders for accumulating the P sets of data in correlation with the parameter k, for each of the multi-valued data sets, and comparators for comparing the results obtained by the accumulation adders to determine an optimal parameter k for each of the multi-valued image data sets.
    • 公开了一种用于在估计编码效率的同时对多值图像进行容易且快速地执行可变长度编码的装置。 为了实现上述目的,编码装置,其编码多组多值图像数据以产生基于多值图像数据和参数k的具有可变长度的代码,包括用于执行位移的位移单元 对于每个多值图像数据集,根据参数k进行不同次数的输出,并且用于输出P组数据,用于累积与参数k相关的P组数据的P累积加法器 多值数据集和比较器,用于比较由累积加法器获得的结果,以确定每个多值图像数据集的最佳参数k。