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111. 发明授权

US08674726B2 Multi-level chip input circuit 有权
标题翻译：多级芯片输入电路
公开(公告)号：US08674726B2
公开(公告)日：2014-03-18
申请号：US13469704
申请日：2012-05-11
申请人： Sharad Murari
发明人： Sharad Murari
IPC分类号： H03K5/153
CPC分类号： H03L5/00 , H03K19/017509 , H03M1/0845 , H03M1/365
摘要： Aspects of the instant disclosure are directed toward apparatuses that generate a power-related adjustment signal in response to the power signal. Digital-input-signal pads are included to communicate digital signals with a circuit external to the apparatus. Further, digital-input processing circuitry receives the digital signals from the digital-input-signal pad, and processes the received digital signals. Additionally, configuration circuitry applies the power-related adjustment signal to signals received at the digital-input-signal pad and, in response, detects the digital signals received.
摘要翻译：本公开的方面涉及响应于功率信号产生与功率有关的调整信号的装置。包括数字输入信号焊盘以将数字信号与设备外部的电路进行通信。此外，数字输入处理电路从数字输入信号焊盘接收数字信号，并处理所接收的数字信号。此外，配置电路将功率相关调整信号应用于在数字输入信号焊盘处接收到的信号，并且作为响应，检测接收到的数字信号。

112. 发明申请

US20130154866A1 Method and System for Monitoring for Variation of Converter Voltage Reference 有权
标题翻译：变频器参考电压变化监测方法与系统
公开(公告)号：US20130154866A1
公开(公告)日：2013-06-20
申请号：US13679370
申请日：2012-11-16
申请人： Lear Corporation
发明人： Antoni Ferre Fabregas , David Gamez Alari
IPC分类号： H03M1/12
CPC分类号： H03M1/0845 , H03M1/0604 , H03M1/089 , H03M1/1019 , H03M1/12
摘要： A method and system include a converter such as an analog-to-digital converter (“ADC”) and a controller. The converter is configured to receive a sensor signal, indicative of a physical measured quantity, and generate an output signal based on the sensor signal and the voltage reference. The converter is further configured to alternately receive a calibration voltage in lieu of the sensor signal and generate the output signal based on the calibration voltage and the voltage reference. The controller is configured to compare the output signal based on the calibration voltage and the voltage reference with an expected value of the output signal based on the calibration voltage and an assumed value of the voltage reference to detect variation of the voltage reference, and to compensate the output signal based on the sensor signal and the voltage reference as a function of the detected variation of the voltage reference.
摘要翻译：一种方法和系统包括诸如模数转换器（“ADC”）和控制器的转换器。转换器被配置为接收表示物理测量量的传感器信号，并且基于传感器信号和电压基准产生输出信号。转换器进一步配置为交替地接收代替传感器信号的校准电压，并且基于校准电压和电压基准产生输出信号。所述控制器被配置为基于所述校准电压和所述参考电压将所述输出信号与所述输出信号的期望值基于所述校准电压和所述参考电压的假定值进行比较，以检测所述参考电压的变化，并且对所述输出信号进行补偿所述输出信号基于所述传感器信号和所述参考电压作为所述检测到的所述参考电压变化的函数。

113. 发明授权

US08274416B2 DA converter, solid-state imaging device, and camera system 有权
标题翻译： DA转换器，固态成像装置和相机系统
公开(公告)号：US08274416B2
公开(公告)日：2012-09-25
申请号：US12762040
申请日：2010-04-16
申请人： Takashi Kawaguchi , Ryugi Yoshimura
发明人： Takashi Kawaguchi , Ryugi Yoshimura
IPC分类号： H03M1/66
CPC分类号： H04N5/37455 , H03M1/0607 , H03M1/0845 , H03M1/1215 , H03M1/123 , H03M1/56 , H03M1/742 , H04N5/3577
摘要： A digital-to-analog (DA) converter includes: an analog output section that generates an output current corresponding to a value of a digital signal in response to a bias voltage and outputs an analog signal which is obtained from the output current by current-to-voltage conversion; a current source; a current control section that converts a current from the current source to a voltage signal and outputs the voltage signal as the bias voltage; and a sample and hold circuit section that samples and holds the bias voltage from the current control section and supplies the held bias voltage to the analog output section.
摘要翻译：数模（DA）转换器包括：模拟输出部分，其响应于偏置电压产生与数字信号的值相对应的输出电流，并且输出通过电流检测器从输出电流获得的模拟信号，电压转换; 当前来源; 电流控制部分，其将来自电流源的电流转换为电压信号，并将该电压信号作为偏置电压输出; 以及采样和保持电路部分，其从电流控制部分采样并保持偏置电压，并将保持的偏置电压提供给模拟输出部分。

114. 发明申请

US20120050084A1 DIGITAL TO ANALOG CONVERTERS HAVING CIRCUIT ARCHITECTURES TO OVERCOME SWITCH LOSSES 审中-公开
标题翻译：具有电路结构的模拟转换器的数字转换器可能会导致开关损耗
公开(公告)号：US20120050084A1
公开(公告)日：2012-03-01
申请号：US13005274
申请日：2011-01-12
申请人： Roderick McLachlan
发明人： Roderick McLachlan
IPC分类号： H03M1/78
CPC分类号： H03M1/0845 , H03M1/76 , H03M1/785 , H03M1/808
摘要： A digital to analog converter (DAC) includes a pair of operational amplifiers each having a first input coupled to a reference voltage. The DAC includes a plurality of switch-controlled cells, each of which includes a resistor and two force/sense switch pairs. A first force switch may be coupled to an output of a first operational amplifier and an associated sense switch may be coupled to an inverting input of the first operational amplifier. A second force switch may be coupled to an output of a second operational amplifier and an associated sense switch may be coupled to an inverting input of the second operational amplifier. The force switches may provide selectively conductive paths to permit either operational amplifier to drive a given cell.
摘要翻译：数模转换器（DAC）包括一对运算放大器，每个运算放大器具有耦合到参考电压的第一输入。 DAC包括多个开关控制单元，每个单元包括电阻器和两个力/感测开关对。第一力开关可以耦合到第一运算放大器的输出，并且相关联的感测开关可以耦合到第一运算放大器的反相输入。第二力开关可以耦合到第二运算放大器的输出，并且相关联的感测开关可以耦合到第二运算放大器的反相输入。力开关可以提供选择性的导电路径，以允许运算放大器驱动给定的单元。

115. 发明授权

US08068044B2 Correction circuit for D/A converter 有权
标题翻译： D / A转换器校正电路
公开(公告)号：US08068044B2
公开(公告)日：2011-11-29
申请号：US12660605
申请日：2010-03-02
申请人： Shoji Yasui
发明人： Shoji Yasui
IPC分类号： H03M1/06
CPC分类号： H03M1/0845 , H03M1/808
摘要： There is provided a correction circuit for a D/A converter, comprising: a constant current source to be connected between high- and low-potential power source lines for supplying a power source voltage to the D/A converter; and a current controller which is adapted to control a current flowing to the constant current source in accordance with an input digital signal to the D/A converter, so as to reduce a variation of a sum of currents which, when the input digital signal to the D/A converter is changed, flows to the low-potential power source line from the high-potential power source line through the D/A converter and the constant current source, respectively.
摘要翻译：提供了一种用于D / A转换器的校正电路，包括：恒流源，连接在用于向D / A转换器提供电源电压的高电位和低电位电源线之间; 以及电流控制器，其适于根据到D / A转换器的输入数字信号来控制流向恒流源的电流，以便减少电流之和的变化，当输入数字信号到 D / A转换器被改变，分别通过D / A转换器和恒流源从高电位电源线流向低电位电源线。

116. 发明授权

US07884747B2 Digital to analog converters having circuit architectures to overcome switch losses 有权
标题翻译：具有电路架构以克服开关损耗的数模转换器
公开(公告)号：US07884747B2
公开(公告)日：2011-02-08
申请号：US12483295
申请日：2009-06-12
申请人： Roderick McLachlan
发明人： Roderick McLachlan
IPC分类号： H03M1/78
CPC分类号： H03M1/0845 , H03M1/76 , H03M1/785 , H03M1/808
摘要： A digital to analog converter (DAC) includes a pair of operational amplifiers each having a first input coupled to a respective high or low reference voltage. The DAC includes a plurality of switch-controlled cells, each of which includes a resistor and two force/sense switch pairs. Within each cell, all four switches are coupled to the resistor. A first force switch is coupled to an output of a first op amp and an associated sense switch is coupled to an inverting input of the first op amp. A second force switch is coupled to an output of a second op amp and an associated sense switch is coupled to an inverting input of the second op amp. Thus, the force switches provide selectively conductive paths to permit either op amp to drive a given cell. When an op amp drives particular cells, sense switches generate multiple a feedback paths to the driving op amp, which permits the op amp to drive the selected cell resistors at voltages that overcomes any voltage losses induces by associated force switches, and cancels the effect of any variation in the voltage losses induced by different force switches. The switch-controlled cells find application in a variety of DAC architectures, including binary weighted R2R architectures, equally-weighted segmented architectures or hybrid architectures that blend principles of R2R and segmented architectures.
摘要翻译：数模转换器（DAC）包括一对运算放大器，每个运算放大器具有耦合到相应的高或低参考电压的第一输入。 DAC包括多个开关控制单元，每个单元包括电阻器和两个力/感测开关对。在每个单元内，所有四个开关都耦合到电阻器。第一力开关耦合到第一运算放大器的输出，相关联的感测开关耦合到第一运算放大器的反相输入端。第二力开关耦合到第二运算放大器的输出，相关联的感测开关耦合到第二运算放大器的反相输入端。因此，力开关提供选择性的导电路径以允许运算放大器驱动给定的电池。当运算放大器驱动特定单元时，感测开关产生到驱动运算放大器的多个反馈路径，这允许运算放大器以克服由相关力开关引起的任何电压损耗的电压驱动所选择的单元电阻，并且消除任何由不同的力开关引起的电压损耗的变化。交换机控制的小区在各种DAC体系结构中找到应用，包括二进制加权的R2R架构，同等加权的分段架构或混合R2R和分段架构的混合体系结构。

117. 发明申请

US20100225510A1 Correction circuit for D/A converter 有权
标题翻译： D / A转换器校正电路
公开(公告)号：US20100225510A1
公开(公告)日：2010-09-09
申请号：US12660605
申请日：2010-03-02
申请人： Shoji Yasui
发明人： Shoji Yasui
IPC分类号： H03M1/06
CPC分类号： H03M1/0845 , H03M1/808
摘要： There is provided a correction circuit for a D/A converter, comprising: a constant current source to be connected between high- and low-potential power source lines for supplying a power source voltage to the D/A converter; and a current controller which is adapted to control a current flowing to the constant current source in accordance with an input digital signal to the D/A converter, so as to reduce a variation of a sum of currents which, when the input digital signal to the D/A converter is changed, flows to the low-potential power source line from the high-potential power source line through the D/A converter and the constant current source, respectively.
摘要翻译：提供了一种用于D / A转换器的校正电路，包括：恒流源，连接在用于向D / A转换器提供电源电压的高电位和低电位电源线之间; 以及电流控制器，其适于根据到D / A转换器的输入数字信号来控制流向恒流源的电流，以便减少电流之和的变化，当输入数字信号到 D / A转换器被改变，分别通过D / A转换器和恒流源从高电位电源线流向低电位电源线。

118. 发明申请

US20100149016A1 Pulse delay circuit and A/D converter including same 有权
标题翻译：脉冲延迟电路和包含相同的A / D转换器
公开(公告)号：US20100149016A1
公开(公告)日：2010-06-17
申请号：US12653186
申请日：2009-12-09
申请人： Takamoto Watanabe
发明人： Takamoto Watanabe
IPC分类号： H03M1/12 , H03K3/00
CPC分类号： H03M1/0845 , H03M1/145 , H03M1/502 , H03M1/60
摘要： The pulse delay circuit includes a plurality of delay units connected in series or in a ring, each of the delay units being constituted of at least one inverter gate circuit grounded to a ground line, and configured to delay a pulse signal passing therethrough by a delay time thereof depending on an input signal applied thereto, and a capacitor connected between a signal line through which the voltage signal is applied to each of the delay units and the ground line. The capacitor serves as a current source to supply a current which each of the delay units consumes to invert a state thereof.
摘要翻译：脉冲延迟电路包括串联或环形连接的多个延迟单元，每个延迟单元由至少一个接地到地线的反相器门电路构成，并且被配置为延迟通过其中的脉冲信号延迟取决于施加到其上的输入信号的时间，以及连接在电压信号被施加到每个延迟单元和接地线的信号线之间的电容器。电容器用作电流源，以提供每个延迟单元消耗的电流来反转其状态。

119. 发明授权

US07408138B2 Analog-to-digital converter with noise compensation in CMOS image sensor 失效
标题翻译：具有CMOS图像传感器噪声补偿的模数转换器
公开(公告)号：US07408138B2
公开(公告)日：2008-08-05
申请号：US11488516
申请日：2006-07-18
申请人： Myoung-Su Lee
发明人： Myoung-Su Lee
IPC分类号： H01L27/00 , H01J40/14
CPC分类号： H03M1/0845 , H03M1/56 , H04N5/3575 , H04N5/378
摘要： An analog-to-digital converter includes an amplifying unit and a noise compensation unit. The amplifying unit amplifies a difference between a trip point voltage and a modified signal voltage. The trip point voltage has a first power noise component, and the noise compensation unit incorporates a second power noise component into an original signal voltage to generate the modified signal voltage. Thus, the power noise components are cancelled in the difference.
摘要翻译：模数转换器包括放大单元和噪声补偿单元。放大单元放大跳变点电压和修正的信号电压之间的差。跳闸点电压具有第一功率噪声分量，并且噪声补偿单元将第二功率噪声分量并入原始信号电压以产生修改的信号电压。因此，功率噪声分量在差异中被消除。

120. 发明申请

US20060181259A1 Current driver 有权
标题翻译：当前驱动
公开(公告)号：US20060181259A1
公开(公告)日：2006-08-17
申请号：US11353332
申请日：2006-02-14
申请人： Atsushi Sudoh , Yoshinori Okada , Seiji Murakami , Atsuhiro Miwata
发明人： Atsushi Sudoh , Yoshinori Okada , Seiji Murakami , Atsuhiro Miwata
IPC分类号： G05F3/16 , G05F3/20
CPC分类号： H03M1/0845 , G09G3/2092 , G09G3/3283 , H03M1/745
摘要： A current driver that can control variation in the consumed current in conjunction with variation in the setting value of the driving current. The mirror current of transistors Q2-0 to Q2-7 at each of output circuits 10-1 to 10-160 keeps flowing through output terminal To1 or node N8 irrespective of the setting value of the pixel data. Also, the mirror current of transistor Q4D keeps flowing in the series circuit of transistors Q4D and Q5D irrespective of the setting value of the pixel data. Consequently, even when the setting value of the driving current varies in various ways, the current consumed in each output circuit can still be kept constant. As a result, it is possible to prevent variation in the voltage of the power supply line in conjunction with variation of the consumed current, and it is possible to reduce fluctuation in the driving current between output channels.
摘要翻译：可以控制消耗电流的变化与驱动电流的设定值的变化一起的电流驱动器。输出电路10-1至10-160中的每一个晶体管Q 2 - 0至Q 2 - 7的镜像电流都保持流过输出端子1或节点N 8，而与像素数据的设置值无关。此外，与像素数据的设定值无关，晶体管Q4D的反射镜电流保持流入晶体管Q 4 D和Q 5 D的串联电路。因此，即使当驱动电流的设定值以各种方式变化时，每个输出电路中消耗的电流仍然可以保持恒定。结果，可以防止电源线的电压随消耗电流的变化而发生变化，并且可以减小输出通道之间的驱动电流的波动。

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