基本信息:
- 专利标题： Pulse delay circuit and A/D converter including same
- 专利标题（中）：脉冲延迟电路和包含相同的A / D转换器
- 申请号：US12653186 申请日：2009-12-09
- 公开(公告)号：US20100149016A1 公开(公告)日：2010-06-17
- 发明人： Takamoto Watanabe
- 申请人： Takamoto Watanabe
- 申请人地址： JP Kariya-city
- 专利权人： DENSO CORPORATION
- 当前专利权人： DENSO CORPORATION
- 当前专利权人地址： JP Kariya-city
- 优先权： JP2008-316969 20081212
- 主分类号： H03M1/12
- IPC分类号： H03M1/12 ; H03K3/00
摘要：
The pulse delay circuit includes a plurality of delay units connected in series or in a ring, each of the delay units being constituted of at least one inverter gate circuit grounded to a ground line, and configured to delay a pulse signal passing therethrough by a delay time thereof depending on an input signal applied thereto, and a capacitor connected between a signal line through which the voltage signal is applied to each of the delay units and the ground line. The capacitor serves as a current source to supply a current which each of the delay units consumes to invert a state thereof.
摘要（中）：
脉冲延迟电路包括串联或环形连接的多个延迟单元，每个延迟单元由至少一个接地到地线的反相器门电路构成，并且被配置为延迟通过其中的脉冲信号延迟 取决于施加到其上的输入信号的时间，以及连接在电压信号被施加到每个延迟单元和接地线的信号线之间的电容器。 电容器用作电流源，以提供每个延迟单元消耗的电流来反转其状态。
公开/授权文献:
- US07932848B2 Pulse delay circuit and A/D converter including same 公开/授权日：2011-04-26
IPC结构图谱:
| H | 电学 |
| --H03 | 基本电子电路 |
| ----H03M | 一般编码、译码或代码转换 |
| ------H03M1/00 | 模/数转换；数/模转换 |
| --------H03M1/12 | .模/数转换器 |