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    • 112. 发明申请
    • FORMING AN ELECTROWETTING MODULE HAVING A HYDROPHILIC GRID
    • 形成具有水泥网的电镀模块
    • US20090191334A1
    • 2009-07-30
    • US12021404
    • 2008-01-29
    • Steve DaiHao Li
    • Steve DaiHao Li
    • B05D5/06
    • G02B26/005G09G3/3433
    • A method of forming a matrix of electrowetting pixels includes forming a patterned layer of electrodes (512) on a substrate (510) and forming a patterned insulating layer (514) on the electrodes (512) and the substrate (510) to define a plurality of wells (516), each of the wells (516) aligned over one of the electrodes (512). A hydrophobic material (518) is formed on the bottom surfaces of the wells (516) and a hydrophilic material (526) is formed on sidewalls (519) of the wells (516), for example by one of selective reaction, selective deposition and selective etching, by the application of a beam (524) at an angle to impact the sidewalls (519) while substantially avoiding impacting the bottom surface (515). First and second liquids (532, 534) are disposed within the wells (516), the first liquid being not soluble in the second liquid.
    • 形成电润湿像素矩阵的方法包括在衬底(510)上形成图案化的电极层(512),并在电极(512)和衬底(510)上形成图案化的绝缘层(514),以限定多个 的井(516)中,每个井(516)在一个电极(512)上排列。 疏水材料(518)形成在孔(516)的底表面上,并且例如通过选择性反应,选择性沉积之一和孔(516)的侧壁(519)上形成亲水材料(526) 通过以一定角度施加梁(524)以冲击侧壁(519),同时基本上避免撞击底表面(515)来选择性蚀刻。 第一和第二液体(532,534)设置在孔(516)内,第一液体不溶于第二液体。
    • 115. 发明授权
    • Semiconductor structures and methods for fabricating semiconductor structures comprising high dielectric constant stacked structures
    • 用于制造包括高介电常数堆叠结构的半导体结构的半导体结构和方法
    • US07217643B2
    • 2007-05-15
    • US11066887
    • 2005-02-24
    • Yong LiangHao Li
    • Yong LiangHao Li
    • H01L21/3205
    • H01L29/513H01L21/28185H01L21/28194H01L29/517H01L29/78
    • Semiconductor structures, and methods for fabricating semiconductor structures, comprising high dielectric constant stacked structures are provided. A stacked dielectric structure (16) in accordance with one exemplary embodiment of the present invention has a first amorphous dielectric layer (18) comprising HfXZr1-XO2, where 0≦X≦1. An amorphous interlayer (20) overlies the first amorphous dielectric layer. The interlayer has a net dielectric constant that is approximately no less than the dielectric constant of HfZrO4. A second amorphous dielectric layer (22) overlies the interlayer. The second amorphous dielectric layer comprises HfYZr1-YO2, where 0≦Y≦1. The stacked dielectric structure (16) has a net dielectric constant that is approximately no less than the dielectric constant of HfZrO4.
    • 提供了包括高介电常数堆叠结构的半导体结构和用于制造半导体结构的方法。 根据本发明的一个示例性实施例的叠层电介质结构(16)具有第一非晶介质层(18),其包括Hf x N 1-X O O > 2 ,其中0 <= X <= 1。 无定形中间层(20)覆盖在第一非晶介电层上。 中间层的净介电常数近似不小于HfZrO 4的介电常数。 第二非晶介质层(22)覆盖在中间层上。 第二非晶介质层包括Hf Y 1 Y Y 2 O 2,其中0 <= Y <= 1。 叠层电介质结构(16)具有大致不小于HfZrO 4介电常数的净介电常数。