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    • 101. 发明申请
    • Self-aligned split-gate nonvolatile memory structure and a method of making the same
    • 自对准分离门非易失性存储器结构及其制造方法
    • US20050167729A1
    • 2005-08-04
    • US10834082
    • 2004-04-29
    • Hee JeonSeung YoonYong Kim
    • Hee JeonSeung YoonYong Kim
    • H01L21/8247H01L21/336H01L21/8234H01L21/8239H01L27/10H01L27/115H01L29/423H01L29/788H01L29/792H01L21/338
    • H01L27/11521H01L27/115H01L29/42324H01L29/7885
    • Provided are non-volatile split-gate memory cells having self-aligned floating gate and the control gate structures and exemplary processes for manufacturing such memory cells that provide improved dimensional control over the relative lengths and separation of the split-gate elements. Each control gate includes a projecting portion that extends over at least a portion of the associated floating gate with the size of the projecting portion being determined by a first sacrificial polysilicon spacer that, when removed, produces a concave region in an intermediate insulating structure. The control gate is then formed as a polysilicon spacer adjacent the intermediate insulating structure, the portion of the spacer extending into the concave region determining the dimension and spacing of the projecting portion and the thickness of the interpoly oxide (IPO) separating the upper portions of the split-gate electrodes thereby providing improved performance and manufacturability.
    • 提供了具有自对准浮动栅极的非易失性分裂栅极存储器单元以及用于制造这样的存储单元的控制栅极结构和示例性工艺,其提供了分离栅极元件的相对长度和间隔的改进的尺寸控制。 每个控制门包括突出部分,该突出部分在相关联的浮动栅极的至少一部分上延伸,突出部分的尺寸由第一牺牲多晶硅间隔物确定,当被去除时,其在中间绝缘结构中产生凹入区域。 然后,控制栅极形成为与中间绝缘结构相邻的多晶硅间隔物,间隔物的延伸到凹区中的部分确定突出部分的尺寸和间距以及分离上部的多晶硅氧化物(IPO)的厚度 因此分裂栅电极提供了改进的性能和可制造性。
    • 103. 发明申请
    • Flip chip type nitride semiconductor light emitting device and manufacturing method thereof
    • 倒装芯片型氮化物半导体发光器件及其制造方法
    • US20050145875A1
    • 2005-07-07
    • US10861511
    • 2004-06-07
    • Hyun KimYong KimHyoun Shin
    • Hyun KimYong KimHyoun Shin
    • H01L21/28H01L33/10H01L33/32H01L33/38H01L33/40H01L33/62H01L33/00
    • H01L33/405H01L33/32
    • Disclosed herein are a flip chip type nitride semiconductor light emitting device, which comprises a substrate for growing a nitride semiconductor material, an n-type nitride semiconductor layer formed on the substrate, an active layer formed on at least a part of the n-type nitride semiconductor layer, a p-type nitride semiconductor layer formed on the active layer, a bonding force providing layer formed on the p-type nitride semiconductor layer and adapted to provide a bonding force relative to the p-type nitride semiconductor layer, a reflective electrode layer formed on the bonding force providing layer, and adapted to reflect light produced in the active layer toward the substrate and to diffuse electric current, and a cap layer formed on the reflective electrode layer, and adapted to provide a bonding force between the reflective electrode layer and a bonding metal and to reduce contact resistance.
    • 本文公开了一种倒装芯片型氮化物半导体发光器件,其包括用于生长氮化物半导体材料的衬底,形成在衬底上的n型氮化物半导体层,形成在n型氮化物半导体的至少一部分上的有源层 氮化物半导体层,形成在有源层上的p型氮化物半导体层,形成在p型氮化物半导体层上并适于提供相对于p型氮化物半导体层的结合力的接合力提供层,反射 电极层,形成在所述接合力提供层上,并且适于将在所述有源层中产生的光朝向所述衬底反射并扩散电流;以及覆盖层,形成在所述反射电极层上,并且适于在所述反射层之间提供接合力 电极层和接合金属,并降低接触电阻。
    • 105. 发明申请
    • Array panel for liquid crystal display device and method of manufacturing the same
    • 液晶显示装置用阵列面板及其制造方法
    • US20050134757A1
    • 2005-06-23
    • US11050792
    • 2005-02-07
    • Yong KimDong-Jin Park
    • Yong KimDong-Jin Park
    • G02F1/1335G02F1/1333G02F1/1362G02F1/1368G02F1/136
    • G02F1/1368G02F2001/136218G02F2001/136236G02F2001/136263
    • An array panel for a liquid crystal display device includes a substrate, a gate line and a gate electrode on the substrate, wherein the gate line is connected to the gate electrode, a gate insulating layer on the gate line and the gate electrode, an active layer on the gate insulating layer, an ohmic contact layer on the active layer, a data line, a source electrode, and a drain electrode on the ohmic contact layer, wherein the data line, the source electrode, and the drain electrode are formed of molybdenum, a passivation layer on the data line, the source and drain electrodes, and a pixel electrode on the passivation layer, wherein the ohmic contact layer has the same shape as the data line, the source, and drain electrodes, and the active layer has the same shape as the data line, and the source electrode, and the drain electrode except for a channel area between the source electrode and the drain electrode, and the channel area has a “U” shape.
    • 用于液晶显示装置的阵列面板包括在基板上的基板,栅极线和栅电极,其中栅极线连接到栅电极,栅极线上的栅极绝缘层和栅电极, 栅极绝缘层上的层,有源层上的欧姆接触层,欧姆接触层上的数据线,源电极和漏电极,其中数据线,源电极和漏电极由 钼,数据线上的钝化层,源极和漏极以及钝化层上的像素电极,其中欧姆接触层具有与数据线,源极和漏极以及有源层相同的形状 具有与数据线相同的形状,源电极和漏电极除了源电极和漏电极之间的沟道区域之外,沟道区域具有“U”形状。
    • 106. 发明申请
    • Negative word line driver
    • 负字线驱动
    • US20050128858A1
    • 2005-06-16
    • US10881056
    • 2004-06-30
    • Kang LeeYong Kim
    • Kang LeeYong Kim
    • G11C8/00G11C8/08
    • G11C8/08
    • Provided is directed to a negative word line driver, including: a block select address generation unit for generating first and second block select addresses having a block information according to an active signal; a row decoder controller for generating a control signal to disable a word line; a main word line driver for accessing a main word line by being driven in response to a signal coding the first block select address and the control signal; and a phi X driver for accessing a sub word line by being driven in response to a signal coding the second block select address and the control signal wloff.
    • 提供一种负字线驱动器,包括:块选择地址生成单元,用于根据有效信号产生具有块信息的第一和第二块选择地址; 行解码器控制器,用于产生禁止字线的控制信号; 主字线驱动器,用于响应于对第一块选择地址和控制信号进行编码的信号被驱动来访问主字线; 以及用于通过响应于编码第二块选择地址和控制信号wloff的信号来驱动来访问子字线的phi X驱动器。