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    • 93. 发明申请
    • Current sense components failure detection in a multi-phase power system
    • 多相电力系统中的电流感测元件故障检测
    • US20040189315A1
    • 2004-09-30
    • US10403311
    • 2003-03-31
    • Vladimir Alexader MuratovStefan Wlodzimierz Wiktor
    • G01R031/00
    • G01R19/0092G01R19/1659H02M3/1584H02M2001/0009
    • An evaluator (210) having an input (207) for receiving a signal indicative of a channel current sensed via a sensor in a mutlichannel current sharing system, and circuitry (313, 319) coupled to the input (207) and responsive to the signal for indicating an unreliable sensing for the sensor when a low current condition occurs for a time period exceeding the switching time period of the channel current. Further, the apparatus can include an additional input (207) and circuitry (313, 319) for evaluating an additional sensor sensing an additional channel current. The low current condition is characterized by thresholds corresponding to the peak level and a valley level of the channel current over a switching time period.
    • 具有用于接收表示在多路通道电流共享系统中经由传感器感测到的通道电流的信号的输入(207)的评估器(210),以及耦合到所述输入端(207)并响应于所述信号的电路(313,319) 用于在低电流条件发生超过通道电流的切换时间段的时间段时指示传感器的不可靠感测。 此外,该装置可以包括附加输入(207)和电路(313,319),用于评估感测附加通道电流的附加传感器。 低电流条件的特征在于对应于峰值电平的阈值和沟道电流在开关时间段内的谷值电平。
    • 95. 发明申请
    • High speed signal window detection
    • 高速信号窗口检测
    • US20020070767A1
    • 2002-06-13
    • US09734795
    • 2000-12-11
    • Stefano G. Therisod
    • H03K005/153H03K005/22
    • H03K5/088G01R19/1659
    • A window detector circuit for high frequency applications includes a differential amplifier that has two inputs which receive a differential voltage signal. A bias network, having a balancing node, connected between the two inputs. An output transistor, electrically biased by the balancing node, connected between power and ground. In operation, when the differential voltage signal is below a voltage threshold, the differential amplifier is turned off and current flows through the output transistor. When the differential voltage signal is at or exceed the voltage threshold, the differential amplifier turns on.
    • 用于高频应用的窗口检测器电路包括具有接收差分电压信号的两个输入的差分放大器。 具有平衡节点的偏置网络,连接在两个输入端之间。 由平衡节点电偏置的输出晶体管,连接在电源和地之间。 在操作中,当差分电压信号低于电压阈值时,差分放大器截止,电流流过输出晶体管。 当差分电压信号处于或超过电压阈值时,差分放大器导通。
    • 96. 发明授权
    • Method and system for analyzing and displaying waveform data
    • 用于分析和显示波形数据的方法和系统
    • US5877620A
    • 1999-03-02
    • US896148
    • 1997-07-17
    • Takahisa Tomi
    • Takahisa Tomi
    • G01R13/20G01R13/30G01R19/165G01R23/16
    • G01R19/1659G01R13/30
    • In a waveform analyzer directed toward enabling recognition at a glance whether displayed waveform data are within a desired range; waveform data converter 50 inputs waveform data stored in a waveform data memory 10 and the result of comparison of the waveform data stored in waveform data memory 10 with a judgment standard stored in limit line memory 20 at comparison operator 30; and based on the inputted comparison result, waveform data converter 50 converts to a predetermined format only that portion of the waveform data stored in waveform data memory 10 that is judged to be outside the desired range based on the judgment standard; following which waveform display device 40 displays the converted waveform data.
    • 在波导分析仪中,一目了然地启用识别显示的波形数据是否在期望的范围内; 波形数据转换器50将存储在波形数据存储器10中的波形数据和存储在波形数据存储器10中的波形数据的比较结果与在比较运算器30中存储在限制线存储器20中的判定标准进行输入; 并且基于所输入的比较结果,波形数据转换器50仅将基于判断标准判断为在期望范围之外的波形数据存储器10中存储的波形数据的部分转换为预定格式; 随后哪个波形显示装置40显示转换的波形数据。
    • 98. 发明授权
    • Comparator with extended common-mode input voltage range
    • 具有扩展共模输入电压范围的比较器
    • US4907121A
    • 1990-03-06
    • US184055
    • 1988-04-20
    • Petr Hrassky
    • Petr Hrassky
    • H03K5/08G01R19/00G01R19/165
    • G01R19/1659G01R19/0038
    • A comparator comprising two differential input stages (Q1 to Q4 and Q5 to Q8) which are connected in parallel and fed by a common constant circuit source (Q.sub.B) whose current is passed either to both or only to the one or only to the other differential input stage, depending on whether the common-mode input voltage of the comparator is within, above or below a voltage range that is between the voltage values of the two poles (VC, VE) of a supply voltage source (B) of the comparator, and comprising a common current mirror circuit (Q9, Q10) which is associated with the outputs of both differential input stages and from which the comparator output signal is derived. At least one (Q1 to Q4) of the two differential input stages operates in common-base connection, with this differential input stage (Q1 and Q4) receiving its supply current from the common-mode input voltage source.
    • 一个比较器,包括并联连接并由公共恒定电流源(QB)馈送的两个差分输入级(Q1至Q4和Q5至Q8),其电流被传递到两个或仅通过一个或仅与另一个差分 输入级,取决于比较器的共模输入电压是否在比较器的电源电压(B)的两极(VC,VE)的电压值之间的电压范围之上或之下, ,并且包括与两个差分输入级的输出相关联的公共电流镜像电路(Q9,Q10),并从其中导出比较器输出信号。 两个差分输入级中的至少一个(Q1至Q4)在共模连接中工作,该差分输入级(Q1和Q4)从共模输入电压源接收其电源电流。
    • 99. 发明授权
    • Multiple input window detector
    • 多输入窗口检测器
    • US4300063A
    • 1981-11-10
    • US97351
    • 1979-11-26
    • Daniel L. S. DunphyMark B. Kearney
    • Daniel L. S. DunphyMark B. Kearney
    • G01R19/00G01R19/165H03K5/24
    • G01R19/1659G01R19/0038
    • A multiple input window detector is disclosed which includes a balance pair of common base PNP transistors having multiple emitters connected to respective inputs for comparing either input to an upper threshold level established by a voltage divider. A pair of common emitter PNP transistors compare the inputs to a lower threshold level. The two outputs of each comparator are interconnected and the combined currents control an output stage which is driven to one state when both inputs are within the window established by the divider and is driven in the other state if either input is outside the window.
    • 公开了一种多输入窗口检测器,其包括具有连接到相应输入的多个发射器的公共基极PNP晶体管的平衡对,用于将输入与由分压器建立的上限阈值进行比较。 一对公共发射极PNP晶体管将输入与较低的阈值电平进行比较。 每个比较器的两个输出互连,并且组合的电流控制输出级,当两个输入都在由分频器建立的窗口内时,该输出级被驱动到一个状态,并且如果任一输入都在窗口之外,则其被驱动到另一状态。