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91. 发明授权

US08289065B2 Inductive load power switching circuits 有权
标题翻译：感性负载功率开关电路
公开(公告)号：US08289065B2
公开(公告)日：2012-10-16
申请号：US12556438
申请日：2009-09-09
申请人： James Honea , Yifeng Wu
发明人： James Honea , Yifeng Wu
IPC分类号： H03K17/56
CPC分类号： G05F1/70 , H03K17/08142 , Y10T29/41 , Y10T29/49117
摘要： Power switching circuits including an inductive load and a switching device are described. The switches devices can be either low-side or high-side switches. Some of the switches are transistors that are able to block voltages or prevent substantial current from flowing through the transistor when voltage is applied across the transistor.
摘要翻译：描述了包括电感负载和开关装置的功率开关电路。开关器件可以是低端或高端开关。一些开关是当晶体管上施加电压时能够阻挡电压或防止大量电流流过晶体管的晶体管。

92. 发明授权

US08138529B2 Package configurations for low EMI circuits 有权
标题翻译：低EMI电路的封装配置
公开(公告)号：US08138529B2
公开(公告)日：2012-03-20
申请号：US12611018
申请日：2009-11-02
申请人： Yifeng Wu
发明人： Yifeng Wu
IPC分类号： H01L29/66
CPC分类号： H01L21/4803 , H01L21/4814 , H01L21/4871 , H01L21/77 , H01L23/057 , H01L23/36 , H01L25/072 , H01L25/115 , H01L27/0248 , H01L2224/48091 , H01L2924/13055 , H01L2924/13091 , H01L2924/30107 , H01L2924/00014 , H01L2924/00
摘要： An electronic component includes a high voltage switching transistor encased in a package. The high voltage switching transistor comprises a source electrode, a gate electrode, and a drain electrode all on a first side of the high voltage switching transistor. The source electrode is electrically connected to a conducting structural portion of the package. Assemblies using the abovementioned transistor with another transistor can be formed, where the source of one transistor can be electrically connected to a conducting structural portion of a package containing the transistor and a drain of the second transistor is electrically connected to the second conductive structural portion of a package that houses the second transistor. Alternatively, the source of the second transistor is electrically isolated from its conductive structural portion, and the drain of the second transistor is electrically isolated from its conductive structural portion.
摘要翻译：电子部件包括封装在封装中的高压开关晶体管。高电压开关晶体管包括全部在高压开关晶体管的第一侧上的源电极，栅电极和漏电极。源电极电连接到封装的导电结构部分。可以形成使用上述晶体管与另一晶体管的组件，其中一个晶体管的源极可以电连接到包含晶体管的封装的导电结构部分，并且第二晶体管的漏极电连接到第二导体结构部分的第二导电结构部分一个容纳第二个晶体管的封装。或者，第二晶体管的源极与其导电结构部分电隔离，并且第二晶体管的漏极与其导电结构部分电隔离。

93. 发明申请

US20110193619A1 SEMICONDUCTOR ELECTRONIC COMPONENTS AND CIRCUITS 有权
标题翻译：半导体电子元件和电路
公开(公告)号：US20110193619A1
公开(公告)日：2011-08-11
申请号：US12701458
申请日：2010-02-05
申请人： Primit Parikh , James Honea , Carl C. Blake, JR. , Robert Coffie , Yifeng Wu , Umesh Mishra
发明人： Primit Parikh , James Honea , Carl C. Blake, JR. , Robert Coffie , Yifeng Wu , Umesh Mishra
IPC分类号： H03K3/01 , H01L27/06
CPC分类号： H01L27/0883 , H01L21/8258 , H01L23/49562 , H01L23/49575 , H01L23/642 , H01L23/647 , H01L25/165 , H01L25/18 , H01L27/0605 , H01L2224/48137 , H01L2224/48195 , H01L2224/48247 , H01L2224/48257 , H01L2924/1305 , H01L2924/13055 , H01L2924/13062 , H01L2924/13091 , H01L2924/30107 , H03K17/567 , H01L2924/00
摘要： An electronic component includes a high-voltage depletion-mode transistor and a low-voltage enhancement-mode transistor both encased in a single package. A source electrode of the high-voltage depletion-mode transistor is electrically connected to a drain electrode of the low-voltage enhancement-mode transistor, a drain electrode of the high-voltage depletion-mode transistor is electrically connected to a drain lead of the single package, a gate electrode of the low-voltage enhancement-mode transistor is electrically connected to a gate lead of the single package, a gate electrode of the high-voltage depletion-mode transistor is electrically connected to an additional lead of the single package, and a source electrode of the low-voltage enhancement-mode transistor is electrically connected to a conductive structural portion of the single package.
摘要翻译：电子部件包括高压耗尽型晶体管和低压增强型晶体管，两者都封装在单个封装中。高电压耗尽型晶体管的源电极电连接到低电压增强型晶体管的漏电极，高电压耗尽型晶体管的漏极电连接到漏极引线单个封装，低电压增强型晶体管的栅电极电连接到单个封装的栅极引线，高电压耗尽型晶体管的栅极电连接到单个封装的附加引线并且低电压增强型晶体管的源电极电连接到单个封装的导电结构部分。

94. 发明授权

US07965126B2 Bridge circuits and their components 有权
标题翻译：桥接电路及其组件
公开(公告)号：US07965126B2
公开(公告)日：2011-06-21
申请号：US12368200
申请日：2009-02-09
申请人： James Honea , Yifeng Wu
发明人： James Honea , Yifeng Wu
IPC分类号： H03K17/56
CPC分类号： H03K17/08142 , H03K17/162 , H03K17/223 , H03K17/567 , H03K17/6871
摘要： A half bridge is described with at least one transistor having a channel that is capable in a first mode of operation of blocking a substantial voltage in at least one direction, in a second mode of operation of conducting substantial current in one direction through the channel and in a third mode of operation of conducting substantial current in an opposite direction through the channel. The half bridge can have two circuits with such a transistor.
摘要翻译：描述半桥，其中至少一个晶体管具有通道，该通道能够处于在至少一个方向上阻挡实质电压的第一操作模式，在通过通道沿一个方向传导大量电流的第二操作模式中，以及在通过通道在相反方向上传导大量电流的第三操作模式中。半桥可以有两个具有这种晶体管的电路。

95. 发明申请

US20110127541A1 SEMICONDUCTOR HETEROSTRUCTURE DIODES 有权
标题翻译：半导体结构二极管
公开(公告)号：US20110127541A1
公开(公告)日：2011-06-02
申请号：US13008874
申请日：2011-01-18
申请人： Yifeng Wu , Umesh Mishra , Primit Parikh , Rongming Chu , Ilan Ben-Yaacov , Likun Shen
发明人： Yifeng Wu , Umesh Mishra , Primit Parikh , Rongming Chu , Ilan Ben-Yaacov , Likun Shen
IPC分类号： H01L29/02
CPC分类号： H01L29/0615 , H01L27/0629 , H01L29/2003 , H01L29/205 , H01L29/4236 , H01L29/778 , H01L29/7786 , H01L29/7787 , H01L29/872
摘要： Planar Schottky diodes for which the semiconductor material includes a heterojunction which induces a 2DEG in at least one of the semiconductor layers. A metal anode contact is on top of the upper semiconductor layer and forms a Schottky contact with that layer. A metal cathode contact is connected to the 2DEG, forming an ohmic contact with the layer containing the 2DEG.
摘要翻译：平面肖特基二极管，其半导体材料包括在至少一个半导体层中诱导2DEG的异质结。金属阳极触点位于上半导体层的顶部，与该层形成肖特基接触。金属阴极接触件连接到2DEG，与包含2DEG的层形成欧姆接触。

96. 发明授权

US07884394B2 III-nitride devices and circuits 有权
标题翻译： III族氮化物器件和电路
公开(公告)号：US07884394B2
公开(公告)日：2011-02-08
申请号：US12368248
申请日：2009-02-09
申请人： Yifeng Wu , Rongming Chu
发明人： Yifeng Wu , Rongming Chu
IPC分类号： H01L29/66
CPC分类号： H01L29/7786 , H01L23/492 , H01L24/48 , H01L24/49 , H01L25/072 , H01L25/18 , H01L29/2003 , H01L29/402 , H01L2224/291 , H01L2224/2919 , H01L2224/48137 , H01L2224/48257 , H01L2224/49111 , H01L2224/4917 , H01L2224/49175 , H01L2224/73265 , H01L2924/00014 , H01L2924/01068 , H01L2924/01079 , H01L2924/12036 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/19107 , H01L2224/48247 , H01L2924/0665 , H01L2924/014 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A III-nitride based high electron mobility transistor is described that has a gate-connected grounded field plate. The gate-connected grounded field plate device can minimize the Miller capacitance effect. The transistor can be formed as a high voltage depletion mode transistor and can be used in combination with a low voltage enhancement-mode transistor to form an assembly that operates as a single high voltage enhancement mode transistor.
摘要翻译：描述了具有栅极连接的接地场板的基于III族氮化物的高电子迁移率晶体管。栅极连接的接地场板器件可以最小化米勒电容效应。晶体管可以形成为高电压耗尽型晶体管，并且可以与低电压增强型晶体管组合使用以形成作为单个高电压增强型晶体管工作的组件。

97. 发明申请

US20100140660A1 Semiconductor Heterostructure Diodes 有权
标题翻译：半导体异质结二极管
公开(公告)号：US20100140660A1
公开(公告)日：2010-06-10
申请号：US12332284
申请日：2008-12-10
申请人： Yifeng Wu , Umesh Mishra , Primit Parikh , Rongming Chu , Ilan Ben-Yaacov , Likun Shen
发明人： Yifeng Wu , Umesh Mishra , Primit Parikh , Rongming Chu , Ilan Ben-Yaacov , Likun Shen
IPC分类号： H01L29/872
CPC分类号： H01L29/0615 , H01L27/0629 , H01L29/2003 , H01L29/205 , H01L29/4236 , H01L29/778 , H01L29/7786 , H01L29/7787 , H01L29/872
摘要： Planar Schottky diodes for which the semiconductor material includes a heterojunction which induces a 2DEG in at least one of the semiconductor layers. A metal anode contact is on top of the upper semiconductor layer and forms a Schottky contact with that layer. A metal cathode contact is connected to the 2DEG, forming an ohmic contact with the layer containing the 2DEG.
摘要翻译：平面肖特基二极管，其半导体材料包括在至少一个半导体层中诱导2DEG的异质结。金属阳极触点位于上半导体层的顶部，与该层形成肖特基接触。金属阴极接触件连接到2DEG，与包含2DEG的层形成欧姆接触。

98. 发明申请

US20090236635A1 WIDE BANDGAP HEMTS WITH SOURCE CONNECTED FIELD PLATES 有权
标题翻译：具有源连接的现场板的宽带带
公开(公告)号：US20090236635A1
公开(公告)日：2009-09-24
申请号：US12437505
申请日：2009-05-07
申请人： Yifeng Wu , Primit Parikh , Umesh Mishra , Marcia Moore
发明人： Yifeng Wu , Primit Parikh , Umesh Mishra , Marcia Moore
IPC分类号： H01L29/778 , H01L29/80
CPC分类号： H01L29/402 , H01L29/2003 , H01L29/41725 , H01L29/42316 , H01L29/7787
摘要： A HEMT comprising an active region comprising a plurality of active semiconductor layers formed on a substrate. Source electrode, drain electrode, and gate are formed in electrical contact with the active region. A spacer layer is formed on at least a portion of a surface of said active region and covering the gate. A field plate is formed on the spacer layer and electrically connected to the source electrode, wherein the field plate reduces the peak operating electric field in the HEMT.
摘要翻译：一种HEMT，其包括有源区，该有源区包括在基板上形成的多个有源半导体层。源电极，漏电极和栅极形成为与有源区电接触。间隔层形成在所述有源区域的表面的至少一部分上并覆盖栅极。在间隔层上形成场板，并与源电极电连接，其中场板减小HEMT中的峰值工作电场。

99. 发明申请

US20090201072A1 BRIDGE CIRCUITS AND THEIR COMPONENTS 有权
标题翻译：桥接电路及其组件
公开(公告)号：US20090201072A1
公开(公告)日：2009-08-13
申请号：US12368200
申请日：2009-02-09
申请人： James Honea , Yifeng Wu
发明人： James Honea , Yifeng Wu
IPC分类号： H03K17/56
CPC分类号： H03K17/08142 , H03K17/162 , H03K17/223 , H03K17/567 , H03K17/6871
摘要： A half bridge is described with at least one transistor having a channel that is capable in a first mode of operation of blocking a substantial voltage in at least one direction, in a second mode of operation of conducting substantial current in one direction through the channel and in a third mode of operation of conducting substantial current in an opposite direction through the channel. The half bridge can have two circuits with such a transistor.
摘要翻译：描述半桥，其中至少一个晶体管具有通道，该通道能够处于在至少一个方向上阻挡实质电压的第一操作模式，在通过通道沿一个方向传导大量电流的第二操作模式中，以及在通过通道在相反方向上传导大量电流的第三操作模式中。半桥可以有两个具有这种晶体管的电路。

100. 发明授权

US07550783B2 Wide bandgap HEMTs with source connected field plates 有权
标题翻译：宽带隙HEMT与源连接的现场板
公开(公告)号：US07550783B2
公开(公告)日：2009-06-23
申请号：US10958970
申请日：2004-10-04
申请人： Yifeng Wu , Primit Parikh , Umesh Mishra , Marcia Moore
发明人： Yifeng Wu , Primit Parikh , Umesh Mishra , Marcia Moore
IPC分类号： H01L29/778
CPC分类号： H01L29/402 , H01L29/2003 , H01L29/41725 , H01L29/42316 , H01L29/7787
摘要： A HEMT comprising a plurality of active semiconductor layers formed on a substrate. Source electrode, drain electrode, and gate are formed in electrical contact with the plurality of active layers. A spacer layer is formed on at least a portion of a surface of said plurality of active layers and covering the gate. A field plate is formed on the spacer layer and electrically connected to the source electrode, wherein the field plate reduces the peak operating electric field in the HEMT.
摘要翻译：一种HEMT，其包括在基板上形成的多个有源半导体层。源电极，漏电极和栅极形成为与多个有源层电接触。间隔层形成在所述多个有源层的表面的至少一部分上并覆盖栅极。在间隔层上形成场板，并与源电极电连接，其中场板减小HEMT中的峰值工作电场。

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