会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 93. 发明授权
    • Semiconductor memory device capable of repairing defective bits
    • 能够修复有缺陷的位的半导体存储器件
    • US5299160A
    • 1994-03-29
    • US45149
    • 1993-04-12
    • Shigeru Mori
    • Shigeru Mori
    • G11C11/401G11C29/00G11C29/04G11C29/42G11C13/00
    • G11C29/78
    • An input/output switching circuit is provided between I/O blocks and I/O pads. The input/output switching circuit includes fusable elements connected in series, and a switching elements for defining connection path of I/O blocks and I/O pads in response to a potential of each one end of the fusable elements. The switching element connects an I/O block to an I/O pad in a one-to-one correspondence when all the fusable elements are conductive. When one fusable element is disconnected, the switching element isolates a corresponding defective I/O block from an I/O pad, and switches the connection path of each I/O block towards the pad corresponding to the defective I/O block. In a semiconductor memory device having an error checking bit, the manufacturing yield of a semiconductor memory device can be improved by isolating a defective I/O block that cannot be repaired by a normal redundant circuit scheme, and operating the same as a semiconductor memory device without an error checking bit.
    • 在I / O块和I / O焊盘之间提供输入/输出切换电路。 输入/输出切换电路包括串联连接的可熔元件和用于响应于可熔元件的每一端的电位来定义I / O块和I / O焊盘的连接路径的开关元件。 当所有可熔元件都导通时,开关元件以一一对应的方式将I / O块连接到I / O焊盘。 当一个可熔断元件断开时,开关元件将相应的有缺陷的I / O块与I / O焊盘隔离,并将每个I / O块的连接路径切换到与故障I / O块对应的焊盘。 在具有错误检查位的半导体存储器件中,可以通过隔离通过常规冗余电路方案不能修复的缺陷I / O块并且将其作为半导体存储器件进行操作来提高半导体存储器件的制造成品率 没有错误检查位。
    • 99. 发明授权
    • Method and apparatus for constructing a suspension bridge tower
    • 悬索桥的构造方法及装置
    • US3950913A
    • 1976-04-20
    • US596108
    • 1975-07-16
    • Shigeru Mori
    • Shigeru Mori
    • E01D19/14E01D21/06E04H12/00E04D15/00B65G47/00
    • E01D19/14E01D21/06E04H12/00
    • Apparatus for constructing a block tower for a suspension bridge includes a working platform, means for raising and lowering the platform vertically along a pre-erected base of the tower, and a carriage movable horizontally on tracks on the working platform. The carriage moves between a block loading station lateral of the base and a block unloading station above the top of the tower base where the block is superimposed on other blocks of the pre-erected base. The carriage is specially designed to raise and lower the lower block and to disengage the same at the block unloading station for return to the block loading station. A method is also disclosed for constructing a tower of built-up blocks.
    • 用于构造用于悬索的块塔的装置包括工作平台,用于沿着塔的预竖直的基座垂直升高和降低平台的装置,以及可在工作平台上的轨道上水平移动的托架。 托架在基座的横向加载站和在塔架顶部之上的块卸载站之间移动,其中块被叠置在预先安装的基座的其他块上。 滑架专门设计用于升高和降低下部块,并在卸载站处将其卸下,以返回到装载站。 还公开了一种用于构建堆积块塔的方法。
    • 100. 发明授权
    • Top gate thin-film transistor, display device, and electronic apparatus
    • 顶栅薄膜晶体管,显示器件和电子设备
    • US08334553B2
    • 2012-12-18
    • US13026683
    • 2011-02-14
    • Shigeru MoriTakahiro KorenariHiroshi Tanabe
    • Shigeru MoriTakahiro KorenariHiroshi Tanabe
    • H01L31/062
    • H01L33/58H01L29/7833H01L29/78621H01L29/78633
    • A thin-film transistor manufactured on a transparent substrate has a structure of a top gate type crystalline silicon thin-film transistor in which a light blocking film, a base layer, a crystalline silicon film, a gate insulating film, and a gate electrode film arranged not to overlap at least a channel region are sequentially formed on the transparent substrate. The channel region has channel length L, LDD regions having LDD length d on both sides of the channel region, a source region, and a drain region are formed in the crystalline silicon film. The light blocking film is divided across the channel region. Interval x between the divided light blocking films is equal to or larger than channel length L and equal to or smaller than a sum of channel length L and a double of LDD length d (L+2d), allowing low the manufacturing cost and suppressed photo leak current.
    • 制造在透明基板上的薄膜晶体管具有顶栅型晶体硅薄膜晶体管的结构,其中遮光膜,基底层,晶体硅膜,栅极绝缘膜和栅极电极膜 排列成不重叠的至少一个沟道区域依次形成在透明基板上。 沟道区具有沟道长度L,在晶体硅膜中形成在沟道区两侧具有LDD长度d的LDD区,源区和漏区。 遮光膜在通道区域上分开。 分割的遮光膜之间的间隔x等于或大于沟道长度L,并且等于或小于沟道长度L的和和LDD长度d(L + 2d)的两倍,从而允许低的制造成本和抑制的照片 泄漏电流。