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91. 发明授权

US07165006B2 Scan chain disable function for power saving 失效
标题翻译：扫描链禁用功能进行省电
公开(公告)号：US07165006B2
公开(公告)日：2007-01-16
申请号：US10976259
申请日：2004-10-28
申请人： Sang Hoo Dhong , Joel Abraham Silberman , Osamu Takahashi , James Douglas Warnock , Dieter Wendel
发明人： Sang Hoo Dhong , Joel Abraham Silberman , Osamu Takahashi , James Douglas Warnock , Dieter Wendel
IPC分类号： G06F19/00
CPC分类号： G06F1/3203 , G06F1/325
摘要： An apparatus, a method and a computer program product are provided for conserving energy during functional mode of a processor by disabling the scan chain. By inserting logic gating into the scan chain it is possible to disable the scan chain during the processor's functional mode. During functional mode the scan out port of the latch bit in a scan chain toggles, which leads to unnecessary energy consumption. By gating scan control signals and the scan out port of a latch bit, the scan chain segment between latch bits can be disconnected. Therefore, the scan control signals can disable the scan chain during functional mode.
摘要翻译：提供了一种装置，方法和计算机程序产品，用于通过禁用扫描链来在处理器的功能模式期间节省能量。通过将逻辑门控插入到扫描链中，可以在处理器的功能模式期间禁用扫描链。在功能模式期间，扫描链中锁存位的扫描输出端口切换，这导致不必要的能量消耗。通过门控扫描控制信号和锁存位的扫描输出端口，可以断开锁存位之间的扫描链段。因此，扫描控制信号可以在功能模式下禁用扫描链。

92. 发明申请

US20060149930A1 Systems and methods for improving performance of a forwarding mechanism in a pipelined processor 审中-公开
标题翻译：用于提高流水线处理器中转发机制性能的系统和方法
公开(公告)号：US20060149930A1
公开(公告)日：2006-07-06
申请号：US11007066
申请日：2004-12-08
申请人： Hiroaki Murakami , Osamu Takahashi
发明人： Hiroaki Murakami , Osamu Takahashi
IPC分类号： G06F9/30
CPC分类号： G06F9/3826 , G06F9/3828 , G06F9/3832 , G06F9/3867
摘要： Systems and methods for forwarding instruction results from various pipeline stages to the initial stages of the pipelines, where the results can be used in the execution of subsequent instructions. In one embodiment, a forwarding mechanism is designed so that sets of one or more dynamic data selection circuits are placed in an alternating linear series with corresponding data registers. Each data register may be coupled to several dynamic data selection circuits, each of which corresponds to a different port or destination register. The dynamic data selection circuits coupled to a single data register are successively positioned in a direction that is perpendicular to the direction of the alternating linear array. Each dynamic data selection circuit may consist of a 2-input NOR gate coupled to drive a discharge transistor. The dynamic data selection circuits themselves may be aligned with the alternating series of latches and data selection circuits.
摘要翻译：将各种流水线阶段的指令结果转发到管道的初始阶段的系统和方法，其中结果可用于执行后续指令。在一个实施例中，转发机制被设计成使得一组或多个动态数据选择电路的集合被放置在与对应的数据寄存器的交替线性序列中。每个数据寄存器可以耦合到几个动态数据选择电路，每个动态数据选择电路对应于不同的端口或目的地寄存器。耦合到单个数据寄存器的动态数据选择电路被连续地定位在垂直于交替线性阵列的方向的方向上。每个动态数据选择电路可以由耦合以驱动放电晶体管的2输入或非门组成。动态数据选择电路本身可以与交替的锁存器和数据选择电路对齐。

93. 发明申请

US20050163519A1 Patch density measuring apparatus and image forming apparatus 有权
标题翻译：贴片密度测定装置及成像装置
公开(公告)号：US20050163519A1
公开(公告)日：2005-07-28
申请号：US11039828
申请日：2005-01-24
申请人： Osamu Takahashi
发明人： Osamu Takahashi
IPC分类号： G01N21/47 , G01J1/18 , G01N21/55 , G03G15/00 , G03G21/00
CPC分类号： G03G15/5058 , G03G15/5041 , G03G2215/0164
摘要： When a regular reflection light receiving unit is receiving a reflected light in a non-image area where the test patches are not formed, a clamp switch is closed. Then, a first reference voltage generated by a pull-up resistor and a zener diode is corresponded to an electric potential of a terminal of a capacitor on the side of an A/D converter. The capacitor is charged by the difference in electric potential between the first reference voltage and an output voltage from the regular reflection light receiving unit. Next, the clamp switch is opened. After the regular reflection light receiving unit receives the reflected light from an image area where the test patches are formed with this state of things, the output voltage from the regular reflection light receiving unit is changed. The difference in density between the image area and the non-image area can be quantified by the A/D converter.
摘要翻译：当正反射光接收单元在未形成测试片的非图像区域中接收到反射光时，闭合开关。然后，由上拉电阻和齐纳二极管产生的第一参考电压对应于A / D转换器一侧的电容器的端子的电位。电容器由第一参考电压和来自正反射光接收单元的输出电压之间的电位差来充电。接下来，夹紧开关打开。在正常反射光接收单元接收到来自具有这种状态的测试贴片的图像区域的反射光之后，来自正反射光接收单元的输出电压被改变。图像区域和非图像区域之间的密度差可以通过A / D转换器来量化。

94. 发明申请

US20050162186A1 Systems and methods for operating logic circuits 有权
标题翻译：用于操作逻辑电路的系统和方法
公开(公告)号：US20050162186A1
公开(公告)日：2005-07-28
申请号：US10764179
申请日：2004-01-23
申请人： Hiroaki Murakami , Osamu Takahashi , Jieming Qi
发明人： Hiroaki Murakami , Osamu Takahashi , Jieming Qi
IPC分类号： G05B19/05 , H03K19/00 , H03K19/173 , H03K19/20
CPC分类号： H03K19/1737 , H03K19/0016
摘要： Systems and methods for reducing the power consumption of some combinations of logic gates by reducing the number of unnecessary transitions that are made by logic gates that do not affect the output of the logic. In one embodiment, a modified exclusive-OR (XOR) gate is coupled to a modified multiplexer. The XOR gate has two inputs, Ain, and Bin, and an output, XORout, which is provided as an input to the multiplexer. Another input to the multiplexer is Cin. A select signal is input to the multiplexer to select either Cin or XORout to be provided at the output of the multiplexer. If XORout is selected, the XOR gate operates in a first mode in which it functions as a normal XOR gate. If Cin is selected, the XOR gate operates in a second mode in which the XOR gate uses less power than when the XOR gate operates normally.
摘要翻译：通过减少不影响逻辑输出的逻辑门进行的不必要的转换次数来减少逻辑门的某些组合的功耗的系统和方法。在一个实施例中，修改的异或（XOR）门耦合到修改的多路复用器。异或门具有两个输入：中的A _{和中的B _{，输出XOR _{输出，作为输入复用器。复用器的另一个输入是中的C _{。选择信号被输入到多路复用器以选择要在多路复用器的输出处提供的或XOR _{输出中的C _{。如果选择XOR ，则异或门以第一模式工作，其中它用作正常的异或门。如果选择了中的C ，则异或门以第二模式工作，其中XOR门比XOR门正常工作时使用的功率更小。}}}}}}

95. 发明申请

US20050105401A1 Time correction system, time correction instruction device, pointer type timepiece, and time correction method 失效
标题翻译：时间校正系统，时间校正指示装置，指针式时计和时间校正方法
公开(公告)号：US20050105401A1
公开(公告)日：2005-05-19
申请号：US10752089
申请日：2004-01-07
申请人： Hidehiro Akahane , Osamu Takahashi
发明人： Hidehiro Akahane , Osamu Takahashi
IPC分类号： G04G5/00 , G04R20/00 , G04C9/00
CPC分类号： G04R20/00 , G04R20/28 , G04R60/14
摘要： A time correction system has a timepiece with pointers for displaying the time, and a correction instruction device. The correction instruction device has a timing section for timing reference time data, a time input section for inputting pointed time data corresponding to the time indicated by the pointers, a comparison section for comparing the reference time data and the pointed time data, and a communication section for outputting a correction instruction signal based on the results of this comparison to the pointer type timepiece. The pointer type timepiece has an external signal detection circuit for receiving the correction instruction signal, a drive control section for controlling the driving of the pointers, and a time correction control circuit for matching the readings of the pointers with the reference time data based on the received correction instruction signal.
摘要翻译：时间校正系统具有用于显示时间的指针的钟表和校正指示装置。校正指示装置具有用于定时基准时间数据的定时部分，用于输入与指针所指示的时间相对应的指向时间数据的时间输入部分，用于比较参考时间数据和指示时间数据的比较部分，以及通信部分，用于基于与指针型时计的该比较的结果输出校正指令信号。指针式时计具有用于接收校正指示信号的外部信号检测电路，用于控制指针的驱动的驱动控制部，以及基于时钟校正控制电路，用于将指针的读数与基准时间数据进行匹配接收到校正指令信号。

96. 发明申请

US20050016645A1 Co-Ni-base alloy 审中-公开
标题翻译：钴镍基合金
公开(公告)号：US20050016645A1
公开(公告)日：2005-01-27
申请号：US10787731
申请日：2004-02-26
申请人： Osamu Takahashi , Ryou Sugawara , Akihiko Chiba
发明人： Osamu Takahashi , Ryou Sugawara , Akihiko Chiba
IPC分类号： F16F1/10 , C22C19/00 , C22C19/05 , C22C19/07 , C22C30/00 , C22F1/00 , C22F1/02 , C22F1/10
CPC分类号： C22C19/056 , C22C19/055 , C22C19/07
摘要： A Co—Ni-base alloy, being characterized in that a composition of the alloy comprises at least Co, Ni, Cr, Mo, W and Fe, and percentages by weight of the composition are from 25% to 45% of Co, from 25% to 40% of Ni, from 18% to 26% of Cr, from 3% to 11% of Mo, from 0.5% to 9% of W, wherein a sum of Mo and W is from 4% to 13% by weight, and from 1.1% to 5% of Fe.
摘要翻译：一种Co-Ni基合金，其特征在于，所述合金的组成至少包含Co，Ni，Cr，Mo，W和Fe，并且所述组合物的重量百分比为Co的25％至45％，来自 25％〜40％的Ni，18〜26％的Cr，3〜11％的Mo，0.5〜9％的W，其中Mo和W的总和为4〜13％重量，以及1.1％至5％的Fe。

97. 发明授权

US06804366B2 Speaker apparatus 有权
标题翻译：扬声器装置
公开(公告)号：US06804366B2
公开(公告)日：2004-10-12
申请号：US10002127
申请日：2001-12-05
申请人： Osamu Takahashi , Takeshi Kaiwa , Masanori Ito
发明人： Osamu Takahashi , Takeshi Kaiwa , Masanori Ito
IPC分类号： H04R2500
CPC分类号： H04R9/06 , H04R9/025
摘要： An external magnetic-type speaker apparatus includes a magnetic circuit that is provided with a yoke having a center pole, ring-shaped magnet and plate. The magnetic circuit and the edge of a vibrating plate are attached to a support frame. Ventilation holes are formed in the side surface of the support frame for allowing air inside the apparatus to escape.
摘要翻译：外部磁性扬声器装置包括具有中心极，环形磁体和板的磁轭的磁路。磁路和振动板的边缘连接到支撑框架上。通风孔形成在支撑框架的侧表面中，以允许装置内的空气逸出。

98. 发明授权

US06708267B1 System and method in a pipelined processor for generating a single cycle pipeline stall 失效
标题翻译：流水线处理器中的系统和方法，用于生成单循环流水线停顿
公开(公告)号：US06708267B1
公开(公告)日：2004-03-16
申请号：US09498088
申请日：2000-02-04
申请人： Brian King Flacks , Harm Peter Hofstee , Osamu Takahashi
发明人： Brian King Flacks , Harm Peter Hofstee , Osamu Takahashi
IPC分类号： G06F930
CPC分类号： G06F9/3861 , G06F9/3838 , G06F9/3842 , G06F9/3867
摘要： A pipelined processor and method are disclosed for speculatively determining dependencies. The processor processes a plurality of instructions in order. A speculative detection circuit which takes multiple clock cycles to operate determines whether a dependency exists. The speculative detection circuit inserts a single-cycle pipeline stall only in response to a determination that a speculative dependency exists.
摘要翻译：公开了流水线处理器和方法，用于推测确定依赖性。处理器按顺序处理多个指令。采用多个时钟周期进行操作的推测检测电路确定是否存在依赖关系。推测检测电路仅在响应于存在推测依赖性的确定时插入单周期流水线停顿。

99. 发明授权

US06587941B1 Processor with improved history file mechanism for restoring processor state after an exception 失效
标题翻译：具有改进的历史文件机制的处理器，用于在异常之后恢复处理器状态
公开(公告)号：US06587941B1
公开(公告)日：2003-07-01
申请号：US09498089
申请日：2000-02-04
申请人： Brian King Flacks , Harm Peter Hofstee , Osamu Takahashi
发明人： Brian King Flacks , Harm Peter Hofstee , Osamu Takahashi
IPC分类号： G06F930
CPC分类号： G06F9/3836 , G06F9/3828 , G06F9/383 , G06F9/3832 , G06F9/384 , G06F9/3855 , G06F9/3857 , G06F9/3863
摘要： A pipelined processor and method are disclosed including an improved history file unit. The pipelined processor processes a plurality of instructions in order. A register file is included which includes a different read port coupled to each register field in an instruction buffer for reading data from the register file. A history file unit is included and is coupled to each of the read ports of the register file for receiving a copy of all data read from the register file.
摘要翻译：公开了一种流水线处理器和方法，其包括改进的历史文件单元。流水线处理器按顺序处理多个指令。包括寄存器文件，其包括耦合到用于从寄存器文件读取数据的指令缓冲器中的每个寄存器字段的不同读取端口。包括历史文件单元并且耦合到寄存器文件的每个读取端口，用于接收从寄存器文件读取的所有数据的副本。

100. 发明授权

US06535041B1 Strobe circuit keeper arrangement providing reduced power consumption 失效
标题翻译：频闪电路保持器布置提供降低的功耗
公开(公告)号：US06535041B1
公开(公告)日：2003-03-18
申请号：US10093440
申请日：2002-03-07
申请人： Robert John Bucki , Sang Hoo Dhong , Jeffrey Herbert Fischer , Joel Abraham Silberman , Osamu Takahashi
发明人： Robert John Bucki , Sang Hoo Dhong , Jeffrey Herbert Fischer , Joel Abraham Silberman , Osamu Takahashi
IPC分类号： H03K312
CPC分类号： H03K3/356113 , H03K3/012 , H03K3/013
摘要： A dynamic node keeper device for a dynamic strobe circuit is controlled by the signal at the intermediate node, that is, the signal at the output of the strobe component. By controlling the dynamic node keeper device through the strobe component output, the keeper device is active or conductive only when necessary to protect against noises in the pull down network for the strobe circuit. At all other times in the course of operation of the dynamic strobe circuit, the dynamic node keeper device according to the invention is nonconductive or inactive. Thus, the dynamic strobe circuit according to the invention reduces power consumption.
摘要翻译：用于动态选通电路的动态节点保持器装置由中间节点处的信号，即选通组件输出端的信号控制。通过通过选通分量输出来控制动态节点保持器装置，只有在必要时保持装置才有效或不导通，以防止用于选通电路的下拉网络中的噪声。在动态频闪电路的操作过程中的所有其他时间，根据本发明的动态节点保持装置是不导通或不活动的。因此，根据本发明的动态选通电路降低功耗。

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