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91. 发明授权

US06211085B1 Method of preparing CU interconnect lines 有权
标题翻译：制作CU互连线的方法
公开(公告)号：US06211085B1
公开(公告)日：2001-04-03
申请号：US09252491
申请日：1999-02-18
申请人： Chung-Shi Liu
发明人： Chung-Shi Liu
IPC分类号： H01L214763
CPC分类号： H01L21/76873 , H01L21/76807 , H01L21/76843 , H01L21/76879 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： A method for forming a Wolfram plug within a dual Damascene structure that can make copper interconnect at the first level metal thereby providing a first level metal copper contact. The method of the present invention eliminates Prior Art problems experienced in forming metal contacts for narrow and deep dual Damascene structures and allows the simultaneous formation of metal contacts for shallow and deep contact holes within dual Damascene structures. At the bottom of the conventional trench and hole of the Damascene structure, a wolfram film is selectively grown on the silicide. Barriers are formed on top of the wolfram and on the uncovered sides of the hole after which copper is deposited in the remainder of the hole. The top surface of the structure obtained in this manner is planarized using copper CVD technology.
摘要翻译：一种用于在双镶嵌结构内形成Wolfram塞的方法，其可使铜互连在第一级金属上，从而提供第一级金属铜接触。本发明的方法消除了形成窄和深双镶嵌结构的金属接触所遇到的现有技术问题，并且允许在双镶嵌结构内同时形成用于浅和深接触孔的金属接触。在大马士革结构的常规沟槽和孔的底部，在硅化物上选择性地生长钨膜。阻挡物形成在钨的顶部和孔的未覆盖的侧面上，之后铜沉积在孔的其余部分中。以这种方式获得的结构的顶表面使用铜CVD技术进行平面化。

92. 发明授权

US6159857A Robust post Cu-CMP IMD process 有权
标题翻译：坚固的后期Cu-CMP IMD工艺
公开(公告)号：US6159857A
公开(公告)日：2000-12-12
申请号：US349849
申请日：1999-07-08
申请人： Chung-Shi Liu , Chen-Hua Yu
发明人： Chung-Shi Liu , Chen-Hua Yu
IPC分类号： H01L21/768 , H01L21/44
CPC分类号： H01L21/76834
摘要： A method is provided for cleaning exposed copper surfaces in damascene structures after chemical mechanical polishing of the copper. In a first embodiment exposed copper is annealed in a forming gas environment, a mixture of hydrogen and nitrogen, after chemical mechanical polishing, or other etching means, is used to remove the copper down to the top of the trench dielectric. A layer of silicon nitride, SiN, is then immediately deposited, preferably in situ, over the exposed copper. In a second embodiment exposed copper is subjected to a plasma of NH.sub.3 after chemical mechanical polishing, or other etching means, is used to remove the copper down to the top of the trench dielectric. A layer of silicon nitride, SiN, is then immediately deposited in situ over the exposed copper. A layer of dielectric can then be deposited on the layer of silicon nitride and processing can be continued without contaminating or oxidizing the copper.
摘要翻译：提供了一种用于在铜的化学机械抛光之后清除镶嵌结构中的暴露的铜表面的方法。在第一实施例中，暴露的铜在形成气体环境中退火，在化学机械抛光或其它蚀刻装置之后，氢和氮的混合物被用于将铜除去到沟槽电介质的顶部。然后立即将一层氮化硅（SiN）沉积在暴露的铜上，优选在原位沉积。在第二个实施例中，暴露的铜经受化学机械抛光之后的等离子体NH 3或其它蚀刻装置，以将铜向下移动到沟槽电介质的顶部。然后立即将氮化硅层SiN覆盖在裸露的铜上。然后可以在氮化硅层上沉积电介质层，并且可以继续加工而不污染或氧化铜。

93. 发明授权

US10128206B2 Conductive pillar structure 有权
公开(公告)号：US10128206B2
公开(公告)日：2018-11-13
申请号：US12904506
申请日：2010-10-14
申请人： Chih-Wei Lin , Ming-Da Cheng , Wen-Hsiung Lu , Meng-Wei Chou , Hung-Jui Kuo , Chung-Shi Liu
发明人： Chih-Wei Lin , Ming-Da Cheng , Wen-Hsiung Lu , Meng-Wei Chou , Hung-Jui Kuo , Chung-Shi Liu
IPC分类号： H01L21/768 , H01L23/48 , H01L23/00
摘要： The invention relates to a bump structure of a semiconductor device. An exemplary structure for a semiconductor device comprises a substrate; a contact pad over the substrate; a passivation layer extending over the substrate having an opening over the contact pad; and a conductive pillar over the opening of the passivation layer, wherein the conductive pillar comprises an upper portion substantially perpendicular to a surface of the substrate and a lower portion having tapered sidewalls.

94. 发明授权

US09449941B2 Connecting function chips to a package to form package-on-package 有权
标题翻译：将功能芯片连接到一个封装，以形成封装封装
公开(公告)号：US09449941B2
公开(公告)日：2016-09-20
申请号：US13178161
申请日：2011-07-07
申请人： Pei-Chun Tsai , Sheng-Yu Wu , Ching-Wen Hsiao , Tin-Hao Kuo , Chen-Shien Chen , Chung-Shi Liu , Chien-Hsiun Lee , Mirng-Ji Lii
发明人： Pei-Chun Tsai , Sheng-Yu Wu , Ching-Wen Hsiao , Tin-Hao Kuo , Chen-Shien Chen , Chung-Shi Liu , Chien-Hsiun Lee , Mirng-Ji Lii
IPC分类号： H01L29/00 , H01L23/00 , H01L25/065 , H01L25/18
CPC分类号： H01L24/73 , H01L25/0652 , H01L25/0657 , H01L25/18 , H01L2224/13082 , H01L2224/131 , H01L2224/13147 , H01L2224/16 , H01L2224/16238 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/73203 , H01L2224/73204 , H01L2224/73253 , H01L2225/06517 , H01L2225/06562 , H01L2924/00014 , H01L2924/1434 , H01L2924/15311 , H01L2924/00012 , H01L2924/014 , H01L2924/00 , H01L2224/48
摘要： A package-on-package (PoP) comprises a substrate with a plurality of substrate traces, a first function chip on top of the substrate connected to the substrate by a plurality of bond-on-trace connections, and a second function chip on top of the first function chip, directly connected to the substrate. Another package-on-package (PoP) comprises: a substrate with a plurality of substrate traces, a first function chip on top of the substrate connected to the substrate by a plurality of solder mask defined (SMD) connections formed on SMD bonding pads connected to solder bumps, and a second function chip on top of the first function chip, directly connected to the substrate by a plurality of bond-on-trace connections.
摘要翻译：封装封装（PoP）包括具有多个衬底迹线的衬底，通过多个贴合在轨迹连接与衬底连接的衬底顶部的第一功能芯片，以及顶部上的第二功能芯片的第一功能芯片，直接连接到基板。另一个封装封装（PoP）包括：具有多个衬底迹线的衬底，通过在连接的SMD焊盘上形成的多个焊接掩模限定（SMD）连接到衬底的顶部上的第一功能芯片焊料凸点，以及位于第一功能芯片顶部的第二功能芯片，通过多个贴合在线跟踪连接直接连接到基板。

95. 发明授权

US09412689B2 Semiconductor packaging structure and method 有权
标题翻译：半导体封装结构及方法
公开(公告)号：US09412689B2
公开(公告)日：2016-08-09
申请号：US13357379
申请日：2012-01-24
申请人： Chun-Cheng Lin , Chung-Shi Liu , Kuei-Wei Huang , Cheng-Ting Chen , Wei-Hung Lin , Ming-Da Cheng
发明人： Chun-Cheng Lin , Chung-Shi Liu , Kuei-Wei Huang , Cheng-Ting Chen , Wei-Hung Lin , Ming-Da Cheng
IPC分类号： H01L23/02 , H01L23/498 , H01L25/10 , H01L23/00
CPC分类号： H01L25/0657 , H01L21/0273 , H01L21/486 , H01L21/56 , H01L21/76898 , H01L23/3128 , H01L23/49827 , H01L23/49838 , H01L23/49866 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/81 , H01L25/105 , H01L25/50 , H01L2224/0231 , H01L2224/0239 , H01L2224/03452 , H01L2224/0401 , H01L2224/05083 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05171 , H01L2224/05184 , H01L2224/1131 , H01L2224/11424 , H01L2224/1152 , H01L2224/1162 , H01L2224/11825 , H01L2224/11849 , H01L2224/13024 , H01L2224/131 , H01L2224/13109 , H01L2224/13111 , H01L2224/13113 , H01L2224/13118 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13611 , H01L2224/16225 , H01L2224/16227 , H01L2224/16235 , H01L2224/16238 , H01L2225/06517 , H01L2225/06541 , H01L2225/06548 , H01L2225/06586 , H01L2225/1023 , H01L2225/1058 , H01L2924/01013 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01047 , H01L2924/01048 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01079 , H01L2924/0132 , H01L2924/0133 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/12042 , H01L2924/15311 , H01L2924/15321 , H01L2924/15747 , H01L2924/18161 , H01L2924/2064 , H01L2924/20641 , H01L2924/20642 , H01L2924/00014 , H01L2924/00
摘要： A system and method for packaging semiconductor dies is provided. An embodiment comprises a first package with a first contact and a second contact. A post-contact material is formed on the first contact in order to adjust the height of a joint between the contact pad a conductive bump. In another embodiment a conductive pillar is utilized to control the height of the joint between the contact pad and external connections.
摘要翻译：提供一种用于封装半导体管芯的系统和方法。实施例包括具有第一触点和第二触点的第一封装。在第一接触件上形成接触后材料，以便调节接触垫之间的接头的高度，导体凸块。在另一个实施例中，使用导电柱来控制接触垫和外部连接之间的接头的高度。

96. 发明授权

US09312214B2 Semiconductor packages having polymer-containing substrates and methods of forming same 有权
标题翻译：具有含聚合物的基板的半导体封装及其形成方法
公开(公告)号：US09312214B2
公开(公告)日：2016-04-12
申请号：US13240629
申请日：2011-09-22
申请人： Meng-Tse Chen , Chih-Wei Lin , Chun-Cheng Lin , Wen-Hsiung Lu , Ming-Da Cheng , Chung-Shi Liu
发明人： Meng-Tse Chen , Chih-Wei Lin , Chun-Cheng Lin , Wen-Hsiung Lu , Ming-Da Cheng , Chung-Shi Liu
IPC分类号： H01L23/498 , H01L21/60 , H01L21/50 , H01L21/56 , H01L21/48 , H01L21/683 , H01L23/00
CPC分类号： H01L23/49816 , H01L21/486 , H01L21/563 , H01L21/6835 , H01L23/49827 , H01L23/49894 , H01L24/16 , H01L2221/68345 , H01L2224/13023 , H01L2224/13082 , H01L2224/131 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/16237 , H01L2224/32225 , H01L2224/73204 , H01L2224/81005 , H01L2224/83005 , H01L2924/12042 , H01L2924/15331 , H01L2924/00012 , H01L2924/014 , H01L2924/00014 , H01L2924/00
摘要： A method includes applying a polymer-comprising material over a carrier, and forming a via over the carrier. The via is located inside the polymer-comprising material, and substantially penetrates through the polymer-comprising material. A first redistribution line is formed on a first side of the polymer-comprising material. A second redistribution line is formed on a second side of the polymer-comprising material opposite to the first side. The first redistribution line is electrically coupled to the second redistribution line through the via.
摘要翻译：一种方法包括在载体上涂覆含聚合物的材料，并在载体上形成通孔。通孔位于含聚合物的材料的内部，并且基本上穿透包含聚合物的材料。在包含聚合物的材料的第一面上形成第一再分配线。第二再分配线形成在与第一侧相对的含聚合物材料的第二侧上。第一再分配线通过通孔电耦合到第二再分配线。

97. 发明授权

US09099396B2 Post-passivation interconnect structure and method of forming the same 有权
标题翻译：后钝化互连结构及其形成方法
公开(公告)号：US09099396B2
公开(公告)日：2015-08-04
申请号：US13291508
申请日：2011-11-08
申请人： Yi-Wen Wu , Zheng-Yi Lim , Ming-Che Ho , Chung-Shi Liu
发明人： Yi-Wen Wu , Zheng-Yi Lim , Ming-Che Ho , Chung-Shi Liu
IPC分类号： H01L23/485 , H01L23/29 , H01L23/31 , H01L23/525 , H01L23/00
CPC分类号： H01L23/291 , H01L23/293 , H01L23/3171 , H01L23/525 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/81 , H01L2224/02313 , H01L2224/02331 , H01L2224/02381 , H01L2224/0239 , H01L2224/03424 , H01L2224/03452 , H01L2224/0346 , H01L2224/03462 , H01L2224/03464 , H01L2224/0391 , H01L2224/0401 , H01L2224/05008 , H01L2224/05111 , H01L2224/05124 , H01L2224/05155 , H01L2224/05164 , H01L2224/05548 , H01L2224/05562 , H01L2224/05567 , H01L2224/05573 , H01L2224/05583 , H01L2224/05611 , H01L2224/05644 , H01L2224/05647 , H01L2224/08503 , H01L2224/11334 , H01L2224/1146 , H01L2224/11849 , H01L2224/13022 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13139 , H01L2224/13147 , H01L2224/13155 , H01L2224/16225 , H01L2224/16237 , H01L2224/16503 , H01L2924/00014 , H01L2924/01028 , H01L2924/01029 , H01L2924/01047 , H01L2924/01082 , H01L2924/01083 , H01L2924/01327 , H01L2924/014 , H01L2924/12042 , H01L2924/2064 , H01L2924/00 , H01L2224/05552
摘要： A semiconductor device includes a conductive layer formed on the surface of a post-passivation interconnect (PPI) structure by an immersion tin process. A polymer layer is formed on the conductive layer and patterned with an opening to expose a portion of the conductive layer. A solder bump is then formed in the opening of the polymer layer to electrically connect to the PPI structure.
摘要翻译：半导体器件包括通过浸锡工艺在钝化后互连（PPI）结构的表面上形成的导电层。聚合物层形成在导电层上并用开口图案化以暴露导电层的一部分。然后在聚合物层的开口中形成焊料凸块以电连接到PPI结构。

98. 发明授权

US08993431B2 Method of fabricating bump structure 有权
标题翻译：制造凸块结构的方法
公开(公告)号：US08993431B2
公开(公告)日：2015-03-31
申请号：US12778610
申请日：2010-05-12
申请人： Chun-Lei Hsu , Ming-Che Ho , Ming-Da Cheng , Chung-Shi Liu
发明人： Chun-Lei Hsu , Ming-Che Ho , Ming-Da Cheng , Chung-Shi Liu
IPC分类号： H01L21/44 , H01L23/00
CPC分类号： H01L24/11 , H01L24/03 , H01L24/05 , H01L24/13 , H01L2224/03424 , H01L2224/03464 , H01L2224/0347 , H01L2224/0401 , H01L2224/05559 , H01L2224/05571 , H01L2224/05572 , H01L2224/1145 , H01L2224/11452 , H01L2224/11462 , H01L2224/1148 , H01L2224/1161 , H01L2224/11616 , H01L2224/11831 , H01L2224/13005 , H01L2224/13022 , H01L2224/1308 , H01L2224/131 , H01L2224/13109 , H01L2224/13111 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/13169 , H01L2924/00013 , H01L2924/0002 , H01L2924/01012 , H01L2924/01013 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01025 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01038 , H01L2924/0104 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/01073 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/1305 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/19041 , H01L2924/00014 , H01L2924/01014 , H01L2924/206 , H01L2224/13099 , H01L2224/05099 , H01L2224/13599 , H01L2224/05599 , H01L2224/29099 , H01L2224/29599 , H01L2924/00 , H01L2224/05552
摘要： A method for fabricating bump structure forms an under-bump metallurgy (UBM) layer in an opening of an encapsulating layer, and then forms a bump layer on the UBM layer within the opening of the encapsulating layer. After removing excess material of the bump layer from the upper surface of the encapsulating layer, the encapsulating layer is removed till a top portion of the bump layer protrudes from the upper surface of the encapsulating layer.
摘要翻译：一种用于制造凸块结构的方法在封装层的开口中形成凸起下金属（UBM）层，然后在封装层的开口内的UBM层上形成凸点层。在从封装层的上表面除去突起层的多余材料之后，去除封装层直到凸起层的顶部从封装层的上表面突出。

99. 发明授权

US08912651B2 Package-on-package (PoP) structure including stud bulbs and method 有权
标题翻译：包装封装（PoP）结构，包括柱头灯泡和方法
公开(公告)号：US08912651B2
公开(公告)日：2014-12-16
申请号：US13397747
申请日：2012-02-16
申请人： Chen-Hua Yu , Mirng-Ji Lii , Chung-Shi Liu , Ming-Da Cheng
发明人： Chen-Hua Yu , Mirng-Ji Lii , Chung-Shi Liu , Ming-Da Cheng
IPC分类号： H01L23/498
CPC分类号： H01L25/0657 , H01L23/49811 , H01L23/49816 , H01L23/49894 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/81 , H01L24/94 , H01L25/105 , H01L25/50 , H01L2224/038 , H01L2224/0401 , H01L2224/04042 , H01L2224/05023 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05552 , H01L2224/05564 , H01L2224/05568 , H01L2224/05573 , H01L2224/05611 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05664 , H01L2224/05693 , H01L2224/11019 , H01L2224/1134 , H01L2224/11823 , H01L2224/11825 , H01L2224/1184 , H01L2224/13017 , H01L2224/13018 , H01L2224/13019 , H01L2224/13023 , H01L2224/13082 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13562 , H01L2224/1357 , H01L2224/1358 , H01L2224/13611 , H01L2224/13639 , H01L2224/13644 , H01L2224/13655 , H01L2224/13664 , H01L2224/16057 , H01L2224/16058 , H01L2224/16148 , H01L2224/16225 , H01L2224/16503 , H01L2224/45124 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/45565 , H01L2224/45664 , H01L2224/48 , H01L2224/48611 , H01L2224/48624 , H01L2224/48644 , H01L2224/48647 , H01L2224/48655 , H01L2224/48664 , H01L2224/48693 , H01L2224/48711 , H01L2224/48724 , H01L2224/48744 , H01L2224/48747 , H01L2224/48755 , H01L2224/48764 , H01L2224/48793 , H01L2224/48811 , H01L2224/48824 , H01L2224/48844 , H01L2224/48847 , H01L2224/48855 , H01L2224/48864 , H01L2224/48893 , H01L2224/73204 , H01L2224/81009 , H01L2224/81026 , H01L2224/81192 , H01L2224/81193 , H01L2224/81815 , H01L2224/83104 , H01L2224/94 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06555 , H01L2225/1023 , H01L2225/1058 , H01L2924/00012 , H01L2924/00014 , H01L2924/01015 , H01L2924/01047 , H01L2924/12042 , H01L2924/15311 , H01L2924/15321 , H01L2924/15331 , H01L2924/157 , H01L2924/15788 , H01L2924/181 , H01L2924/00 , H01L2224/81 , H01L2924/01029 , H01L2924/01006
摘要： Embodiments concern Package-On-Package (PoP) structures including stud bulbs and methods of forming PoP structures. According to an embodiment, a structure includes a first substrate, stud bulbs, a die, a second substrate, and electrical connectors. The stud bulbs are coupled to a first surface of the first substrate. The die is attached to the first surface of the first substrate. The electrical connectors are coupled to the second substrate, and respective ones of the electrical connectors are coupled to respective ones of the stud bulbs.
摘要翻译：实施例涉及包装封装（PoP）结构，包括柱状灯泡和形成PoP结构的方法。根据实施例，结构包括第一基板，螺柱灯泡，模具，第二基板和电连接器。螺柱灯泡耦合到第一基板的第一表面。模具附接到第一基板的第一表面。电连接器耦合到第二基板，并且相应的电连接器耦合到相应的螺柱灯泡。

100. 发明授权

US08889486B2 Methods and apparatus for package on package structures 有权
标题翻译：封装结构封装的方法和装置
公开(公告)号：US08889486B2
公开(公告)日：2014-11-18
申请号：US13604333
申请日：2012-09-05
申请人： Meng-Tse Chen , Yi-Da Tsai , Xi-Hong Chen , Tao-Hua Lee , Wei-Yu Chen , Ming-Da Cheng , Chung-Shi Liu
发明人： Meng-Tse Chen , Yi-Da Tsai , Xi-Hong Chen , Tao-Hua Lee , Wei-Yu Chen , Ming-Da Cheng , Chung-Shi Liu
IPC分类号： H01L21/50 , H01L21/48 , H01L21/44
CPC分类号： H01L25/0657 , H01L21/563 , H01L23/3128 , H01L23/3135 , H01L23/49816 , H01L23/5384 , H01L23/5385 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L25/105 , H01L25/50 , H01L2224/13116 , H01L2224/13124 , H01L2224/13144 , H01L2224/13147 , H01L2224/16225 , H01L2224/291 , H01L2224/29116 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48229 , H01L2224/73265 , H01L2224/81805 , H01L2225/0651 , H01L2225/0652 , H01L2225/06565 , H01L2225/1023 , H01L2225/1058 , H01L2924/01322 , H01L2924/12042 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/00014 , H01L2224/48227 , H01L2924/00012 , H01L2924/014 , H01L2924/00
摘要： A package-on-package (“PoP”) structure and a method of forming are provided. The PoP structure may be formed by forming a first set of electrical connections on a first substrate. A first material may be applied to the first set of electrical connections. A second substrate may be provided having a second set of electrical connections formed thereon. The first set of electrical connections of the first substrate having the epoxy flux applied may be contacted to the second electrical connections of the second substrate. A reflow process may be performed to electrically connect the first substrate to the second substrate. The epoxy flux applied to the first electrical connections of the first substrate may prohibit electrical bridges or shorts from forming during the reflow process.
摘要翻译：提供封装封装（“PoP”）结构和形成方法。 PoP结构可以通过在第一基板上形成第一组电连接而形成。可以将第一材料施加到第一组电连接。可以提供具有形成在其上的第二组电连接的第二基板。具有施加的环氧树脂焊剂的第一基板的第一组电连接可以接触第二基板的第二电连接。可以进行回流工艺以将第一衬底电连接到第二衬底。施加到第一基板的第一电连接处的环氧树脂通量可能会在回流过程中阻止电桥或短路的形成。

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