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    • 1. 发明授权
    • Process for producing ether compounds by catalytic hydrogenolysis
    • 通过催化氢解制备醚化合物的方法
    • US4479017A
    • 1984-10-23
    • US391304
    • 1982-06-23
    • Tadashi AyusawaTadamichi AokiYutaka Nomura
    • Tadashi AyusawaTadamichi AokiYutaka Nomura
    • B01J23/44C07C29/10C07C29/141C07C41/28C07C41/00
    • B01J23/44C07C29/10C07C29/141C07C41/28
    • In a process for producing an ether compound by the catalytic hydrogenolysis of an acetal compound in the presence of a catalyst, the improvement wherein an acetal compound of the following formula (2) ##STR1## wherein R represents a hydrogen atom or a lower alkoxy group, Y represents an alkylene group having 2 to 12 carbon atoms, n represents a positive number of from 1 to 6, the two groups R(YO).sub.n may, together with the carbon atom to which they are bonded, represent a 1,3-dioxolane ring, and R.sup.1 and R.sup.2, independently from each other, represent a hydrogen atom or a C.sub.1 -C.sub.6 alkyl group, provided that at least one of R.sup.1 and R.sup.2 represents a hydrogen atom,is catalytically hydrogenolyzed in the presence of a palladium catalyst on a carbon carrier in the absence of an acid substance added, thereby to form an ether compound of the following formula (1)R(YO).sub.n CHR.sup.1 R.sup.2 (1) whereinR, R.sup.1, R.sup.2, Y and n are as defined.
    • 在催化剂存在下,通过缩醛化合物的催化氢解生产醚化合物的方法,其中下述式(2)的缩醛化合物其中R表示氢原子或 低级烷氧基,Y表示碳原子数2〜12的亚烷基,n表示1至6的正数,R(YO)2基可以与它们所键合的碳原子一起表示 1,3-二氧戊环,R1和R2彼此独立地表示氢原子或C1-C6烷基,条件是R1和R2中的至少一个表示氢原子,在存在下催化氢解 在不存在酸物质的情况下在碳载体上的钯催化剂,从而形成下式(1)的醚化合物:R(YO)n CHR 1 R 2(1)其中R,R 1,R 2,Y和n如上所定义 。
    • 3. 发明授权
    • Coordinate computation device and sewing machine
    • 坐标计算装置和缝纫机
    • US09045848B2
    • 2015-06-02
    • US14223031
    • 2014-03-24
    • Masaru JimboYutaka NomuraKentaro ToriiKazuki KojimaDaisuke Honda
    • Masaru JimboYutaka NomuraKentaro ToriiKazuki KojimaDaisuke Honda
    • D05B19/16G06F3/00D05B19/02
    • D05B19/16D05B19/02G06F3/00
    • A coordinate computation device includes a position indication portion, a detection portion, a processor, and a memory. The position indication portion includes an indicating portion, a switch, and a transmitter. The detection portion is configured to detect ultrasonic waves transmitted by the transmitter. The memory is configured to store computer-readable instructions. The computer-readable instructions cause the processor to perform processes that include computing sets of first coordinates, based on times when the detection portion detects the ultrasonic waves, computing a movement direction of the position indication portion on a plane, computing an angle formed between the plane and a direction in which the position indication portion is long, and computing a set of second coordinates, based on the computed movement direction, the computed angle, and a set of third coordinates among the sets of the computed first coordinates.
    • 坐标计算装置包括位置指示部分,检测部分,处理器和存储器。 位置指示部分包括指示部分,开关和发射器。 检测部被配置为检测由发送器发送的超声波。 存储器被配置为存储计算机可读指令。 计算机可读指令使得处理器基于检测部分检测超声波的时间,执行包括第一坐标的计算集的处理,计算平面上的位置指示部分的移动方向,计算在 平面以及位置指示部分长的方向,并且基于所计算的运动方向,所计算的角度和所计算的第一坐标的组中的一组第三坐标来计算一组第二坐标。
    • 4. 发明授权
    • Method of manufacturing a connector chip
    • 制造连接器芯片的方法
    • US08607443B2
    • 2013-12-17
    • US12827755
    • 2010-06-30
    • Shinji OkamotoKatsumi TakeuchiYutaka Nomura
    • Shinji OkamotoKatsumi TakeuchiYutaka Nomura
    • H05K3/36
    • H05K3/368H01R12/52H05K3/3442H05K2201/10378Y10T29/49126
    • A method of manufacturing a connector chip includes preparing a plate-like insulating substrate material with a plurality of through hole rows arranged therein; forming a plurality of first and second base layers on opposite surfaces of the insulating substrate material; forming insulating layers between each two adjoining first base layers and between each two adjoining second base layers; forming third base layers on the one side over edge portions of the first base layers, internal surfaces of the through holes, and edge portions of the second base layers; forming fourth base layers on the other side over edge portions of the first base layers, the internal surfaces of the through holes, and edge portions of the second base layers; cutting the insulating substrate material along a middle of each of the through hole rows; and forming one or more plated layers over the first to fourth base layers.
    • 一种制造连接器芯片的方法包括制备其中布置有多个通孔列的板状绝缘基板材料; 在所述绝缘基板材料的相对表面上形成多个第一和第二基底层; 在每个两个邻接的第一基底层之间和每个两个相邻的第二基底层之间形成绝缘层; 在所述第一基底层的边缘部分,所述通孔的内表面和所述第二基底层的边缘部分的一侧上形成第三基底层; 在所述第一基底层的边缘部分的另一侧上形成第四基底层,所述通孔的内表面和所述第二基底层的边缘部分; 沿着每个通孔列的中间切割绝缘基板材料; 以及在所述第一至第四基底层上形成一个或多个镀层。
    • 7. 发明申请
    • CONNECTOR CHIP AND MANUFACTURING METHOD THEREOF
    • 连接器芯片及其制造方法
    • US20070072454A1
    • 2007-03-29
    • US10595809
    • 2004-11-12
    • Shinji OkamotoKatsumi TakeuchiYutaka Nomura
    • Shinji OkamotoKatsumi TakeuchiYutaka Nomura
    • H01R4/58
    • H05K3/368H01R12/52H05K3/3442H05K2201/10378Y10T29/49126
    • The present invention provides a connector chip capable of preventing electrical shorting between adjoining electrodes and also capable of readily connecting a plurality of electrodes on a first circuit substrate and a plurality of electrodes on a second circuit substrate without using a dedicated mounting device or the like. A plurality of conductive paths 5 are formed on an outer periphery surface constituted by continuous four surfaces 9A to 9D of an insulating substrate 3 including six surfaces of the surfaces 9A to 9D and surfaces 9E and 9F. Each of the conductive paths 5 goes round on the outer periphery surface. The conductive paths 5 are formed on the outer periphery surface at a predetermined interval in an opposing direction in which the remaining two surfaces 9E and 9F are opposing to each other. Each of insulating layers 7 having a property of repelling molten solder is formed between portions of each two adjoining conductive paths located on a pair of the surfaces 9A and 9B. The width of a conductive-path-formed portion 3A with a conductive path 5 formed thereon, orthogonal to a center line C is formed to be smaller than the width of a conductive-path-unformed portion 3B with no conductive path 5 formed thereon, orthogonal to the center line C.
    • 本发明提供一种连接器芯片,其能够防止相邻电极之间的电短路,并且还能够容易地连接第一电路基板上的多个电极和第二电路基板上的多个电极,而不使用专用的安装装置等。 在由包括表面9A至9D的六个表面和表面9E和9F的绝缘基板3的连续的四个表面9A至9D构成的外周面上形成多个导电路径5。 导电路径5在外周表面上圆周。 导电路径5以与剩下的两个表面9E和9F相对的相反方向以预定的间隔形成在外周表面上。 具有排斥熔融焊料性质的绝缘层7中的每一个形成在位于一对表面9A和9B上的每个两个邻接导电路径的部分之间。具有导电性的导电路径形成部分3A的宽度 形成在其上的与中心线C正交的路径5形成为小于没有形成在其上的导电路径5的与中心线C正交的导电路径未成形部分3B的宽度。
    • 8. 发明授权
    • Quinazoline derivatives
    • 喹唑啉衍生物
    • US06706705B1
    • 2004-03-16
    • US08809770
    • 1997-03-28
    • Koichiro NishiokaToshihiro TakahashiYutaka Nomura
    • Koichiro NishiokaToshihiro TakahashiYutaka Nomura
    • C07D23995
    • C07D239/95
    • The present invention provides a new compound which shows slow and continuous blood pressure reducing action and is useful as an antihypertensive agent. The invention resides in a quinazoline derivative of the following formula (I) and its pharmaceutically acceptable salt: in which, each of R1 and R2 is H or an alkyl group of 1 to 6 carbon atoms, or R1 and R2 are combined to form an ethylene group; each of R3 and R4 is an alkyl group of 1 to 6 carbon atoms; R5 is a hydrogen atom, a hydroxyl group, an alkyl group of 1 to 6 carbon atoms, or an alkoxy group of 1 to 6 carbon atoms; each of R6 and R7 is a hydrogen atom or an alkyl group of 1 to 6 carbon atoms; and n is 2 or 3. The invention further resides in an antihypertensive agent containing the above compound.
    • 本发明提供了一种新的化合物,其显示缓慢且持续的减压作用,并且可用作抗高血压药。本发明涉及下式(I)的喹唑啉衍生物及其药学上可接受的盐:其中R 1和R 2是H或1至6个碳原子的烷基,或R 1和R 2结合形成亚乙基; R 3和R 4各自为1至6个碳原子的烷基; R 5为氢原子,羟基,碳原子数为1〜6的烷基或碳原子数1〜6的烷氧基, R 6和R 7各自为氢原子或1〜6个碳原子的烷基; 并且n为2或3.本发明还涉及含有上述化合物的抗高血压药。