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1. 发明申请

WO2015171240A1 METHOD AND COMPUTING DEVICE FOR USING BOTH VOLATILE MEMORY AND NON-VOLATILE SWAP MEMORY TO PRE-LOAD A PLURALITY OF APPLICATIONS 审中-公开
标题翻译：使用两个易失性存储器和非易失性存储器来预加载多种应用的方法和计算装置
公开(公告)号：WO2015171240A1
公开(公告)日：2015-11-12
申请号：PCT/US2015/024843
申请日：2015-04-08
申请人： SANDISK TECHNOLOGIES INC.
发明人： WU, Robert, S. , CHEN, Jian , KARKARE, Ashish , MARCU, Alon , MOUNTANIOL, Vsevolod
IPC分类号： G06F12/08 , G06F9/445
CPC分类号： G06F3/0619 , G06F3/0632 , G06F3/0655 , G06F3/0679 , G06F9/4401 , G06F9/445 , G06F12/08 , G06F2206/1014
摘要： The following embodiments generally relate to the use of a "swap area" in a non-volatile memory as an extension to volatile memory in a computing device. These embodiments include techniques to use both volatile memory and non-volatile swap memory to pre-load a plurality of applications, to control the bandwidth of swap operations, to encrypt data stored in the swap area, and to perform a fast clean-up of the swap area.
摘要翻译：以下实施例通常涉及在非易失性存储器中使用“交换区域”作为计算设备中的易失性存储器的扩展。这些实施例包括使用易失性存储器和非易失性交换存储器来预加载多个应用程序，控制交换操作的带宽，加密存储在交换区域中的数据以及执行快速清理交换区域。

2. 发明申请

WO2015164050A1 NEIGHBORING WORD LINE PROGRAM DISTURB COUNTERMEASURE FOR CHARGE-TRAPPING STACKED MEMORY 审中-公开
标题翻译：邻接字线程序用于收集堆叠存储器的距离计数器
公开(公告)号：WO2015164050A1
公开(公告)日：2015-10-29
申请号：PCT/US2015/024273
申请日：2015-04-03
申请人： SANDISK TECHNOLOGIES INC.
发明人： YUAN, Jiahui , DONG, Yingda , CHEN, Jian
IPC分类号： G11C11/56 , G11C16/26 , G11C16/34 , H01L27/115
CPC分类号： G06F11/1004 , G11C11/5642 , G11C16/0466 , G11C16/10 , G11C16/26 , G11C16/3427 , H01L27/11582
摘要： Techniques are provided for reading data from memory cells arranged along a common charge trapping layer, e.g., in a 3D stacked non-volatile memory device. Memory cells on a word line layer WLLn are disturbed by programming of memory cells on an adjacent word line layer WLLn+1, resulting in uncorrectable errors. The memory cells on WLLn can be read in a data recovery read operation which applies an elevated pass voltage to WLLn+1. The elevated pass voltage causes a decrease and narrowing of the threshold voltage distribution on WLLn which facilitates reading. The operation compensates for the lower threshold voltages by lowering the control gate voltage, raising the source voltage or adjusting a sensing period, demarcation level or pre-charge level in sensing circuitry. The elevated pass voltage can be stepped up in repeated read attempts until there are no uncorrectable errors or a limit is reached.
摘要翻译：提供了用于从沿着公共电荷捕获层布置的存储器单元读取数据的技术，例如在3D堆叠的非易失性存储器件中。字线层WLLn上的存储单元被相邻字线层WLLn + 1上的存储单元的编程所扰乱，导致不可校正的错误。 WLLn上的存储单元可以在数据恢复读取操作中读取，该操作将提升的通过电压施加到WLLn + 1。升高的通过电压导致WLLn上的阈值电压分布的减小和变窄，这有利于读取。该操作通过降低控制栅极电压，提高电源电压或调整感测电路中的感测周期，分界电平或预充电电平来补偿较低的阈值电压。升高的通过电压可以在重复的读取尝试中加强，直到没有不可校正的错误或达到极限。

3. 发明申请

WO2013101573A1 SLC-MLC WEAR BALANCING 审中-公开
标题翻译： SLC-MLC磨损平衡
公开(公告)号：WO2013101573A1
公开(公告)日：2013-07-04
申请号：PCT/US2012/070467
申请日：2012-12-19
申请人： SANDISK TECHNOLOGIES INC.
发明人： CHEN, Jian , GOROBETS, Sergey, Anatolievich , SPROUSE, Steven
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F2212/7202 , G06F2212/7211 , G11C16/349 , G11C2211/5641
摘要： A method and system for SLC-MLC Wear Balancing in a flash memory device is disclosed. The flash memory device includes a single level cell (SLC) portion (1002) and a multi-level cell (MLC) portion (1004). The age of the SLC portion and the MLC portion may differ, leading potentially to one portion wearing out before the other. In order to avoid this, a controller is configured to receive an age indicator from one or both of the SLC portion and the MLC portion, determine, based on the age indicator, whether to modify operation of the SLC portion and/or the MLC portion, and in response to determining to modifying operation, modify the operation of the at least one of the SLC portion or the MLC portion. The modification of the operation may thus balance wear between the SLC and MLC portions, thereby potentially extending the life of the flash memory device.
摘要翻译：公开了一种用于闪存设备中的SLC-MLC磨损平衡的方法和系统。闪速存储器件包括单电平单元（SLC）部分（1002）和多电平单元（MLC）部分（1004）。 SLC部分和MLC部分的时代可能不同，潜在地导致在另一部分之前磨损的部分。为了避免这种情况，控制器被配置为从SLC部分和MLC部分中的一个或两个接收年龄指示符，基于年龄指示符确定是否修改SLC部分和/或MLC部分的操作并且响应于确定修改操作，修改SLC部分或MLC部分中的至少一个的操作。因此，操作的修改可以平衡SLC和MLC部分之间的磨损，从而潜在地延长闪存设备的寿命。

4. 发明申请

WO2014197144A1 SELECTION OF DATA FOR REDUNDANCY CALCULATION IN THREE DIMENSIONAL NONVOLATILE MEMORY 审中-公开
标题翻译：选择三维非易失性存储器中冗余计算的数据
公开(公告)号：WO2014197144A1
公开(公告)日：2014-12-11
申请号：PCT/US2014/036545
申请日：2014-05-02
申请人： SANDISK TECHNOLOGIES INC.
发明人： AVILA, Chris Nga Yee , DUSIJA, Gautam Ashok , CHEN, Jian , DONG, Yingda , MUI, Man Lung , LEE, Seungpil , MAK, Alexander Kwok-Tung
IPC分类号： G11C16/34 , G11C29/00 , G06F11/10
CPC分类号： G06F11/1068 , G06F12/0246 , G11C16/0483 , G11C16/349 , G11C29/04 , G11C29/82 , G11C2213/71
摘要： Portions of data stored in a three dimensional memory array are selected based on their locations for calculation of redundancy data. Locations are selected so that no two portions in a set of portions for a given calculation are likely to become uncorrectable at the same time. Selected portions may be separated by at least one word line and separated by at least one string in a block.
摘要翻译：基于它们用于计算冗余数据的位置来选择存储在三维存储器阵列中的部分数据。选择位置，使得给定计算的一组部分中的两个部分可能在同一时间变得不可校正。所选择的部分可以被至少一个字线分隔开并且被块中的至少一个字符串隔开。

5. 发明申请

WO2013191870A1 FLASH MEMORY WITH TARGETED READ SCRUB ALGORITHM 审中-公开
标题翻译：具有指定读取SCRUB算法的闪存
公开(公告)号：WO2013191870A1
公开(公告)日：2013-12-27
申请号：PCT/US2013/043692
申请日：2013-05-31
申请人： SANDISK TECHNOLOGIES INC.
发明人： SPROUSE, Steven, T. , BAUCHE, Alexandra , HUANG, Yichao , CHEN, Jian , HUANG, Jianmin , LEE, Dana
IPC分类号： G11C16/34
CPC分类号： G11C16/3418 , G11B20/18 , G11B20/1883 , G11C16/3427 , G11C16/3431
摘要： A method and system have been described for counteracting and correcting for read disturb effects in blocks of flash memory. The method may include the step of a controller of the memory system performing a read scrub scan on only a portion of one targeted word line in a block at desired intervals. The controller may calculate whether a read scrub scan is necessary based on a probabilistic determination that is calculated in response to each received host read command. The controller may then place a block associated with the targeted word line into a refresh queue if a number of errors are detected in the targeted word line that meets or exceeds a predetermined threshold. The block refresh process may include copying the data from the block into a new block during a background operation.
摘要翻译：已经描述了用于抵消和校正闪速存储器块中的读取干扰效应的方法和系统。该方法可以包括存储器系统的控制器的步骤，其以期望的间隔仅在块中的一个目标字线的一部分上执行读取擦除扫描。控制器可以基于响应于每个接收的主机读取命令而计算的概率确定来计算是否需要读取擦除扫描。然后，如果在满足或超过预定阈值的目标字线中检测到多个错误，则控制器然后可以将与目标字线相关联的块放置到刷新队列中。块刷新过程可以包括在后台操作期间将数据从块复制到新块中。

6. 发明申请

WO2016089467A1 OPERATION MODES FOR AN INVERTED NAND ARCHITECTURE 审中-公开
标题翻译：反向NAND架构的操作模式
公开(公告)号：WO2016089467A1
公开(公告)日：2016-06-09
申请号：PCT/US2015/052071
申请日：2015-09-24
申请人： SANDISK TECHNOLOGIES INC.
发明人： ZHANG, Yanli , SAMACHISA, George , ALSMEIER, Johann , CHEN, Jian
IPC分类号： G11C16/04 , G11C11/56 , G11C16/26
CPC分类号： G11C16/0483 , G11C11/5642 , G11C16/10 , G11C16/26
摘要： Methods for performing memory operations on a memory array that includes inverted NAND strings are described. The memory operations may include erase operations, read operations, programming operations, program verify operations, and erase verify operations. An inverted NAND string may include a string of inverted floating gate transistors or a string of inverted charge trap transistors. In one embodiment, an inverted floating gate transistor may include a tunneling layer between a floating gate of the inverted floating gate transistor and a control gate of the inverted floating gate transistor. The arrangement of the tunneling layer between the floating gate and the control gate allows electrons to be added to or removed from the floating gate via F-N tunneling between the floating gate and the control gate. The inverted NAND string may be formed above a substrate and oriented such that the inverted NAND string is orthogonal to the substrate.
摘要翻译：描述了对包括反相NAND串的存储器阵列执行存储器操作的方法。存储器操作可以包括擦除操作，读取操作，编程操作，程序验证操作和擦除验证操作。反相NAND串可以包括一串反向浮栅晶体管或一串反向电荷陷阱晶体管。在一个实施例中，反相浮栅晶体管可以包括在反相浮栅晶体管的浮置栅极和反相浮栅晶体管的控制栅极之间的隧穿层。浮动栅极和控制栅极之间的隧道层的布置允许通过浮动栅极和控制栅极之间的F-N隧穿将电子添加到浮动栅极或从浮动栅极去除。反相NAND串可以形成在衬底之上并且被定向成使得反相NAND串与衬底正交。

7. 发明申请

WO2013043602A2 HIGH ENDURANCE NON-VOLATILE STORAGE 审中-公开
标题翻译：高耐久性非挥发性储存
公开(公告)号：WO2013043602A2
公开(公告)日：2013-03-28
申请号：PCT/US2012/055919
申请日：2012-09-18
申请人： SANDISK TECHNOLOGIES, INC. , CHEN, Jian , GOROBETS, Sergei , SPROUSE, Steven , KUO, Tien-chien , LI, Yan , LEE, Seungpil , MAK, Alex , DUTTA, Deepanshu , HIGASHITANI, Masaaki
发明人： CHEN, Jian , GOROBETS, Sergei , SPROUSE, Steven , KUO, Tien-chien , LI, Yan , LEE, Seungpil , MAK, Alex , DUTTA, Deepanshu , HIGASHITANI, Masaaki
IPC分类号： G11C16/10 , G11C11/56 , G11C5/06
CPC分类号： G11C16/10 , G11C5/063 , G11C11/5628 , G11C2211/5641
摘要： A non-volatile storage system is disclosed that includes non-volatile memory cells designed for high endurance and lower retention than other non-volatile memory cells.
摘要翻译：公开了一种非易失性存储系统，其包括设计用于高耐久性和比其他非易失性存储器单元更低保持性的非易失性存储器单元。

8. 发明申请

WO2016093935A1 METHOD TO RECOVER CYCLING DAMAGE AND IMPROVE LONG TERM DATA RETENTION 审中-公开
标题翻译：恢复循环损伤并改善长期数据保留的方法
公开(公告)号：WO2016093935A1
公开(公告)日：2016-06-16
申请号：PCT/US2015/054454
申请日：2015-10-07
申请人： SANDISK TECHNOLOGIES INC.
发明人： LU, Ching-Huang , ZHANG, Zhengyi , ZHAO, Wei , DONG, Yingda , CHEN, Jian
IPC分类号： G11C16/34
CPC分类号： G11C16/16 , G11C16/0466 , G11C16/0483 , G11C16/32 , G11C16/3431 , G11C16/3459 , G11C16/349 , G11C16/3495
摘要： Techniques for reversing damage caused by program-erase cycles in charge-trapping memory to improve long term data retention. A recovery process improves the data retention of a block of memory cells by programming the memory cells to a relatively high threshold voltage and enforcing a time period of several minutes or hours in which the memory cells are inactive and remain at the relatively high Vth levels. Damage such as traps in the memory cells is essentially healed or annealed out during this inactive period. All of the memory cells can be healed at the same time and by relatively equal amounts. At the conclusion of the recovery process, the block is returned to a pool of available blocks. In one approach, an amount of recovery is measured and the period of inactivity is continued for an amount of time which is based on the amount of recovery
摘要翻译：用于在电荷捕获存储器中逆转由编程擦除周期引起的损坏以改善长期数据保持的技术。恢复过程通过将存储器单元编程到相对较高的阈值电压并且执行存储器单元不活动并保持在相对高的Vth电平的几分钟或数小时的时间段来改善存储器单元块的数据保持。在这个不活跃的时期，诸如记忆单元中的陷阱的损伤基本上被愈合或退火。所有的记忆细胞可以同时和相对相等的量治愈。在恢复过程结束时，块将返回到可用块池。在一种方法中，测量恢复量，并且不活动的持续时间持续一段时间量，其基于恢复量

9. 发明申请

WO2015002897A1 WRITE OPERATIONS FOR DEFECT MANAGEMENT IN NONVOLATILE MEMORY 审中-公开
标题翻译：非易失性存储器中的缺陷管理的写操作
公开(公告)号：WO2015002897A1
公开(公告)日：2015-01-08
申请号：PCT/US2014/044937
申请日：2014-06-30
申请人： SANDISK TECHNOLOGIES INC.
发明人： AVILA, Chris, Nga Yee , DUSIJA, Gautam, Ashok , CHEN, Jian , KOCHAR, Mrinal , MANOHAR, Abhijeet , MAK, Alexander, Kwok-Tung , LEE, Seungpil , KOH, Pao-Ling
IPC分类号： G11C11/56 , G11C16/34 , G11C16/10
CPC分类号： G11C16/3459 , G11C11/5628 , G11C16/10 , G11C2211/5621 , G11C2211/5641 , G11C2216/20
摘要： Data that is stored in a higher error rate format in a nonvolatile memory is backed up in a lower error rate format. Data to be stored may be transferred once to on-chip data latches where it is maintained while it is programmed in both the high error rate format and the low error rate format without being resent to the nonvolatile memory. Storage to a block in the high error rate format may be suspended to allow read out of a previously written high error rate block for error checking (post-write read).
摘要翻译：在非易失性存储器中以较高错误率格式存储的数据以较低的错误率格式进行备份。要被存储的数据可以被传送到片上数据锁存器，其中它被维护，同时以高错误率格式和低错误率格式被编程，而不重新发送到非易失性存储器。以高错误率格式存储到块可能被暂停，以允许读出先前写入的高错误率块用于错误检查（写入后读取）。

10. 发明申请

WO2014209743A1 EFFICIENT POST WRITE READ IN THREE DIMENSIONAL NONVOLATILE MEMORY 审中-公开
标题翻译：三维非易失性存储器中的高效写入读取
公开(公告)号：WO2014209743A1
公开(公告)日：2014-12-31
申请号：PCT/US2014/043153
申请日：2014-06-19
申请人： SANDISK TECHNOLOGIES INC.
发明人： AVILA, Chris, Nga, Yee , DUSIJA, Gautam, Ashok , CHEN, Jian
IPC分类号： G11C11/56 , G11C16/04 , G11C16/34
CPC分类号： G06F12/0246 , G11C11/5628 , G11C11/5642 , G11C16/0483 , G11C16/3418 , G11C16/3454 , G11C16/3459 , G11C29/00 , G11C2211/5621 , G11C2211/5641
摘要： Data that is stored in a higher error rate format in a 3-D nonvolatile memory is backed up in a lower error rate format. Later, the higher error rate copy is sampled to determine if it is acceptable. A sampling pattern samples all word lines of a string and at least one word line of each string of the block.
摘要翻译：在3-D非易失性存储器中以较高错误率格式存储的数据以较低的错误率格式进行备份。之后，对较高的错误率副本进行采样，以确定是否可以接受。采样模式对字符串的所有字线和块的每个字符串的至少一个字线进行采样。

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