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1. 发明授权

US08305806B2 Nonvolatile memory device and method for controlling word line or bit line thereof 有权
标题翻译：用于控制字线或其位线的非易失性存储器件和方法
公开(公告)号：US08305806B2
公开(公告)日：2012-11-06
申请号：US12659690
申请日：2010-03-17
申请人： Joon-Yong Choi , Byunggil Choi , Yu Hwan Ro , Yong-Jun Lee
发明人： Joon-Yong Choi , Byunggil Choi , Yu Hwan Ro , Yong-Jun Lee
IPC分类号： G11C16/04
CPC分类号： G11C16/08
摘要： A nonvolatile memory device includes global selection lines, local selection lines, a first selection circuit, and a second selection circuit. The local lines correspond respectively to the global selection lines. The first selection circuit is configured to connect to the global selection lines to select the global selection lines. The second selection circuit is connected between the global selection lines and the local selection lines and is configured to select the local selection lines. The first selection circuit is configured to select at least one global selection line, and the second selection circuit is configured to select the local selection lines corresponding to the selected global selection line while the at least one global selection line is continuously activated.
摘要翻译：非易失性存储器件包括全局选择线，局部选择线，第一选择电路和第二选择电路。本地线分别对应于全局选择线。第一选择电路被配置为连接到全局选择线以选择全局选择线。第二选择电路连接在全局选择线和本地选择线之间，并被配置为选择本地选择线。第一选择电路被配置为选择至少一个全局选择线，并且第二选择电路被配置为在连续激活至少一个全局选择线的同时选择与所选择的全局选择线对应的本地选择线。

2. 发明申请

US20100284221A1 Nonvolatile memory device and method for controlling word line or bit line thereof 有权
标题翻译：用于控制字线或其位线的非易失性存储器件和方法
公开(公告)号：US20100284221A1
公开(公告)日：2010-11-11
申请号：US12659690
申请日：2010-03-17
申请人： Joon-Yong Choi , Byunggil Choi , Yu Hwan Ro , Yong-Jun Lee
发明人： Joon-Yong Choi , Byunggil Choi , Yu Hwan Ro , Yong-Jun Lee
IPC分类号： G11C16/04
CPC分类号： G11C16/08
摘要： A nonvolatile memory device includes global selection lines, local selection lines, a first selection circuit, and a second selection circuit. The local lines correspond respectively to the global selection lines. The first selection circuit is configured to connect to the global selection lines to select the global selection lines. The second selection circuit is connected between the global selection lines and the local selection lines and is configured to select the local selection lines. The first selection circuit is configured to select at least one global selection line, and the second selection circuit is configured to select the local selection lines corresponding to the selected global selection line while the at least one global selection line is continuously activated.
摘要翻译：非易失性存储器件包括全局选择线，局部选择线，第一选择电路和第二选择电路。本地线分别对应于全局选择线。第一选择电路被配置为连接到全局选择线以选择全局选择线。第二选择电路连接在全局选择线和本地选择线之间，并被配置为选择本地选择线。第一选择电路被配置为选择至少一个全局选择线，并且第二选择电路被配置为在连续激活至少一个全局选择线的同时选择与所选择的全局选择线对应的本地选择线。

3. 发明申请

US20100118595A1 RESISTANCE VARIABLE MEMORY DEVICES AND READ METHODS THEREOF 有权
标题翻译：电阻可变存储器件及其读取方法
公开(公告)号：US20100118595A1
公开(公告)日：2010-05-13
申请号：US12691769
申请日：2010-01-22
申请人： Junsoo Bae , Dueung Kim , Kwangjin Lee , Hyungrok Oh , Beakhyung Cho , Byunggil Choi , Woo-Yeong Cho , Yu-Hwan Ro
发明人： Junsoo Bae , Dueung Kim , Kwangjin Lee , Hyungrok Oh , Beakhyung Cho , Byunggil Choi , Woo-Yeong Cho , Yu-Hwan Ro
IPC分类号： G11C7/12 , G11C11/00
CPC分类号： G11C8/10 , G11C5/145 , G11C7/04 , G11C11/56 , G11C11/5678 , G11C13/0004 , G11C13/0038 , G11C13/004 , G11C13/0064 , G11C13/0069 , G11C2013/0054 , G11C2013/0076 , G11C2013/0078 , G11C2213/72
摘要： A resistance-variable memory device includes memory cells, a high voltage circuit, a precharging circuit, a bias circuit, and a sense amplifier. Each memory cell may, for example, include a resistance-variable material and a diode connected to a bitline. The high voltage circuit provides a high voltage from a power source. The precharging circuit raises the bitline up to the high voltage after charging the bitline up to the power source voltage. The bias circuit supplies a read current to the bitline using the high voltage. The sense amplifier compares a voltage of the bitline with a reference voltage by means of the high voltage.
摘要翻译：电阻可变存储器件包括存储单元，高压电路，预充电电路，偏置电路和读出放大器。每个存储单元可以例如包括电阻可变材料和连接到位线的二极管。高压电路从电源提供高电压。预充电电路将位线充电至电源电压后，将位线升高至高电压。偏置电路使用高电压向位线提供读取电流。读出放大器通过高电压将位线的电压与参考电压进行比较。

4. 发明授权

US08243542B2 Resistance variable memory devices and read methods thereof 有权
标题翻译：电阻变量存储器件及其读取方法
公开(公告)号：US08243542B2
公开(公告)日：2012-08-14
申请号：US12691769
申请日：2010-01-22
申请人： Junsoo Bae , Dueung Kim , Kwangjin Lee , Hyungrok Oh , Beakhyung Cho , Byunggil Choi , Woo-Yeong Cho , Yu-Hwan Ro
发明人： Junsoo Bae , Dueung Kim , Kwangjin Lee , Hyungrok Oh , Beakhyung Cho , Byunggil Choi , Woo-Yeong Cho , Yu-Hwan Ro
IPC分类号： G11C7/00
CPC分类号： G11C8/10 , G11C5/145 , G11C7/04 , G11C11/56 , G11C11/5678 , G11C13/0004 , G11C13/0038 , G11C13/004 , G11C13/0064 , G11C13/0069 , G11C2013/0054 , G11C2013/0076 , G11C2013/0078 , G11C2213/72
摘要： A resistance-variable memory device includes memory cells, a high voltage circuit, a precharging circuit, a bias circuit, and a sense amplifier. Each memory cell may, for example, include a resistance-variable material and a diode connected to a bitline. The high voltage circuit provides a high voltage from a power source. The precharging circuit raises the bitline up to the high voltage after charging the bitline up to the power source voltage. The bias circuit supplies a read current to the bitline using the high voltage. The sense amplifier compares a voltage of the bitline with a reference voltage by means of the high voltage.
摘要翻译：电阻可变存储器件包括存储单元，高压电路，预充电电路，偏置电路和读出放大器。每个存储单元可以例如包括电阻可变材料和连接到位线的二极管。高压电路从电源提供高电压。预充电电路将位线充电至电源电压后，将位线升高至高电压。偏置电路使用高电压向位线提供读取电流。读出放大器通过高电压将位线的电压与参考电压进行比较。

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