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    • 6. 发明授权
    • Row redundancy block architecture
    • 行冗余块架构
    • US5691946A
    • 1997-11-25
    • US758783
    • 1996-12-03
    • John DeBrosseToshiaki KirihataHing Wong
    • John DeBrosseToshiaki KirihataHing Wong
    • G11C11/401G11C29/00G11C29/04H01L21/8242H01L27/108G11C5/06
    • G11C29/80G11C29/808G11C29/84
    • Row redundancy control circuits which effectively reduce design space are arranged parallel to word direction and are arranged at the bottom of the redundancy block. This architecture change makes it possible to effectively lay out the redundancy control block by introducing (1) split-global-bus shared with local row redundancy wires, (2) half-length-one-way row redundancy-wordline-enable-signal wires which allows space saving, and (3) distributed wordline enable decoders designed to take advantage of the saved space. An illegal normal/redundancy access problem caused by the address versus timing skew has also been solved. The timing necessary for this detection is given locally by using its adjacent redundancy match detection. This allows the circuit to operate completely as an address driven circuit, resulting in fast and reliable redundancy match detection. In addition, a sample wordline enable signal (SWLE) is generated by using row redundancy match detection. One two-input OR gate allows the time at which SWLE sets sample wordline (SWL) to be the same as the time at which wordline enable (WLE) signal sets wordline (WL). The time at which SWLE sets SWL remains consistent regardless of mode, eliminating the existing reliability concern. This two-input OR gate combined with row redundancy match detection works as an ideal sample wordline enable generator.
    • 有效减少设计空间的行冗余控制电路与字方向平行排列,并配置在冗余块的底部。 通过引入(1)与本地行冗余线共享的分裂全局总线,(2)半长度单向行冗余字线使能信号线,可以有效地布置冗余控制块 这允许节省空间,以及(3)分布式字线使能解码器被设计为利用节省的空间。 由地址与时序偏差引起的非法正常/冗余访问问题也已解决。 通过使用其相邻的冗余匹配检测在本地给出该检测所需的定时。 这允许电路作为地址驱动电路完全操作,导致快速可靠的冗余匹配检测。 此外,通过使用行冗余匹配检测来生成采样字线使能信号(SWLE)。 一个双输入或门允许SWLE设置采样字线(SWL)的时间与字线使能(WLE)信号设置字线(WL)的时间相同。 无论模式如何,SWLE设置SWL的时间保持一致,从而消除了现有的可靠性问题。 该双输入OR门与行冗余匹配检测相结合,可作为理想的采样字线使能发生器。