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1. 发明授权

US4316265A Memory device with high speed memory cell selection mechanism 失效
标题翻译：具有高速存储单元选择机制的存储器件
公开(公告)号：US4316265A
公开(公告)日：1982-02-16
申请号：US94927
申请日：1979-11-16
申请人： Hirotoshi Tanaka , Yoshiki Kawajiri , Kouetsu Chiba , Ryoichi Hori , Kiyoo Itoh
发明人： Hirotoshi Tanaka , Yoshiki Kawajiri , Kouetsu Chiba , Ryoichi Hori , Kiyoo Itoh
IPC分类号： G11C11/413 , G11C8/00 , G11C11/408 , G11C11/40
CPC分类号： G11C11/4087 , G11C8/00
摘要： In a memory device, row and column decoders are connected through a common address signal line to an address buffer, and the row decoder is connected through a switch to the common address signal line. When the address buffer delivers a first address signal, the switch is turned on so that the first address signal is applied to both of the column and row decoders. The column decoder includes therein provision for disabling the column decoder when the first address signal is applied to column decoder. The column decoder therefore does not respond to the first address signal. Subsequently, when the address buffer delivers a second address signal, the switch is turned off so that the row decoder is not applied with the second address signal but the column decoder responds to the second address signal. Thus, the row and column address respond to the first and second address signals respectively.
摘要翻译：在存储器件中，行和列解码器通过公共地址信号线连接到地址缓冲器，并且行解码器通过开关连接到公共地址信号线。当地址缓冲器传送第一个地址信号时，开关导通，使得第一个地址信号被应用于列和行解码器。列解码器包括其中当第一地址信号被应用于列解码器时禁用列解码器的设置。因此，列解码器不响应于第一地址信号。随后，当地址缓冲器传送第二地址信号时，开关被关断，使得行解码器不被施加第二地址信号，但是列译码器响应于第二地址信号。因此，行和列地址分别响应于第一和第二地址信号。

2. 发明授权

US5822267A Semiconductor device incorporating internal power supply for compensating for deviation in operating condition and fabrication process conditions 失效
公开(公告)号：US5822267A
公开(公告)日：1998-10-13
申请号：US305528
申请日：1994-09-13
申请人： Takao Watanabe , Ryoichi Hori , Goro Kitsukawa , Yoshiki Kawajiri , Takayuki Kawahara , Kiyoo Itoh
发明人： Takao Watanabe , Ryoichi Hori , Goro Kitsukawa , Yoshiki Kawajiri , Takayuki Kawahara , Kiyoo Itoh
IPC分类号： G11C5/14 , G11C7/00 , G11C7/12 , G11C8/00 , G11C8/10 , G11C11/4094 , H03K5/08 , H03K17/00 , H03K17/693 , H03K19/003 , H03K19/017 , H03K19/0175 , H03K19/0944
CPC分类号： G11C7/12 , G11C11/4094 , G11C11/413 , G11C5/14 , G11C5/147 , G11C8/10 , H03K17/693 , H03K19/00376 , H03K19/00384 , H03K19/017 , H03K19/01707 , H03K19/017518 , H03K19/09448 , H03K5/08 , H03K2217/0036
摘要： A semiconductor integrated circuit comprises a semiconductor chip, a power supply terminal provided on the semiconductor chip for receiving a voltage from an external power supply source, an internal circuit provided on the semiconductor chip, a power supply circuit provided on the semiconductor chip for transforming an external power supply voltage received from the power supply terminal for supplying a source voltage resulting from the voltage transformation to the internal circuit, and a control circuit provided on the semiconductor chip for controlling the power supply circuit, wherein the control circuit includes external power supply voltage detecting means and/or temperature detecting means and responds to the signal from the external power supply voltage detecting means and/or the temperature detecting means by changing the power supply voltage to the internal circuit to thereby maintain the operating speed of the internal circuit to be constant.

3. 发明授权

US4837462A Semiconductor decoder circuit having switching means for preventing counterflow 失效
标题翻译：半导体解码器电路具有用于防止逆流的开关装置
公开(公告)号：US4837462A
公开(公告)日：1989-06-06
申请号：US130640
申请日：1987-12-09
申请人： Takao Watanabe , Goro Kitukawa , Ryoichi Hori , Kiyoo Itoh , Yoshiki Kawajiri , Takayuki Kawahara
发明人： Takao Watanabe , Goro Kitukawa , Ryoichi Hori , Kiyoo Itoh , Yoshiki Kawajiri , Takayuki Kawahara
IPC分类号： G11C7/12 , G11C8/10 , H03K5/08 , H03K17/00 , H03K17/693 , H03K19/017 , H03K19/0175 , H03K19/0944
CPC分类号： G11C8/10 , G11C7/12 , H03K17/693 , H03K19/017 , H03K19/017518 , H03K19/09448 , H03K5/08 , H03K2217/0036
摘要： The invention relates to a semiconductor device which has a high density of integration and of which a low power consumption is required. The semiconductor device prevents the influence of the amplitude of an input signal upon the amplitude of an output signal in such a way that a preceding circuit and a succeeding circuit are provided with different reference voltages. The semiconductor device is constructed of a circuit which includes a bipolar transistor and an insulated-gate field effect transistor, and which operates with reference to one or more voltages, at least one of the reference voltages having a voltage value different from a reference operating voltage of a preceding circuit. A first switching circuit is interposed between a first reference voltage and an input node of a driver circuit, and a second switching circuit is interposed between an output of a preceding circuit and the input of the driver circuit, so that when an output signal of the preceding circuit is at a high level, the seconding circuit switch is turned "on" while the first switching circuit is turned "off" thereby to produce a still higher potential, and that when the output signal of the preceding circuit is at a low level, the second switching circuit is turned "off" while the first switching circuit is turned "on". The semiconductor device is suited to high-density DRAM and SRAM circuits which use voltage limiters.

4. 发明授权

US4796234A Semiconductor memory having selectively activated blocks including CMOS sense amplifiers 失效
标题翻译：半导体存储器具有选择性地激活的块，包括CMOS读出放大器
公开(公告)号：US4796234A
公开(公告)日：1989-01-03
申请号：US927144
申请日：1986-11-05
申请人： Kiyoo Itoh , Yoshiki Kawajiri , Katsutaka Kimura , Ryoichi Hori , Jun Etoh
发明人： Kiyoo Itoh , Yoshiki Kawajiri , Katsutaka Kimura , Ryoichi Hori , Jun Etoh
IPC分类号： G11C11/409 , G11C7/06 , G11C8/12 , G11C8/14 , G11C11/401 , G11C11/4091 , G11C7/00
CPC分类号： G11C8/14 , G11C11/4091 , G11C7/06 , G11C8/12
摘要： It is contemplated to realize a semiconductor memory with a large memory capacity, high in integration and low in power dissipation. A semiconductor memory is disclosed, comprising a plurality of blocks each having a memory cell array and sense amplifier(s) to differentially amplify signals read out from the array, wherein a common driving line of amplifiers composed of N-channel MOS transistors among said sense amplifiers and a common driving line of amplifiers composed of P-channel MOS transistors among the sense amplifers are connected between different blocks.
摘要翻译：可以想到实现具有大存储容量，高集成度和低功耗的半导体存储器。公开了一种半导体存储器，包括多个块，每个块具有存储单元阵列和读出放大器，用于差分放大从阵列读出的信号，其中由所述感测中的N沟道MOS晶体管组成的公共驱动线放大器和由感测放大器中的P沟道MOS晶体管组成的放大器的公共驱动线连接在不同的块之间。

5. 发明申请

US20050219935A1 Semiconductor device incorporating internal power supply for compensating for deviation in operating condition and fabrication process conditions 失效
公开(公告)号：US20050219935A1
公开(公告)日：2005-10-06
申请号：US11133232
申请日：2005-05-20
申请人： Takao Watanabe , Ryoichi Hori , Goro Kitsukawa , Yoshiki Kawajiri , Takayuki Kawahara , Kiyoo Itoh
发明人： Takao Watanabe , Ryoichi Hori , Goro Kitsukawa , Yoshiki Kawajiri , Takayuki Kawahara , Kiyoo Itoh
IPC分类号： G11C5/14 , G11C7/00 , G11C7/12 , G11C8/00 , G11C8/10 , G11C11/4094 , H03K5/08 , H03K17/00 , H03K17/693 , H03K19/003 , H03K19/017 , H03K19/0175 , H03K19/0944
CPC分类号： G11C7/12 , G11C5/14 , G11C5/147 , G11C8/10 , G11C11/4094 , G11C11/413 , H03K5/08 , H03K17/693 , H03K19/00376 , H03K19/00384 , H03K19/017 , H03K19/01707 , H03K19/017518 , H03K19/09448 , H03K2217/0036
摘要： A semiconductor integrated circuit comprises a semiconductor chip, a power supply terminal provided on the semiconductor chip for receiving a voltage from an external power supply source, an internal circuit provided on the semiconductor chip, a power supply circuit provided on the semiconductor chip for transforming an external power supply voltage received from the power supply terminal for supplying a source voltage resulting from the voltage transformation to the internal circuit, and a control circuit provided on the semiconductor chip for controlling the power supply circuit, wherein the control circuit includes external power supply voltage detecting means and/or temperature detecting means and responds to the signal from the external power supply voltage detecting means and/or the temperature detecting means by changing the power supply voltage to the internal circuit to thereby maintain the operating speed of the internal circuit to be constant.

6. 发明授权

US06608791B2 Semiconductor device incorporating internal power supply for compensating for deviation in operating condition and fabrication process conditions 失效
标题翻译：内置电源的半导体器件用于补偿工作条件和制造工艺条件的偏差
公开(公告)号：US06608791B2
公开(公告)日：2003-08-19
申请号：US10103827
申请日：2002-03-25
申请人： Takao Watanabe , Ryoichi Hori , Goro Kitsukawa , Yoshiki Kawajiri , Takayuki Kawahara , Kiyoo Itoh
发明人： Takao Watanabe , Ryoichi Hori , Goro Kitsukawa , Yoshiki Kawajiri , Takayuki Kawahara , Kiyoo Itoh
IPC分类号： G11C704
CPC分类号： G11C7/12 , G11C5/14 , G11C5/147 , G11C8/10 , G11C11/4094 , G11C11/413 , H03K5/08 , H03K17/693 , H03K19/00376 , H03K19/00384 , H03K19/017 , H03K19/01707 , H03K19/017518 , H03K19/09448 , H03K2217/0036
摘要： A semiconductor integrated circuit comprises a semiconductor chip, a power supply terminal provided on the semiconductor chip for receiving a voltage from an external power supply source, an internal circuit provided on the semiconductor chip, a power supply circuit provided on the semiconductor chip for transforming an external power supply voltage received from the power supply terminal for supplying a source voltage resulting from the voltage transformation to the internal circuit, and a control circuit provided on the semiconductor chip for controlling the power supply circuit, wherein the control circuit includes external power supply voltage detecting means and/or temperature detecting means and responds to the signal from the external power supply voltage detecting means and/or the temperature detecting means by changing the power supply voltage to the internal circuit to thereby maintain the operating speed of the internal circuit to be constant.
摘要翻译：半导体集成电路包括半导体芯片，设置在半导体芯片上用于接收来自外部电源的电压的电源端子，设置在半导体芯片上的内部电路，设置在半导体芯片上的电源电路，用于将从所述电源端子接收用于向所述内部电路提供由所述电压变换产生的源极电压的外部电源电压;以及控制电路，设置在所述半导体芯片上用于控制所述电源电路，其中，所述控制电路包括外部电源电压检测装置和/或温度检测装置，通过改变对内部电路的电源电压来响应来自外部电源电压检测装置和/或温度检测装置的信号，从而将内部电路的操作速度保持为不变。

7. 发明授权

US5396116A Semiconductor device incorporating internal power supply for compensating for deviation in operating condition and fabrication process conditions 失效
公开(公告)号：US5396116A
公开(公告)日：1995-03-07
申请号：US984822
申请日：1992-12-03
申请人： Takao Watanabe , Ryoichi Hori , Goro Kitsukawa , Yoshiki Kawajiri , Takayuki Kawahara , Kiyoo Itoh
发明人： Takao Watanabe , Ryoichi Hori , Goro Kitsukawa , Yoshiki Kawajiri , Takayuki Kawahara , Kiyoo Itoh
IPC分类号： G11C5/14 , G11C7/00 , G11C7/12 , G11C8/00 , G11C8/10 , G11C11/4094 , H03K5/08 , H03K17/00 , H03K17/693 , H03K19/003 , H03K19/017 , H03K19/0175 , H03K19/0944 , G05F1/10
CPC分类号： G11C7/12 , G11C11/4094 , G11C11/413 , G11C5/14 , G11C5/147 , G11C8/10 , H03K17/693 , H03K19/00376 , H03K19/00384 , H03K19/017 , H03K19/01707 , H03K19/017518 , H03K19/09448 , H03K5/08 , H03K2217/0036
摘要： A semiconductor integrated circuit comprises a semiconductor chip, a power supply terminal provided on the semiconductor chip for receiving a voltage from an external power supply source, an internal circuit provided on the semiconductor chip, a power supply circuit provided on the semiconductor chip for transforming an external power supply voltage received from the power supply terminal for supplying a source voltage resulting from the voltage transformation to the internal circuit, and a control circuit provided on the semiconductor chip for controlling the power supply circuit, wherein the control circuit includes external power supply voltage detecting means and/or temperature detecting means and responds to the signal from the external power supply voltage detecting means and/or the temperature detecting means by changing the power supply voltage to the internal circuit to thereby maintain the operating speed of the internal circuit to be constant.

8. 发明授权

US5197033A Semiconductor device incorporating internal power supply for compensating for deviation in operating condition and fabrication process conditions 失效
标题翻译：内置电源的半导体器件用于补偿工作条件和制造工艺条件的偏差
公开(公告)号：US5197033A
公开(公告)日：1993-03-23
申请号：US808878
申请日：1991-12-18
申请人： Takao Watanabe , Ryoichi Hori , Goro Kitsukawa , Yoshiki Kawajiri , Takayuki Kawahara , Kiyoo Itoh
发明人： Takao Watanabe , Ryoichi Hori , Goro Kitsukawa , Yoshiki Kawajiri , Takayuki Kawahara , Kiyoo Itoh
IPC分类号： G11C5/14 , G11C7/00 , G11C7/12 , G11C8/00 , G11C8/10 , G11C11/4094 , H03K5/08 , H03K17/00 , H03K17/693 , H03K19/003 , H03K19/017 , H03K19/0175 , H03K19/0944
CPC分类号： G11C7/12 , G11C11/4094 , G11C11/413 , G11C5/14 , G11C5/147 , G11C8/10 , H03K17/693 , H03K19/00376 , H03K19/00384 , H03K19/017 , H03K19/01707 , H03K19/017518 , H03K19/09448 , H03K5/08 , H03K2217/0036
摘要： A semiconductor integrated circuit comprises a semiconductor chip, a power supply terminal provided on the semiconductor chip for receiving a voltage from an external power supply source, an internal circuit provided on the semiconductor chip, a power supply circuit provided on the semiconductor chip for transforming an external power supply voltage received from the power supply terminal for supplying a source voltage resulting from the voltage transformation to the internal circuit, and a control circuit provided on the semiconductor chip for controlling the power supply circuit, wherein the control circuit includes external power supply voltage detecting means and/or temperature detecting means and responds to the signal from the external power supply voltage detecting means and/or the temperature detecting means by changing the power supply voltage to the internal circuit to thereby maintain the operating speed of the internal circuit to be constant.
摘要翻译：半导体集成电路包括半导体芯片，设置在半导体芯片上用于接收来自外部电源的电压的电源端子，设置在半导体芯片上的内部电路，设置在半导体芯片上的电源电路，用于将从所述电源端子接收用于向所述内部电路提供由所述电压变换产生的源极电压的外部电源电压;以及控制电路，设置在所述半导体芯片上用于控制所述电源电路，其中，所述控制电路包括外部电源电压检测装置和/或温度检测装置，通过改变对内部电路的电源电压来响应来自外部电源电压检测装置和/或温度检测装置的信号，从而将内部电路的操作速度保持为不变。

9. 发明授权

US4873673A Driver circuit having a current mirror circuit 失效
标题翻译：具有电流镜电路的驱动电路
公开(公告)号：US4873673A
公开(公告)日：1989-10-10
申请号：US126485
申请日：1987-11-30
申请人： Ryoichi Hori , Kiyoo Itoh , Goro Kitsukawa , Yoshiki Kawajiri , Takao Watanabe , Takayuki Kawahara
发明人： Ryoichi Hori , Kiyoo Itoh , Goro Kitsukawa , Yoshiki Kawajiri , Takao Watanabe , Takayuki Kawahara
IPC分类号： G11C11/4094
CPC分类号： G11C11/4094
摘要： A semiconductor device is provided wherein a current mirror circuit controlled by a pulse input voltage is utilized and a load is driven in such a manner that the output current of the current mirror circuit becomes a substantially constant current. Further, the output voltage of the current mirror circuit can be compared with a predetermined reference voltage by a comparator, with the current mirror circuit being controlled by the output voltage of the comparator in accordance with the result of comparison. The driver circuit can be used for driving the data lines of a dynamic random access memory or an external capacitance load. With these techniques, power consumption and peak current are reduced.
摘要翻译：提供一种半导体器件，其中利用由脉冲输入电压控制的电流镜像电路，并且以使得电流镜像电路的输出电流变为基本上恒定的电流的方式驱动负载。此外，可以通过比较器将电流镜电路的输出电压与预定的参考电压进行比较，根据比较结果，电流镜电路由比较器的输出电压控制。驱动电路可用于驱动动态随机存取存储器的数据线或外部电容负载。利用这些技术，功耗和峰值电流降低。

10. 发明授权

US07002856B2 Semiconductor device incorporating internal power supply for compensating for deviation in operating condition and fabrication process conditions 失效
公开(公告)号：US07002856B2
公开(公告)日：2006-02-21
申请号：US11133232
申请日：2005-05-20
申请人： Takao Watanabe , Ryoichi Hori , Goro Kitsukawa , Yoshiki Kawajiri , Takayuki Kawahara , Kiyoo Itoh
发明人： Takao Watanabe , Ryoichi Hori , Goro Kitsukawa , Yoshiki Kawajiri , Takayuki Kawahara , Kiyoo Itoh
IPC分类号： G11C7/00
CPC分类号： G11C7/12 , G11C5/14 , G11C5/147 , G11C8/10 , G11C11/4094 , G11C11/413 , H03K5/08 , H03K17/693 , H03K19/00376 , H03K19/00384 , H03K19/017 , H03K19/01707 , H03K19/017518 , H03K19/09448 , H03K2217/0036
摘要： A semiconductor integrated circuit comprises a semiconductor chip, a power supply terminal provided on the semiconductor chip for receiving a voltage from an external power supply source, an internal circuit provided on the semiconductor chip, a power supply circuit provided on the semiconductor chip for transforming an external power supply voltage received from the power supply terminal for supplying a source voltage resulting from the voltage transformation to the internal circuit, and a control circuit provided on the semiconductor chip for controlling the power supply circuit, wherein the control circuit includes external power supply voltage detecting means and/or temperature detecting means and responds to the signal from the external power supply voltage detecting means and/or the temperature detecting means by changing the power supply voltage to the internal circuit to thereby maintain the operating speed of the internal circuit to be constant.

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