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2. 发明授权

US4864375A Dram cell and method 失效
标题翻译：戏剧细胞和方法
公开(公告)号：US4864375A
公开(公告)日：1989-09-05
申请号：US188729
申请日：1988-04-29
申请人： Clarence W. Teng , Cheng-Eng D. Chen , Bor-Yen Mao
发明人： Clarence W. Teng , Cheng-Eng D. Chen , Bor-Yen Mao
IPC分类号： H01L27/108
CPC分类号： H01L27/10841
摘要： The following detailed description describes a dynamic random access memory (dRAM) cell. The described cell provides a one-transistor/one-capacitor dRAM cell structure and array in which the cell pass transistor is formed on the sidewalls of a trench containing the cell capacitor; the word and bit lines cross over this trench. The trench extends through an epitaxial layer into a substrate. The epitaxial layer and substrate are separated by a layer which serves as a diffusion barrier. This stacking of the transistor on top of the capcitor yields a cell with minimal area on the substrate and solves a problem of dense packing of cells. The diffusion barrier allows for the optimal doping of the epitaxial for operation of the transistor and optimal doping of the substrate for operation of the capacitor.One capacitor plate and the transistor channel and source region are formed in the bulk sidewall of the trench, and the transistor gate and the other plate of the capacitor are both formed in polysilicon in the trench but separated from each other by an oxide layer inside the trench. The signal charge is transferred to the polysilicon capacitor plate transistor with the polysilicon capacitor plate. This connection between source and polysilicon capacitor plate is provided by a buried lateral contact.
摘要翻译：以下详细描述描述了动态随机存取存储器（dRAM）单元。所述单元提供单晶体管/单电容器dRAM单元结构和阵列，其中单元传输晶体管形成在包含单元电容器的沟槽的侧壁上; 字和位线跨过这个沟槽。沟槽延伸穿过外延层进入衬底。外延层和衬底被用作扩散阻挡层的层分开。晶体管在电容器顶部的堆叠产生了在衬底上具有最小面积的电池，并且解决了电池致密堆积的问题。扩散势垒允许用于晶体管的操作的外延的最佳掺杂和用于电容器操作的衬底的最佳掺杂。一个电容器板和晶体管沟道和源极区域形成在沟槽的体侧壁中，并且晶体管栅极和电容器的另一个栅极都形成在沟槽中的多晶硅中，但是在其内部的氧化物层彼此分开沟。信号电荷用多晶硅电容器板转移到多晶硅电容器板晶体管。源极和多晶硅电容器板之间的这种连接由埋入的侧面接触提供。

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